tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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ALSA: emu10k1: use more existing defines instead of open-coded numbers

Using the *_MASK defines for "maximal value" is debatable. I got the
idea from FreeBSD, and it sorta makes sense to me.

Some hunks look a bit incomplete, because code that is going to be
subsequently removed is not touched here.

Signed-off-by: Oswald Buddenhagen <oswald.buddenhagen@gmx.de>
Link: https://lore.kernel.org/r/20230428080732.1697695-1-oswald.buddenhagen@gmx.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>

authored by

Oswald Buddenhagen and committed by
Takashi Iwai 9d2f3863 067eb084

+69 -65
+8 -7
sound/pci/emu10k1/emu10k1_callback.c
··· 120 120 struct snd_emu10k1 *hw; 121 121 122 122 hw = vp->hw; 123 - dcysusv = 0x8000 | (unsigned char)vp->reg.parm.modrelease; 123 + dcysusv = (unsigned char)vp->reg.parm.modrelease | DCYSUSM_PHASE1_MASK; 124 124 snd_emu10k1_ptr_write(hw, DCYSUSM, vp->ch, dcysusv); 125 - dcysusv = 0x8000 | (unsigned char)vp->reg.parm.volrelease | DCYSUSV_CHANNELENABLE_MASK; 125 + dcysusv = (unsigned char)vp->reg.parm.volrelease | DCYSUSV_PHASE1_MASK | DCYSUSV_CHANNELENABLE_MASK; 126 126 snd_emu10k1_ptr_write(hw, DCYSUSV, vp->ch, dcysusv); 127 127 } 128 128 ··· 138 138 if (snd_BUG_ON(!vp)) 139 139 return; 140 140 hw = vp->hw; 141 - snd_emu10k1_ptr_write(hw, DCYSUSV, vp->ch, 0x807f | DCYSUSV_CHANNELENABLE_MASK); 141 + snd_emu10k1_ptr_write(hw, DCYSUSV, vp->ch, 142 + DCYSUSV_PHASE1_MASK | DCYSUSV_DECAYTIME_MASK | DCYSUSV_CHANNELENABLE_MASK); 142 143 if (vp->block) { 143 144 struct snd_emu10k1_memblk *emem; 144 145 emem = (struct snd_emu10k1_memblk *)vp->block; ··· 348 347 } 349 348 350 349 /* channel to be silent and idle */ 351 - snd_emu10k1_ptr_write(hw, DCYSUSV, ch, 0x0000); 352 - snd_emu10k1_ptr_write(hw, VTFT, ch, 0x0000FFFF); 353 - snd_emu10k1_ptr_write(hw, CVCF, ch, 0x0000FFFF); 350 + snd_emu10k1_ptr_write(hw, DCYSUSV, ch, 0); 351 + snd_emu10k1_ptr_write(hw, VTFT, ch, VTFT_FILTERTARGET_MASK); 352 + snd_emu10k1_ptr_write(hw, CVCF, ch, CVCF_CURRENTFILTER_MASK); 354 353 snd_emu10k1_ptr_write(hw, PTRX, ch, 0); 355 354 snd_emu10k1_ptr_write(hw, CPF, ch, 0); 356 355 ··· 454 453 /* reset volume */ 455 454 temp = (unsigned int)vp->vtarget << 16; 456 455 snd_emu10k1_ptr_write(hw, VTFT, ch, temp | vp->ftarget); 457 - snd_emu10k1_ptr_write(hw, CVCF, ch, temp | 0xff00); 456 + snd_emu10k1_ptr_write(hw, CVCF, ch, temp | CVCF_CURRENTFILTER_MASK); 458 457 return 0; 459 458 } 460 459
+23 -23
sound/pci/emu10k1/emu10k1_main.c
··· 59 59 { 60 60 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0); 61 61 snd_emu10k1_ptr_write(emu, IP, ch, 0); 62 - snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff); 63 - snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff); 62 + snd_emu10k1_ptr_write(emu, VTFT, ch, VTFT_FILTERTARGET_MASK); 63 + snd_emu10k1_ptr_write(emu, CVCF, ch, CVCF_CURRENTFILTER_MASK); 64 64 snd_emu10k1_ptr_write(emu, PTRX, ch, 0); 65 65 snd_emu10k1_ptr_write(emu, CPF, ch, 0); 66 66 snd_emu10k1_ptr_write(emu, CCR, ch, 0); ··· 74 74 75 75 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0); 76 76 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0); 77 - snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff); 77 + snd_emu10k1_ptr_write(emu, IFATN, ch, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK); 78 78 snd_emu10k1_ptr_write(emu, PEFE, ch, 0); 79 79 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0); 80 80 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */ ··· 90 90 91 91 /* Audigy extra stuffs */ 92 92 if (emu->audigy) { 93 - snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */ 94 - snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */ 95 - snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */ 96 - snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */ 93 + snd_emu10k1_ptr_write(emu, A_CSBA, ch, 0); 94 + snd_emu10k1_ptr_write(emu, A_CSDC, ch, 0); 95 + snd_emu10k1_ptr_write(emu, A_CSFE, ch, 0); 96 + snd_emu10k1_ptr_write(emu, A_CSHG, ch, 0); 97 97 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100); 98 98 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f); 99 99 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0); ··· 259 259 260 260 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr); 261 261 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */ 262 - snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */ 262 + snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_256K); /* taken from original driver */ 263 263 264 264 silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0); 265 265 for (ch = 0; ch < NUM_G; ch++) { ··· 818 818 /* FPGA netlist already present so clear it */ 819 819 /* Return to programming mode */ 820 820 821 - snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02); 821 + snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_HANA); 822 822 } 823 823 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg); 824 824 dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg); ··· 858 858 /* Optical -> ADAT I/O */ 859 859 emu->emu1010.optical_in = 1; /* IN_ADAT */ 860 860 emu->emu1010.optical_out = 1; /* OUT_ADAT */ 861 - tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) | 862 - (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0); 861 + tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) | 862 + (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF); 863 863 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp); 864 864 /* Set no attenuation on Audio Dock pads. */ 865 - snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00); 866 865 emu->emu1010.adc_pads = 0x00; 866 + snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, emu->emu1010.adc_pads); 867 867 /* Unmute Audio dock DACs, Headphone source DAC-4. */ 868 - snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30); 868 + snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4); 869 869 /* DAC PADs. */ 870 - snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f); 871 - emu->emu1010.dac_pads = 0x0f; 870 + emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 | 871 + EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4; 872 + snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, emu->emu1010.dac_pads); 872 873 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */ 873 - snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); 874 + snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID); 874 875 /* MIDI routing */ 875 - snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); 876 - /* Unknown. */ 877 - snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); 876 + snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2); 877 + snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2); 878 878 /* IRQ Enable: All on */ 879 - /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */ 879 + /* snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x0f); */ 880 880 /* IRQ Enable: All off */ 881 881 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00); 882 882 883 883 emu->emu1010.internal_clock = 1; /* 48000 */ 884 884 /* Default WCLK set to 48kHz. */ 885 - snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00); 885 + snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K); 886 886 /* Word Clock source, Internal 48kHz x1 */ 887 887 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K); 888 888 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */ 889 889 /* Audio Dock LEDs. */ 890 - snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); 890 + snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, EMU_HANA_DOCK_LEDS_2_LOCK | EMU_HANA_DOCK_LEDS_2_48K); 891 891 892 892 #if 0 893 893 /* For 96kHz */ ··· 1014 1014 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1); 1015 1015 snd_emu1010_fpga_link_dst_src_write(emu, 1016 1016 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1); 1017 - snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */ 1017 + snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 1018 1018 1019 1019 #if 0 1020 1020 snd_emu1010_fpga_link_dst_src_write(emu,
+3 -3
sound/pci/emu10k1/emufx.c
··· 1355 1355 gpr += 2; 1356 1356 1357 1357 /* mic capture buffer */ 1358 - A_OP(icode, &ptr, iINTERP, A_EXTOUT(A_EXTOUT_MIC_CAP), A_EXTIN(A_EXTIN_AC97_L), 0xcd, A_EXTIN(A_EXTIN_AC97_R)); 1358 + A_OP(icode, &ptr, iINTERP, A_EXTOUT(A_EXTOUT_MIC_CAP), A_EXTIN(A_EXTIN_AC97_L), A_C_40000000, A_EXTIN(A_EXTIN_AC97_R)); 1359 1359 1360 1360 /* Audigy CD Playback Volume */ 1361 1361 A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_SPDIF_CD_L); ··· 1438 1438 1439 1439 /* Stereo Mix Center Playback */ 1440 1440 /* Center = sub = Left/2 + Right/2 */ 1441 - A_OP(icode, &ptr, iINTERP, A_GPR(tmp), A_GPR(stereo_mix), 0xcd, A_GPR(stereo_mix+1)); 1441 + A_OP(icode, &ptr, iINTERP, A_GPR(tmp), A_GPR(stereo_mix), A_C_40000000, A_GPR(stereo_mix+1)); 1442 1442 A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_GPR(playback+4), A_GPR(gpr), A_GPR(tmp)); 1443 1443 snd_emu10k1_init_mono_control(&controls[nctl++], "Center Playback Volume", gpr, 0); 1444 1444 gpr++; ··· 2478 2478 outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG); 2479 2479 spin_unlock_irq(&emu->emu_lock); 2480 2480 snd_emu10k1_ptr_write(emu, TCB, 0, 0); 2481 - snd_emu10k1_ptr_write(emu, TCBS, 0, 0); 2481 + snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K); 2482 2482 if (emu->fx8010.etram_pages.area != NULL) { 2483 2483 snd_dma_free_pages(&emu->fx8010.etram_pages); 2484 2484 emu->fx8010.etram_pages.area = NULL;
+4 -4
sound/pci/emu10k1/emumixer.c
··· 827 827 change = (emu->emu1010.optical_out != val); 828 828 if (change) { 829 829 emu->emu1010.optical_out = val; 830 - tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) | 831 - (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0); 830 + tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) | 831 + (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF); 832 832 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp); 833 833 } 834 834 return change; ··· 878 878 change = (emu->emu1010.optical_in != val); 879 879 if (change) { 880 880 emu->emu1010.optical_in = val; 881 - tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) | 882 - (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0); 881 + tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) | 882 + (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF); 883 883 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp); 884 884 } 885 885 return change;
+6 -6
sound/pci/emu10k1/emupcm.c
··· 352 352 snd_emu10k1_ptr_write(emu, MAPA, voice, silent_page); 353 353 snd_emu10k1_ptr_write(emu, MAPB, voice, silent_page); 354 354 /* modulation envelope */ 355 - snd_emu10k1_ptr_write(emu, CVCF, voice, 0xffff); 356 - snd_emu10k1_ptr_write(emu, VTFT, voice, 0xffff); 355 + snd_emu10k1_ptr_write(emu, VTFT, voice, VTFT_FILTERTARGET_MASK); 356 + snd_emu10k1_ptr_write(emu, CVCF, voice, CVCF_CURRENTFILTER_MASK); 357 357 snd_emu10k1_ptr_write(emu, ATKHLDM, voice, 0); 358 358 snd_emu10k1_ptr_write(emu, DCYSUSM, voice, 0x007f); 359 359 snd_emu10k1_ptr_write(emu, LFOVAL1, voice, 0x8000); ··· 621 621 tmp = runtime->channels == 2 ? (master ? 1 : 2) : 0; 622 622 vattn = mix != NULL ? (mix->attn[tmp] << 16) : 0; 623 623 snd_emu10k1_ptr_write(emu, IFATN, voice, attn); 624 - snd_emu10k1_ptr_write(emu, VTFT, voice, vattn | 0xffff); 625 - snd_emu10k1_ptr_write(emu, CVCF, voice, vattn | 0xffff); 624 + snd_emu10k1_ptr_write(emu, VTFT, voice, vattn | VTFT_FILTERTARGET_MASK); 625 + snd_emu10k1_ptr_write(emu, CVCF, voice, vattn | CVCF_CURRENTFILTER_MASK); 626 626 snd_emu10k1_ptr_write(emu, DCYSUSV, voice, 0x7f7f); 627 627 snd_emu10k1_voice_clear_loop_stop(emu, voice); 628 628 } ··· 663 663 snd_emu10k1_ptr_write(emu, PTRX_PITCHTARGET, voice, 0); 664 664 snd_emu10k1_ptr_write(emu, CPF_CURRENTPITCH, voice, 0); 665 665 snd_emu10k1_ptr_write(emu, IFATN, voice, 0xffff); 666 - snd_emu10k1_ptr_write(emu, VTFT, voice, 0xffff); 667 - snd_emu10k1_ptr_write(emu, CVCF, voice, 0xffff); 666 + snd_emu10k1_ptr_write(emu, VTFT, voice, VTFT_FILTERTARGET_MASK); 667 + snd_emu10k1_ptr_write(emu, CVCF, voice, CVCF_CURRENTFILTER_MASK); 668 668 snd_emu10k1_ptr_write(emu, IP, voice, 0); 669 669 } 670 670
+9 -9
sound/pci/emu10k1/io.c
··· 95 95 regptr = (reg << 16) | chn; 96 96 97 97 spin_lock_irqsave(&emu->emu_lock, flags); 98 - outl(regptr, emu->port + 0x20 + PTR); 99 - val = inl(emu->port + 0x20 + DATA); 98 + outl(regptr, emu->port + PTR2); 99 + val = inl(emu->port + DATA2); 100 100 spin_unlock_irqrestore(&emu->emu_lock, flags); 101 101 return val; 102 102 } ··· 112 112 regptr = (reg << 16) | chn; 113 113 114 114 spin_lock_irqsave(&emu->emu_lock, flags); 115 - outl(regptr, emu->port + 0x20 + PTR); 116 - outl(data, emu->port + 0x20 + DATA); 115 + outl(regptr, emu->port + PTR2); 116 + outl(data, emu->port + DATA2); 117 117 spin_unlock_irqrestore(&emu->emu_lock, flags); 118 118 } 119 119 ··· 128 128 /* This function is not re-entrant, so protect against it. */ 129 129 spin_lock(&emu->spi_lock); 130 130 if (emu->card_capabilities->ca0108_chip) 131 - reg = 0x3c; /* PTR20, reg 0x3c */ 131 + reg = P17V_SPI; 132 132 else { 133 133 /* For other chip types the SPI register 134 134 * is currently unknown. */ ··· 280 280 return; 281 281 if (snd_BUG_ON(src & ~0x71f)) 282 282 return; 283 - snd_emu1010_fpga_write(emu, 0x00, dst >> 8); 284 - snd_emu1010_fpga_write(emu, 0x01, dst & 0x1f); 285 - snd_emu1010_fpga_write(emu, 0x02, src >> 8); 286 - snd_emu1010_fpga_write(emu, 0x03, src & 0x1f); 283 + snd_emu1010_fpga_write(emu, EMU_HANA_DESTHI, dst >> 8); 284 + snd_emu1010_fpga_write(emu, EMU_HANA_DESTLO, dst & 0x1f); 285 + snd_emu1010_fpga_write(emu, EMU_HANA_SRCHI, src >> 8); 286 + snd_emu1010_fpga_write(emu, EMU_HANA_SRCLO, src & 0x1f); 287 287 } 288 288 289 289 void snd_emu10k1_intr_enable(struct snd_emu10k1 *emu, unsigned int intrenb)
+16 -13
sound/pci/emu10k1/p16v.c
··· 254 254 emu->p16v_buffer->bytes); 255 255 #endif /* debug */ 256 256 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, channel); 257 + tmp &= ~(A_SPDIF_RATE_MASK | A_EHC_SRC48_MASK); 257 258 switch (runtime->rate) { 258 259 case 44100: 259 - snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0xe0e0) | 0x8080); 260 + snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, 261 + tmp | A_SPDIF_44100 | A_EHC_SRC48_44); 260 262 break; 261 263 case 96000: 262 - snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0xe0e0) | 0x4040); 264 + snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, 265 + tmp | A_SPDIF_96000 | A_EHC_SRC48_96); 263 266 break; 264 267 case 192000: 265 - snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0xe0e0) | 0x2020); 268 + snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, 269 + tmp | A_SPDIF_192000 | A_EHC_SRC48_192); 266 270 break; 267 271 case 48000: 268 272 default: 269 - snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0xe0e0) | 0x0000); 273 + snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, 274 + tmp | A_SPDIF_48000 | A_EHC_SRC48_BYPASS); 270 275 break; 271 276 } 272 277 /* FIXME: Check emu->buffer.size before actually writing to it. */ ··· 287 282 //snd_emu10k1_ptr20_write(emu, PLAYBACK_PERIOD_SIZE, channel, frames_to_bytes(runtime, runtime->period_size)<<16); // buffer size in bytes 288 283 snd_emu10k1_ptr20_write(emu, PLAYBACK_PERIOD_SIZE, channel, 0); // buffer size in bytes 289 284 snd_emu10k1_ptr20_write(emu, PLAYBACK_POINTER, channel, 0); 290 - snd_emu10k1_ptr20_write(emu, 0x07, channel, 0x0); 291 - snd_emu10k1_ptr20_write(emu, 0x08, channel, 0); 285 + snd_emu10k1_ptr20_write(emu, PLAYBACK_FIFO_END_ADDRESS, channel, 0); 286 + snd_emu10k1_ptr20_write(emu, PLAYBACK_FIFO_POINTER, channel, 0); 292 287 293 288 return 0; 294 289 } ··· 299 294 struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream); 300 295 struct snd_pcm_runtime *runtime = substream->runtime; 301 296 int channel = substream->pcm->device - emu->p16v_device_offset; 302 - u32 tmp; 303 297 304 298 /* 305 299 dev_dbg(emu->card->dev, "prepare capture:channel_number=%d, rate=%d, " ··· 308 304 runtime->buffer_size, runtime->period_size, 309 305 frames_to_bytes(runtime, 1)); 310 306 */ 311 - tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, channel); 312 307 switch (runtime->rate) { 313 308 case 44100: 314 - snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0x0e00) | 0x0800); 309 + snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, channel, A_I2S_CAPTURE_44100); 315 310 break; 316 311 case 96000: 317 - snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0x0e00) | 0x0400); 312 + snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, channel, A_I2S_CAPTURE_96000); 318 313 break; 319 314 case 192000: 320 - snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0x0e00) | 0x0200); 315 + snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, channel, A_I2S_CAPTURE_192000); 321 316 break; 322 317 case 48000: 323 318 default: 324 - snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, channel, (tmp & ~0x0e00) | 0x0000); 319 + snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, channel, A_I2S_CAPTURE_48000); 325 320 break; 326 321 } 327 322 /* FIXME: Check emu->buffer.size before actually writing to it. */ 328 - snd_emu10k1_ptr20_write(emu, 0x13, channel, 0); 323 + snd_emu10k1_ptr20_write(emu, CAPTURE_FIFO_POINTER, channel, 0); 329 324 snd_emu10k1_ptr20_write(emu, CAPTURE_DMA_ADDR, channel, runtime->dma_addr); 330 325 snd_emu10k1_ptr20_write(emu, CAPTURE_BUFFER_SIZE, channel, frames_to_bytes(runtime, runtime->buffer_size) << 16); // buffer size in bytes 331 326 snd_emu10k1_ptr20_write(emu, CAPTURE_POINTER, channel, 0);