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Merge branch 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux

Tariq Toukan says:

====================
mlx5-next updates 2026-01-13

* 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux:
net/mlx5: Add IFC bits for extended ETS rate limit bandwidth value
net/mlx5: Add support for querying bond speed
net/mlx5: Handle port and vport speed change events in MPESW
net/mlx5: Propagate LAG effective max_tx_speed to vports
net/mlx5: Add max_tx_speed and its CAP bit to IFC
====================

Link: https://patch.msgid.link/1768299471-1603093-1-git-send-email-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

+395 -6
+215
drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c
··· 233 233 { 234 234 struct mlx5_lag *ldev = container_of(ref, struct mlx5_lag, ref); 235 235 struct net *net; 236 + int i; 236 237 237 238 if (ldev->nb.notifier_call) { 238 239 net = read_pnet(&ldev->net); 239 240 unregister_netdevice_notifier_net(net, &ldev->nb); 240 241 } 241 242 243 + mlx5_ldev_for_each(i, 0, ldev) { 244 + if (ldev->pf[i].dev && 245 + ldev->pf[i].port_change_nb.nb.notifier_call) { 246 + struct mlx5_nb *nb = &ldev->pf[i].port_change_nb; 247 + 248 + mlx5_eq_notifier_unregister(ldev->pf[i].dev, nb); 249 + } 250 + } 251 + 242 252 mlx5_lag_mp_cleanup(ldev); 243 253 cancel_delayed_work_sync(&ldev->bond_work); 254 + cancel_work_sync(&ldev->speed_update_work); 244 255 destroy_workqueue(ldev->wq); 245 256 mutex_destroy(&ldev->lock); 246 257 kfree(ldev); ··· 285 274 kref_init(&ldev->ref); 286 275 mutex_init(&ldev->lock); 287 276 INIT_DELAYED_WORK(&ldev->bond_work, mlx5_do_bond_work); 277 + INIT_WORK(&ldev->speed_update_work, mlx5_mpesw_speed_update_work); 288 278 289 279 ldev->nb.notifier_call = mlx5_lag_netdev_event; 290 280 write_pnet(&ldev->net, mlx5_core_net(dev)); ··· 1008 996 ldev->mode != MLX5_LAG_MODE_MPESW; 1009 997 } 1010 998 999 + #ifdef CONFIG_MLX5_ESWITCH 1000 + static int 1001 + mlx5_lag_sum_devices_speed(struct mlx5_lag *ldev, u32 *sum_speed, 1002 + int (*get_speed)(struct mlx5_core_dev *, u32 *)) 1003 + { 1004 + struct mlx5_core_dev *pf_mdev; 1005 + int pf_idx; 1006 + u32 speed; 1007 + int ret; 1008 + 1009 + *sum_speed = 0; 1010 + mlx5_ldev_for_each(pf_idx, 0, ldev) { 1011 + pf_mdev = ldev->pf[pf_idx].dev; 1012 + if (!pf_mdev) 1013 + continue; 1014 + 1015 + ret = get_speed(pf_mdev, &speed); 1016 + if (ret) { 1017 + mlx5_core_dbg(pf_mdev, 1018 + "Failed to get device speed using %ps. Device %s speed is not available (err=%d)\n", 1019 + get_speed, dev_name(pf_mdev->device), 1020 + ret); 1021 + return ret; 1022 + } 1023 + 1024 + *sum_speed += speed; 1025 + } 1026 + 1027 + return 0; 1028 + } 1029 + 1030 + static int mlx5_lag_sum_devices_max_speed(struct mlx5_lag *ldev, u32 *max_speed) 1031 + { 1032 + return mlx5_lag_sum_devices_speed(ldev, max_speed, 1033 + mlx5_port_max_linkspeed); 1034 + } 1035 + 1036 + static int mlx5_lag_sum_devices_oper_speed(struct mlx5_lag *ldev, 1037 + u32 *oper_speed) 1038 + { 1039 + return mlx5_lag_sum_devices_speed(ldev, oper_speed, 1040 + mlx5_port_oper_linkspeed); 1041 + } 1042 + 1043 + static void mlx5_lag_modify_device_vports_speed(struct mlx5_core_dev *mdev, 1044 + u32 speed) 1045 + { 1046 + u16 op_mod = MLX5_VPORT_STATE_OP_MOD_ESW_VPORT; 1047 + struct mlx5_eswitch *esw = mdev->priv.eswitch; 1048 + struct mlx5_vport *vport; 1049 + unsigned long i; 1050 + int ret; 1051 + 1052 + if (!esw) 1053 + return; 1054 + 1055 + if (!MLX5_CAP_ESW(mdev, esw_vport_state_max_tx_speed)) 1056 + return; 1057 + 1058 + mlx5_esw_for_each_vport(esw, i, vport) { 1059 + if (!vport) 1060 + continue; 1061 + 1062 + if (vport->vport == MLX5_VPORT_UPLINK) 1063 + continue; 1064 + 1065 + ret = mlx5_modify_vport_max_tx_speed(mdev, op_mod, 1066 + vport->vport, true, speed); 1067 + if (ret) 1068 + mlx5_core_dbg(mdev, 1069 + "Failed to set vport %d speed %d, err=%d\n", 1070 + vport->vport, speed, ret); 1071 + } 1072 + } 1073 + 1074 + void mlx5_lag_set_vports_agg_speed(struct mlx5_lag *ldev) 1075 + { 1076 + struct mlx5_core_dev *mdev; 1077 + u32 speed; 1078 + int pf_idx; 1079 + 1080 + if (ldev->mode == MLX5_LAG_MODE_MPESW) { 1081 + if (mlx5_lag_sum_devices_oper_speed(ldev, &speed)) 1082 + return; 1083 + } else { 1084 + speed = ldev->tracker.bond_speed_mbps; 1085 + if (speed == SPEED_UNKNOWN) 1086 + return; 1087 + } 1088 + 1089 + /* If speed is not set, use the sum of max speeds of all PFs */ 1090 + if (!speed && mlx5_lag_sum_devices_max_speed(ldev, &speed)) 1091 + return; 1092 + 1093 + speed = speed / MLX5_MAX_TX_SPEED_UNIT; 1094 + 1095 + mlx5_ldev_for_each(pf_idx, 0, ldev) { 1096 + mdev = ldev->pf[pf_idx].dev; 1097 + if (!mdev) 1098 + continue; 1099 + 1100 + mlx5_lag_modify_device_vports_speed(mdev, speed); 1101 + } 1102 + } 1103 + 1104 + void mlx5_lag_reset_vports_speed(struct mlx5_lag *ldev) 1105 + { 1106 + struct mlx5_core_dev *mdev; 1107 + u32 speed; 1108 + int pf_idx; 1109 + int ret; 1110 + 1111 + mlx5_ldev_for_each(pf_idx, 0, ldev) { 1112 + mdev = ldev->pf[pf_idx].dev; 1113 + if (!mdev) 1114 + continue; 1115 + 1116 + ret = mlx5_port_oper_linkspeed(mdev, &speed); 1117 + if (ret) { 1118 + mlx5_core_dbg(mdev, 1119 + "Failed to reset vports speed for device %s. Oper speed is not available (err=%d)\n", 1120 + dev_name(mdev->device), ret); 1121 + continue; 1122 + } 1123 + 1124 + speed = speed / MLX5_MAX_TX_SPEED_UNIT; 1125 + mlx5_lag_modify_device_vports_speed(mdev, speed); 1126 + } 1127 + } 1128 + #endif 1129 + 1011 1130 static void mlx5_do_bond(struct mlx5_lag *ldev) 1012 1131 { 1013 1132 int idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1); ··· 1226 1083 ndev); 1227 1084 dev_put(ndev); 1228 1085 } 1086 + mlx5_lag_set_vports_agg_speed(ldev); 1229 1087 } else if (mlx5_lag_should_modify_lag(ldev, do_bond)) { 1230 1088 mlx5_modify_lag(ldev, &tracker); 1089 + mlx5_lag_set_vports_agg_speed(ldev); 1231 1090 } else if (mlx5_lag_should_disable_lag(ldev, do_bond)) { 1091 + mlx5_lag_reset_vports_speed(ldev); 1232 1092 mlx5_disable_lag(ldev); 1233 1093 } 1234 1094 } ··· 1432 1286 return 1; 1433 1287 } 1434 1288 1289 + static void mlx5_lag_update_tracker_speed(struct lag_tracker *tracker, 1290 + struct net_device *ndev) 1291 + { 1292 + struct ethtool_link_ksettings lksettings; 1293 + struct net_device *bond_dev; 1294 + int err; 1295 + 1296 + if (netif_is_lag_master(ndev)) 1297 + bond_dev = ndev; 1298 + else 1299 + bond_dev = netdev_master_upper_dev_get(ndev); 1300 + 1301 + if (!bond_dev) { 1302 + tracker->bond_speed_mbps = SPEED_UNKNOWN; 1303 + return; 1304 + } 1305 + 1306 + err = __ethtool_get_link_ksettings(bond_dev, &lksettings); 1307 + if (err) { 1308 + netdev_dbg(bond_dev, 1309 + "Failed to get speed for bond dev %s, err=%d\n", 1310 + bond_dev->name, err); 1311 + tracker->bond_speed_mbps = SPEED_UNKNOWN; 1312 + return; 1313 + } 1314 + 1315 + if (lksettings.base.speed == SPEED_UNKNOWN) 1316 + tracker->bond_speed_mbps = 0; 1317 + else 1318 + tracker->bond_speed_mbps = lksettings.base.speed; 1319 + } 1320 + 1321 + /* Returns speed in Mbps. */ 1322 + int mlx5_lag_query_bond_speed(struct mlx5_core_dev *mdev, u32 *speed) 1323 + { 1324 + struct mlx5_lag *ldev; 1325 + unsigned long flags; 1326 + int ret = 0; 1327 + 1328 + spin_lock_irqsave(&lag_lock, flags); 1329 + ldev = mlx5_lag_dev(mdev); 1330 + if (!ldev) { 1331 + ret = -ENODEV; 1332 + goto unlock; 1333 + } 1334 + 1335 + *speed = ldev->tracker.bond_speed_mbps; 1336 + 1337 + if (*speed == SPEED_UNKNOWN) { 1338 + mlx5_core_dbg(mdev, "Bond speed is unknown\n"); 1339 + ret = -EINVAL; 1340 + } 1341 + 1342 + unlock: 1343 + spin_unlock_irqrestore(&lag_lock, flags); 1344 + return ret; 1345 + } 1346 + EXPORT_SYMBOL_GPL(mlx5_lag_query_bond_speed); 1347 + 1435 1348 /* this handler is always registered to netdev events */ 1436 1349 static int mlx5_lag_netdev_event(struct notifier_block *this, 1437 1350 unsigned long event, void *ptr) ··· 1521 1316 changed = mlx5_handle_changeinfodata_event(ldev, &tracker, ndev); 1522 1317 break; 1523 1318 } 1319 + 1320 + if (changed) 1321 + mlx5_lag_update_tracker_speed(&tracker, ndev); 1524 1322 1525 1323 ldev->tracker = tracker; 1526 1324 ··· 1570 1362 1571 1363 ldev->pf[fn].dev = dev; 1572 1364 dev->priv.lag = ldev; 1365 + 1366 + MLX5_NB_INIT(&ldev->pf[fn].port_change_nb, 1367 + mlx5_lag_mpesw_port_change_event, PORT_CHANGE); 1368 + mlx5_eq_notifier_register(dev, &ldev->pf[fn].port_change_nb); 1573 1369 } 1574 1370 1575 1371 static void mlx5_ldev_remove_mdev(struct mlx5_lag *ldev, ··· 1584 1372 fn = mlx5_get_dev_index(dev); 1585 1373 if (ldev->pf[fn].dev != dev) 1586 1374 return; 1375 + 1376 + if (ldev->pf[fn].port_change_nb.nb.notifier_call) 1377 + mlx5_eq_notifier_unregister(dev, &ldev->pf[fn].port_change_nb); 1587 1378 1588 1379 ldev->pf[fn].dev = NULL; 1589 1380 dev->priv.lag = NULL;
+11
drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h
··· 39 39 struct mlx5_core_dev *dev; 40 40 struct net_device *netdev; 41 41 bool has_drop; 42 + struct mlx5_nb port_change_nb; 42 43 }; 43 44 44 45 /* Used for collection of netdev event info. */ ··· 49 48 unsigned int is_bonded:1; 50 49 unsigned int has_inactive:1; 51 50 enum netdev_lag_hash hash_type; 51 + u32 bond_speed_mbps; 52 52 }; 53 53 54 54 /* LAG data of a ConnectX card. ··· 68 66 struct lag_tracker tracker; 69 67 struct workqueue_struct *wq; 70 68 struct delayed_work bond_work; 69 + struct work_struct speed_update_work; 71 70 struct notifier_block nb; 72 71 possible_net_t net; 73 72 struct lag_mp lag_mp; ··· 118 115 int mlx5_deactivate_lag(struct mlx5_lag *ldev); 119 116 void mlx5_lag_add_devices(struct mlx5_lag *ldev); 120 117 struct mlx5_devcom_comp_dev *mlx5_lag_get_devcom_comp(struct mlx5_lag *ldev); 118 + 119 + #ifdef CONFIG_MLX5_ESWITCH 120 + void mlx5_lag_set_vports_agg_speed(struct mlx5_lag *ldev); 121 + void mlx5_lag_reset_vports_speed(struct mlx5_lag *ldev); 122 + #else 123 + static inline void mlx5_lag_set_vports_agg_speed(struct mlx5_lag *ldev) {} 124 + static inline void mlx5_lag_reset_vports_speed(struct mlx5_lag *ldev) {} 125 + #endif 121 126 122 127 static inline bool mlx5_lag_is_supported(struct mlx5_core_dev *dev) 123 128 {
+39
drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c
··· 110 110 goto err_rescan_drivers; 111 111 } 112 112 113 + mlx5_lag_set_vports_agg_speed(ldev); 114 + 113 115 return 0; 114 116 115 117 err_rescan_drivers: ··· 225 223 return ldev && ldev->mode == MLX5_LAG_MODE_MPESW; 226 224 } 227 225 EXPORT_SYMBOL(mlx5_lag_is_mpesw); 226 + 227 + void mlx5_mpesw_speed_update_work(struct work_struct *work) 228 + { 229 + struct mlx5_lag *ldev = container_of(work, struct mlx5_lag, 230 + speed_update_work); 231 + 232 + mutex_lock(&ldev->lock); 233 + if (ldev->mode == MLX5_LAG_MODE_MPESW) { 234 + if (ldev->mode_changes_in_progress) 235 + queue_work(ldev->wq, &ldev->speed_update_work); 236 + else 237 + mlx5_lag_set_vports_agg_speed(ldev); 238 + } 239 + 240 + mutex_unlock(&ldev->lock); 241 + } 242 + 243 + int mlx5_lag_mpesw_port_change_event(struct notifier_block *nb, 244 + unsigned long event, void *data) 245 + { 246 + struct mlx5_nb *mlx5_nb = container_of(nb, struct mlx5_nb, nb); 247 + struct lag_func *lag_func = container_of(mlx5_nb, 248 + struct lag_func, 249 + port_change_nb); 250 + struct mlx5_core_dev *dev = lag_func->dev; 251 + struct mlx5_lag *ldev = dev->priv.lag; 252 + struct mlx5_eqe *eqe = data; 253 + 254 + if (!ldev) 255 + return NOTIFY_DONE; 256 + 257 + if (eqe->sub_type == MLX5_PORT_CHANGE_SUBTYPE_DOWN || 258 + eqe->sub_type == MLX5_PORT_CHANGE_SUBTYPE_ACTIVE) 259 + queue_work(ldev->wq, &ldev->speed_update_work); 260 + 261 + return NOTIFY_OK; 262 + }
+14
drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.h
··· 32 32 void mlx5_lag_mpesw_disable(struct mlx5_core_dev *dev); 33 33 int mlx5_lag_mpesw_enable(struct mlx5_core_dev *dev); 34 34 35 + #ifdef CONFIG_MLX5_ESWITCH 36 + void mlx5_mpesw_speed_update_work(struct work_struct *work); 37 + int mlx5_lag_mpesw_port_change_event(struct notifier_block *nb, 38 + unsigned long event, void *data); 39 + #else 40 + static inline void mlx5_mpesw_speed_update_work(struct work_struct *work) {} 41 + static inline int mlx5_lag_mpesw_port_change_event(struct notifier_block *nb, 42 + unsigned long event, 43 + void *data) 44 + { 45 + return NOTIFY_DONE; 46 + } 47 + #endif /* CONFIG_MLX5_ESWITCH */ 48 + 35 49 #endif /* __MLX5_LAG_MPESW_H__ */
+1
drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
··· 381 381 u32 mlx5_port_info2linkmodes(struct mlx5_core_dev *mdev, 382 382 struct mlx5_link_info *info, 383 383 bool force_legacy); 384 + int mlx5_port_oper_linkspeed(struct mlx5_core_dev *mdev, u32 *speed); 384 385 int mlx5_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed); 385 386 386 387 #define MLX5_PPS_CAP(mdev) (MLX5_CAP_GEN((mdev), pps) && \
+24
drivers/net/ethernet/mellanox/mlx5/core/port.c
··· 1203 1203 return link_modes; 1204 1204 } 1205 1205 1206 + int mlx5_port_oper_linkspeed(struct mlx5_core_dev *mdev, u32 *speed) 1207 + { 1208 + const struct mlx5_link_info *table; 1209 + struct mlx5_port_eth_proto eproto; 1210 + u32 oper_speed = 0; 1211 + u32 max_size; 1212 + bool ext; 1213 + int err; 1214 + int i; 1215 + 1216 + ext = mlx5_ptys_ext_supported(mdev); 1217 + err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto); 1218 + if (err) 1219 + return err; 1220 + 1221 + mlx5e_port_get_link_mode_info_arr(mdev, &table, &max_size, false); 1222 + for (i = 0; i < max_size; ++i) 1223 + if (eproto.oper & MLX5E_PROT_MASK(i)) 1224 + oper_speed = max(oper_speed, table[i].speed); 1225 + 1226 + *speed = oper_speed; 1227 + return 0; 1228 + } 1229 + 1206 1230 int mlx5_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed) 1207 1231 { 1208 1232 const struct mlx5_link_info *table;
+74
drivers/net/ethernet/mellanox/mlx5/core/vport.c
··· 62 62 return MLX5_GET(query_vport_state_out, out, state); 63 63 } 64 64 65 + static int mlx5_query_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod, 66 + u16 vport, u8 other_vport, 67 + u8 *admin_state) 68 + { 69 + u32 out[MLX5_ST_SZ_DW(query_vport_state_out)] = {}; 70 + u32 in[MLX5_ST_SZ_DW(query_vport_state_in)] = {}; 71 + int err; 72 + 73 + MLX5_SET(query_vport_state_in, in, opcode, 74 + MLX5_CMD_OP_QUERY_VPORT_STATE); 75 + MLX5_SET(query_vport_state_in, in, op_mod, opmod); 76 + MLX5_SET(query_vport_state_in, in, vport_number, vport); 77 + MLX5_SET(query_vport_state_in, in, other_vport, other_vport); 78 + 79 + err = mlx5_cmd_exec_inout(mdev, query_vport_state, in, out); 80 + if (err) 81 + return err; 82 + 83 + *admin_state = MLX5_GET(query_vport_state_out, out, admin_state); 84 + return 0; 85 + } 86 + 65 87 int mlx5_modify_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod, 66 88 u16 vport, u8 other_vport, u8 state) 67 89 { ··· 98 76 99 77 return mlx5_cmd_exec_in(mdev, modify_vport_state, in); 100 78 } 79 + 80 + int mlx5_modify_vport_max_tx_speed(struct mlx5_core_dev *mdev, u8 opmod, 81 + u16 vport, u8 other_vport, u16 max_tx_speed) 82 + { 83 + u32 in[MLX5_ST_SZ_DW(modify_vport_state_in)] = {}; 84 + u8 admin_state; 85 + int err; 86 + 87 + err = mlx5_query_vport_admin_state(mdev, opmod, vport, other_vport, 88 + &admin_state); 89 + if (err) 90 + return err; 91 + 92 + MLX5_SET(modify_vport_state_in, in, opcode, 93 + MLX5_CMD_OP_MODIFY_VPORT_STATE); 94 + MLX5_SET(modify_vport_state_in, in, op_mod, opmod); 95 + MLX5_SET(modify_vport_state_in, in, vport_number, vport); 96 + MLX5_SET(modify_vport_state_in, in, other_vport, other_vport); 97 + MLX5_SET(modify_vport_state_in, in, admin_state, admin_state); 98 + MLX5_SET(modify_vport_state_in, in, max_tx_speed, max_tx_speed); 99 + 100 + return mlx5_cmd_exec_in(mdev, modify_vport_state, in); 101 + } 102 + 103 + int mlx5_query_vport_max_tx_speed(struct mlx5_core_dev *mdev, u8 op_mod, 104 + u16 vport, u8 other_vport, u32 *max_tx_speed) 105 + { 106 + u32 out[MLX5_ST_SZ_DW(query_vport_state_out)] = {}; 107 + u32 in[MLX5_ST_SZ_DW(query_vport_state_in)] = {}; 108 + u32 state; 109 + int err; 110 + 111 + MLX5_SET(query_vport_state_in, in, opcode, 112 + MLX5_CMD_OP_QUERY_VPORT_STATE); 113 + MLX5_SET(query_vport_state_in, in, op_mod, op_mod); 114 + MLX5_SET(query_vport_state_in, in, vport_number, vport); 115 + MLX5_SET(query_vport_state_in, in, other_vport, other_vport); 116 + 117 + err = mlx5_cmd_exec_inout(mdev, query_vport_state, in, out); 118 + if (err) 119 + return err; 120 + 121 + state = MLX5_GET(query_vport_state_out, out, state); 122 + if (state == VPORT_STATE_DOWN) { 123 + *max_tx_speed = 0; 124 + return 0; 125 + } 126 + 127 + *max_tx_speed = MLX5_GET(query_vport_state_out, out, max_tx_speed); 128 + return 0; 129 + } 130 + EXPORT_SYMBOL_GPL(mlx5_query_vport_max_tx_speed); 101 131 102 132 static int mlx5_query_nic_vport_context(struct mlx5_core_dev *mdev, u16 vport, 103 133 bool other_vport, u32 *out)
+1
include/linux/mlx5/driver.h
··· 1149 1149 bool mlx5_lag_is_roce(struct mlx5_core_dev *dev); 1150 1150 bool mlx5_lag_is_sriov(struct mlx5_core_dev *dev); 1151 1151 bool mlx5_lag_is_active(struct mlx5_core_dev *dev); 1152 + int mlx5_lag_query_bond_speed(struct mlx5_core_dev *dev, u32 *speed); 1152 1153 bool mlx5_lag_mode_is_hash(struct mlx5_core_dev *dev); 1153 1154 bool mlx5_lag_is_master(struct mlx5_core_dev *dev); 1154 1155 bool mlx5_lag_is_shared_fdb(struct mlx5_core_dev *dev);
+10 -6
include/linux/mlx5/mlx5_ifc.h
··· 1071 1071 u8 esw_shared_ingress_acl[0x1]; 1072 1072 u8 esw_uplink_ingress_acl[0x1]; 1073 1073 u8 root_ft_on_other_esw[0x1]; 1074 - u8 reserved_at_a[0xf]; 1074 + u8 reserved_at_a[0x1]; 1075 + u8 esw_vport_state_max_tx_speed[0x1]; 1076 + u8 reserved_at_c[0xd]; 1075 1077 u8 esw_functions_changed[0x1]; 1076 1078 u8 reserved_at_1a[0x1]; 1077 1079 u8 ecpf_vport_exists[0x1]; ··· 5447 5445 5448 5446 u8 reserved_at_40[0x20]; 5449 5447 5450 - u8 reserved_at_60[0x18]; 5448 + u8 max_tx_speed[0x10]; 5449 + u8 reserved_at_70[0x8]; 5451 5450 u8 admin_state[0x4]; 5452 5451 u8 state[0x4]; 5453 5452 }; ··· 7781 7778 u8 reserved_at_41[0xf]; 7782 7779 u8 vport_number[0x10]; 7783 7780 7784 - u8 reserved_at_60[0x10]; 7781 + u8 max_tx_speed[0x10]; 7785 7782 u8 ingress_connect[0x1]; 7786 7783 u8 egress_connect[0x1]; 7787 7784 u8 ingress_connect_valid[0x1]; ··· 11009 11006 }; 11010 11007 11011 11008 struct mlx5_ifc_qcam_qos_feature_cap_mask { 11012 - u8 qcam_qos_feature_cap_mask_127_to_1[0x7F]; 11009 + u8 qcam_qos_feature_cap_mask_127_to_5[0x7B]; 11010 + u8 qetcr_qshr_max_bw_val_msb[0x1]; 11011 + u8 qcam_qos_feature_cap_mask_3_to_1[0x3]; 11013 11012 u8 qpts_trust_both[0x1]; 11014 11013 }; 11015 11014 ··· 11967 11962 11968 11963 u8 reserved_at_20[0xc]; 11969 11964 u8 max_bw_units[0x4]; 11970 - u8 reserved_at_30[0x8]; 11971 - u8 max_bw_value[0x8]; 11965 + u8 max_bw_value[0x10]; 11972 11966 }; 11973 11967 11974 11968 struct mlx5_ifc_ets_global_config_reg_bits {
+6
include/linux/mlx5/vport.h
··· 41 41 (MLX5_CAP_GEN(mdev, port_type) == MLX5_CAP_PORT_TYPE_ETH) && \ 42 42 mlx5_core_is_pf(mdev)) 43 43 44 + #define MLX5_MAX_TX_SPEED_UNIT 100 45 + 44 46 enum { 45 47 MLX5_CAP_INLINE_MODE_L2, 46 48 MLX5_CAP_INLINE_MODE_VPORT_CONTEXT, ··· 60 58 u8 mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport); 61 59 int mlx5_modify_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod, 62 60 u16 vport, u8 other_vport, u8 state); 61 + int mlx5_query_vport_max_tx_speed(struct mlx5_core_dev *mdev, u8 op_mod, 62 + u16 vport, u8 other_vport, u32 *max_tx_speed); 63 + int mlx5_modify_vport_max_tx_speed(struct mlx5_core_dev *mdev, u8 opmod, 64 + u16 vport, u8 other_vport, u16 max_tx_speed); 63 65 int mlx5_query_nic_vport_mac_address(struct mlx5_core_dev *mdev, 64 66 u16 vport, bool other, u8 *addr); 65 67 int mlx5_query_mac_address(struct mlx5_core_dev *mdev, u8 *addr);