Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
RDMA/irdma: Provide scratch buffers to firmware for internal use
For GEN3 and higher, FW requires scratch buffers for bookkeeping
during cleanup, specifically during QP and MR destroy ops.
Signed-off-by: Jay Bhat <jay.bhat@intel.com>
Signed-off-by: Tatyana Nikolova <tatyana.e.nikolova@intel.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
authored by
Jay Bhat
and committed by
Leon Romanovsky
9d6ba4ce
5aeb6e03
+61
-3
+42
-1
drivers/infiniband/hw/irdma/ctrl.c
+42
-1
drivers/infiniband/hw/irdma/ctrl.c
···
3570
3570
hmc_fpm_misc->loc_mem_pages = (u32)FIELD_GET(IRDMA_QUERY_FPM_LOC_MEM_PAGES, temp);
3571
3571
if (!hmc_fpm_misc->loc_mem_pages)
3572
3572
return -EINVAL;
3573
+
3574
+
get_64bit_val(buf, 184, &temp);
3575
+
if (temp) {
3576
+
hmc_fpm_misc->fw_scratch_buf0.size = temp;
3577
+
hmc_fpm_misc->fw_scratch_buf0.va =
3578
+
dma_alloc_coherent(dev->hw->device,
3579
+
hmc_fpm_misc->fw_scratch_buf0.size,
3580
+
&hmc_fpm_misc->fw_scratch_buf0.pa,
3581
+
GFP_KERNEL);
3582
+
3583
+
if (!hmc_fpm_misc->fw_scratch_buf0.va) {
3584
+
hmc_fpm_misc->fw_scratch_buf0.size = 0;
3585
+
return -ENOMEM;
3586
+
}
3587
+
}
3588
+
get_64bit_val(buf, 192, &temp);
3589
+
if (temp) {
3590
+
hmc_fpm_misc->fw_scratch_buf1.size = temp;
3591
+
hmc_fpm_misc->fw_scratch_buf1.va =
3592
+
dma_alloc_coherent(dev->hw->device,
3593
+
hmc_fpm_misc->fw_scratch_buf1.size,
3594
+
&hmc_fpm_misc->fw_scratch_buf1.pa,
3595
+
GFP_KERNEL);
3596
+
3597
+
if (!hmc_fpm_misc->fw_scratch_buf1.va) {
3598
+
hmc_fpm_misc->fw_scratch_buf1.size = 0;
3599
+
dma_free_coherent(dev->hw->device,
3600
+
hmc_fpm_misc->fw_scratch_buf0.size,
3601
+
hmc_fpm_misc->fw_scratch_buf0.va,
3602
+
hmc_fpm_misc->fw_scratch_buf0.pa);
3603
+
hmc_fpm_misc->fw_scratch_buf0.va = NULL;
3604
+
hmc_fpm_misc->fw_scratch_buf0.size = 0;
3605
+
return -ENOMEM;
3606
+
}
3607
+
}
3573
3608
}
3574
3609
3575
3610
return 0;
···
4222
4187
4223
4188
hdr = FIELD_PREP(IRDMA_CQPSQ_BUFSIZE, IRDMA_COMMIT_FPM_BUF_SIZE) |
4224
4189
FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_COMMIT_FPM_VAL) |
4190
+
FIELD_PREP(IRDMA_CQPSQ_CFPM_FW_SCRATCH_BUF_PRESENT,
4191
+
cqp->dev->hmc_fpm_misc.fw_scratch_buf0.va != NULL) |
4225
4192
FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);
4226
4193
4227
4194
dma_wmb(); /* make sure WQE is written before valid bit is set */
···
5071
5034
5072
5035
for (offset = 0; offset < IRDMA_COMMIT_FPM_BUF_SIZE;
5073
5036
offset += sizeof(__le64)) {
5074
-
if (offset == IRDMA_PBLE_COMMIT_OFFSET)
5037
+
if (offset == IRDMA_PBLE_COMMIT_OFFSET ||
5038
+
offset == IRDMA_SCRATCH_BUF0_COMMIT_OFFSET ||
5039
+
offset == IRDMA_SCRATCH_BUF1_COMMIT_OFFSET)
5075
5040
continue;
5076
5041
get_64bit_val(buf, offset, &temp);
5077
5042
if (temp)
···
5129
5090
(u64)obj_info[IRDMA_HMC_IW_OOISC].cnt);
5130
5091
set_64bit_val(buf, 168,
5131
5092
(u64)obj_info[IRDMA_HMC_IW_OOISCFFL].cnt);
5093
+
set_64bit_val(buf, 192, dev->hmc_fpm_misc.fw_scratch_buf0.pa);
5094
+
set_64bit_val(buf, 200, dev->hmc_fpm_misc.fw_scratch_buf1.pa);
5132
5095
if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_3 &&
5133
5096
dev->hmc_fpm_misc.loc_mem_pages)
5134
5097
irdma_set_loc_mem(buf);
+4
drivers/infiniband/hw/irdma/defs.h
+4
drivers/infiniband/hw/irdma/defs.h
···
133
133
#define MAX_MR_PER_SD 0x8000
134
134
#define MAX_MR_SD_PER_FCN 0x80
135
135
#define IRDMA_PBLE_COMMIT_OFFSET 112
136
+
#define IRDMA_SCRATCH_BUF0_COMMIT_OFFSET 192
137
+
#define IRDMA_SCRATCH_BUF1_COMMIT_OFFSET 200
136
138
#define IRDMA_MAX_QUANTA_PER_WR 8
137
139
138
140
#define IRDMA_QP_SW_MAX_WQ_QUANTA 32768
···
660
658
#define IRDMA_COMMIT_FPM_QPCNT GENMASK_ULL(20, 0)
661
659
#define IRDMA_COMMIT_FPM_BASE_S 32
662
660
#define IRDMA_CQPSQ_CFPM_HMCFNID GENMASK_ULL(15, 0)
661
+
#define IRDMA_CQPSQ_CFPM_FW_SCRATCH_BUF_PRESENT_S 38
662
+
#define IRDMA_CQPSQ_CFPM_FW_SCRATCH_BUF_PRESENT BIT_ULL(38)
663
663
664
664
#define IRDMA_CQPSQ_FWQE_AECODE GENMASK_ULL(15, 0)
665
665
#define IRDMA_CQPSQ_FWQE_AESOURCE GENMASK_ULL(19, 16)
+11
drivers/infiniband/hw/irdma/hw.c
+11
drivers/infiniband/hw/irdma/hw.c
···
1693
1693
static void irdma_del_init_mem(struct irdma_pci_f *rf)
1694
1694
{
1695
1695
struct irdma_sc_dev *dev = &rf->sc_dev;
1696
+
struct irdma_dma_mem *fw_scratch_buf0;
1697
+
struct irdma_dma_mem *fw_scratch_buf1;
1696
1698
1697
1699
if (!rf->sc_dev.privileged)
1698
1700
irdma_vchnl_req_put_hmc_fcn(&rf->sc_dev);
···
1715
1713
rf->iw_msixtbl = NULL;
1716
1714
kfree(rf->hmc_info_mem);
1717
1715
rf->hmc_info_mem = NULL;
1716
+
1717
+
fw_scratch_buf0 = &dev->hmc_fpm_misc.fw_scratch_buf0;
1718
+
fw_scratch_buf1 = &dev->hmc_fpm_misc.fw_scratch_buf1;
1719
+
if (fw_scratch_buf0->va)
1720
+
dma_free_coherent(dev->hw->device, fw_scratch_buf0->size,
1721
+
fw_scratch_buf0->va, fw_scratch_buf0->pa);
1722
+
if (fw_scratch_buf1->va)
1723
+
dma_free_coherent(dev->hw->device, fw_scratch_buf1->size,
1724
+
fw_scratch_buf1->va, fw_scratch_buf1->pa);
1718
1725
}
1719
1726
1720
1727
/**
+2
drivers/infiniband/hw/irdma/type.h
+2
drivers/infiniband/hw/irdma/type.h
+2
-2
drivers/infiniband/hw/irdma/user.h
+2
-2
drivers/infiniband/hw/irdma/user.h
···
159
159
IRDMA_CEQE_SIZE = 1,
160
160
IRDMA_CQP_CTX_SIZE = 8,
161
161
IRDMA_SHADOW_AREA_SIZE = 8,
162
-
IRDMA_QUERY_FPM_BUF_SIZE = 192,
163
-
IRDMA_COMMIT_FPM_BUF_SIZE = 192,
162
+
IRDMA_QUERY_FPM_BUF_SIZE = 200,
163
+
IRDMA_COMMIT_FPM_BUF_SIZE = 208,
164
164
IRDMA_GATHER_STATS_BUF_SIZE = 1024,
165
165
IRDMA_MIN_IW_QP_ID = 0,
166
166
IRDMA_MAX_IW_QP_ID = 262143,