+1 -24

Documentation/devicetree/bindings/net/ethernet-controller.yaml

reviewed

··· 16 16 label: 17 17 description: Human readable label on a port of a box. 18 18 19 19 - local-mac-address: 20 20 - description: 21 21 - Specifies the MAC address that was assigned to the network device. 22 22 - $ref: /schemas/types.yaml#/definitions/uint8-array 23 23 - minItems: 6 24 24 - maxItems: 6 25 25 - 26 26 - mac-address: 27 27 - description: 28 28 - Specifies the MAC address that was last used by the boot 29 29 - program; should be used in cases where the MAC address assigned 30 30 - to the device by the boot program is different from the 31 31 - local-mac-address property. 32 32 - $ref: /schemas/types.yaml#/definitions/uint8-array 33 33 - minItems: 6 34 34 - maxItems: 6 35 35 - 36 36 - max-frame-size: 37 37 - $ref: /schemas/types.yaml#/definitions/uint32 38 38 - description: 39 39 - Maximum transfer unit (IEEE defined MTU), rather than the 40 40 - maximum frame size (there\'s contradiction in the Devicetree 41 41 - Specification). 42 42 - 43 19 max-speed: 44 20 $ref: /schemas/types.yaml#/definitions/uint32 45 21 description: ··· 238 262 pcs-handle-names: [pcs-handle] 239 263 240 264 allOf: 265 265 + - $ref: /schemas/net/network-class.yaml# 241 266 - if: 242 267 properties: 243 268 phy-mode:

+46

Documentation/devicetree/bindings/net/network-class.yaml

reviewed

··· 1 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 2 + %YAML 1.2 3 3 + --- 4 4 + $id: http://devicetree.org/schemas/net/network-class.yaml# 5 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 + 7 7 + title: Network Class Common Properties 8 8 + 9 9 + maintainers: 10 10 + - Devicetree Specification Mailing List <devicetree-spec@vger.kernel.org> 11 11 + 12 12 + properties: 13 13 + address-bits: 14 14 + description: 15 15 + Specifies number of address bits required to address the device 16 16 + described by this node, e.g. size of the MAC address. 17 17 + default: 48 18 18 + const: 48 19 19 + 20 20 + local-mac-address: 21 21 + description: 22 22 + Specifies MAC address that was assigned to the network device described by 23 23 + the node containing this property. 24 24 + $ref: /schemas/types.yaml#/definitions/uint8-array 25 25 + minItems: 6 26 26 + maxItems: 6 27 27 + 28 28 + mac-address: 29 29 + description: 30 30 + Specifies the MAC address that was last used by the boot program. This 31 31 + property should be used in cases where the MAC address assigned to the 32 32 + device by the boot program is different from the 33 33 + local-mac-address property. This property shall be used only if the value 34 34 + differs from local-mac-address property value. 35 35 + $ref: /schemas/types.yaml#/definitions/uint8-array 36 36 + minItems: 6 37 37 + maxItems: 6 38 38 + 39 39 + max-frame-size: 40 40 + $ref: /schemas/types.yaml#/definitions/uint32 41 41 + description: 42 42 + Maximum transfer unit (IEEE defined MTU), rather than the 43 43 + maximum frame size (there\'s contradiction in the Devicetree 44 44 + Specification). 45 45 + 46 46 + additionalProperties: true

+1 -1

Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml

reviewed

··· 16 16 binding. 17 17 18 18 allOf: 19 19 - - $ref: ieee80211.yaml# 19 19 + - $ref: /schemas/net/wireless/wireless-controller.yaml# 20 20 21 21 properties: 22 22 compatible:

+315

Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml

reviewed

··· 1 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 2 + # Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. 3 3 + %YAML 1.2 4 4 + --- 5 5 + $id: http://devicetree.org/schemas/net/wireless/qcom,ipq5332-wifi.yaml# 6 6 + $schema: http://devicetree.org/meta-schemas/core.yaml# 7 7 + 8 8 + title: Qualcomm Technologies ath12k wireless devices (AHB) 9 9 + 10 10 + maintainers: 11 11 + - Jeff Johnson <jjohnson@kernel.org> 12 12 + 13 13 + description: 14 14 + Qualcomm Technologies IEEE 802.11be AHB devices. 15 15 + 16 16 + properties: 17 17 + compatible: 18 18 + enum: 19 19 + - qcom,ipq5332-wifi 20 20 + 21 21 + reg: 22 22 + maxItems: 1 23 23 + 24 24 + clocks: 25 25 + items: 26 26 + - description: XO clock used for copy engine 27 27 + 28 28 + clock-names: 29 29 + items: 30 30 + - const: xo 31 31 + 32 32 + interrupts: 33 33 + items: 34 34 + - description: Fatal interrupt 35 35 + - description: Ready interrupt 36 36 + - description: Spawn acknowledge interrupt 37 37 + - description: Stop acknowledge interrupt 38 38 + - description: misc-pulse1 interrupt events 39 39 + - description: misc-latch interrupt events 40 40 + - description: sw exception interrupt events 41 41 + - description: interrupt event for ring CE0 42 42 + - description: interrupt event for ring CE1 43 43 + - description: interrupt event for ring CE2 44 44 + - description: interrupt event for ring CE3 45 45 + - description: interrupt event for ring CE4 46 46 + - description: interrupt event for ring CE5 47 47 + - description: interrupt event for ring CE6 48 48 + - description: interrupt event for ring CE7 49 49 + - description: interrupt event for ring CE8 50 50 + - description: interrupt event for ring CE9 51 51 + - description: interrupt event for ring CE10 52 52 + - description: interrupt event for ring CE11 53 53 + - description: interrupt event for ring host2wbm-desc-feed 54 54 + - description: interrupt event for ring host2reo-re-injection 55 55 + - description: interrupt event for ring host2reo-command 56 56 + - description: interrupt event for ring host2rxdma-monitor-ring1 57 57 + - description: interrupt event for ring reo2ost-exception 58 58 + - description: interrupt event for ring wbm2host-rx-release 59 59 + - description: interrupt event for ring reo2host-status 60 60 + - description: interrupt event for ring reo2host-destination-ring4 61 61 + - description: interrupt event for ring reo2host-destination-ring3 62 62 + - description: interrupt event for ring reo2host-destination-ring2 63 63 + - description: interrupt event for ring reo2host-destination-ring1 64 64 + - description: interrupt event for ring rxdma2host-monitor-destination-mac3 65 65 + - description: interrupt event for ring rxdma2host-monitor-destination-mac2 66 66 + - description: interrupt event for ring rxdma2host-monitor-destination-mac1 67 67 + - description: interrupt event for ring host2rxdma-host-buf-ring-mac3 68 68 + - description: interrupt event for ring host2rxdma-host-buf-ring-mac2 69 69 + - description: interrupt event for ring host2rxdma-host-buf-ring-mac1 70 70 + - description: interrupt event for ring host2tcl-input-ring4 71 71 + - description: interrupt event for ring host2tcl-input-ring3 72 72 + - description: interrupt event for ring host2tcl-input-ring2 73 73 + - description: interrupt event for ring host2tcl-input-ring1 74 74 + - description: interrupt event for ring wbm2host-tx-completions-ring4 75 75 + - description: interrupt event for ring wbm2host-tx-completions-ring3 76 76 + - description: interrupt event for ring wbm2host-tx-completions-ring2 77 77 + - description: interrupt event for ring wbm2host-tx-completions-ring1 78 78 + - description: interrupt event for ring host2tx-monitor-ring1 79 79 + - description: interrupt event for ring txmon2host-monitor-destination-mac3 80 80 + - description: interrupt event for ring txmon2host-monitor-destination-mac2 81 81 + - description: interrupt event for ring txmon2host-monitor-destination-mac1 82 82 + - description: interrupt event for umac-reset 83 83 + 84 84 + interrupt-names: 85 85 + items: 86 86 + - const: fatal 87 87 + - const: ready 88 88 + - const: spawn 89 89 + - const: stop-ack 90 90 + - const: misc-pulse1 91 91 + - const: misc-latch 92 92 + - const: sw-exception 93 93 + - const: ce0 94 94 + - const: ce1 95 95 + - const: ce2 96 96 + - const: ce3 97 97 + - const: ce4 98 98 + - const: ce5 99 99 + - const: ce6 100 100 + - const: ce7 101 101 + - const: ce8 102 102 + - const: ce9 103 103 + - const: ce10 104 104 + - const: ce11 105 105 + - const: host2wbm-desc-feed 106 106 + - const: host2reo-re-injection 107 107 + - const: host2reo-command 108 108 + - const: host2rxdma-monitor-ring1 109 109 + - const: reo2ost-exception 110 110 + - const: wbm2host-rx-release 111 111 + - const: reo2host-status 112 112 + - const: reo2host-destination-ring4 113 113 + - const: reo2host-destination-ring3 114 114 + - const: reo2host-destination-ring2 115 115 + - const: reo2host-destination-ring1 116 116 + - const: rxdma2host-monitor-destination-mac3 117 117 + - const: rxdma2host-monitor-destination-mac2 118 118 + - const: rxdma2host-monitor-destination-mac1 119 119 + - const: host2rxdma-host-buf-ring-mac3 120 120 + - const: host2rxdma-host-buf-ring-mac2 121 121 + - const: host2rxdma-host-buf-ring-mac1 122 122 + - const: host2tcl-input-ring4 123 123 + - const: host2tcl-input-ring3 124 124 + - const: host2tcl-input-ring2 125 125 + - const: host2tcl-input-ring1 126 126 + - const: wbm2host-tx-completions-ring4 127 127 + - const: wbm2host-tx-completions-ring3 128 128 + - const: wbm2host-tx-completions-ring2 129 129 + - const: wbm2host-tx-completions-ring1 130 130 + - const: host2tx-monitor-ring1 131 131 + - const: txmon2host-monitor-destination-mac3 132 132 + - const: txmon2host-monitor-destination-mac2 133 133 + - const: txmon2host-monitor-destination-mac1 134 134 + - const: umac-reset 135 135 + 136 136 + memory-region: 137 137 + description: 138 138 + Memory regions used by the ath12k firmware. 139 139 + items: 140 140 + - description: Q6 memory region 141 141 + - description: m3 dump memory region 142 142 + - description: Q6 caldata memory region 143 143 + - description: Multi Link Operation (MLO) Global memory region 144 144 + 145 145 + memory-region-names: 146 146 + items: 147 147 + - const: q6-region 148 148 + - const: m3-dump 149 149 + - const: q6-caldb 150 150 + - const: mlo-global-mem 151 151 + 152 152 + qcom,calibration-variant: 153 153 + $ref: /schemas/types.yaml#/definitions/string 154 154 + description: 155 155 + String to uniquely identify variant of the calibration data for designs 156 156 + with colliding bus and device ids 157 157 + 158 158 + qcom,rproc: 159 159 + $ref: /schemas/types.yaml#/definitions/phandle 160 160 + description: 161 161 + Phandle to the Qualcomm Hexagon DSP(q6 remote processor), which is utilized 162 162 + for offloading WiFi processing tasks, this q6 remote processor operates in 163 163 + conjunction with WiFi. 164 164 + 165 165 + qcom,smem-states: 166 166 + $ref: /schemas/types.yaml#/definitions/phandle-array 167 167 + description: States used by the AP to signal the remote processor 168 168 + items: 169 169 + - description: Shutdown WCSS pd 170 170 + - description: Stop WCSS pd 171 171 + - description: Spawn WCSS pd 172 172 + 173 173 + qcom,smem-state-names: 174 174 + description: 175 175 + Names of the states used by the AP to signal the remote processor 176 176 + items: 177 177 + - const: shutdown 178 178 + - const: stop 179 179 + - const: spawn 180 180 + 181 181 + required: 182 182 + - compatible 183 183 + - reg 184 184 + - clocks 185 185 + - clock-names 186 186 + - interrupts 187 187 + - interrupt-names 188 188 + - memory-region 189 189 + - memory-region-names 190 190 + - qcom,rproc 191 191 + - qcom,smem-states 192 192 + - qcom,smem-state-names 193 193 + 194 194 + additionalProperties: false 195 195 + 196 196 + examples: 197 197 + - | 198 198 + #include <dt-bindings/interrupt-controller/arm-gic.h> 199 199 + #include <dt-bindings/clock/qcom,ipq5332-gcc.h> 200 200 + 201 201 + wifi0: wifi@c000000 { 202 202 + compatible = "qcom,ipq5332-wifi"; 203 203 + reg = <0x0c000000 0x1000000>; 204 204 + clocks = <&gcc GCC_XO_CLK>; 205 205 + clock-names = "xo"; 206 206 + interrupts-extended = <&wcss_smp2p_in 8 IRQ_TYPE_NONE>, 207 207 + <&wcss_smp2p_in 9 IRQ_TYPE_NONE>, 208 208 + <&wcss_smp2p_in 12 IRQ_TYPE_NONE>, 209 209 + <&wcss_smp2p_in 11 IRQ_TYPE_NONE>, 210 210 + <&intc GIC_SPI 559 IRQ_TYPE_EDGE_RISING>, 211 211 + <&intc GIC_SPI 560 IRQ_TYPE_EDGE_RISING>, 212 212 + <&intc GIC_SPI 561 IRQ_TYPE_EDGE_RISING>, 213 213 + <&intc GIC_SPI 422 IRQ_TYPE_EDGE_RISING>, 214 214 + <&intc GIC_SPI 423 IRQ_TYPE_EDGE_RISING>, 215 215 + <&intc GIC_SPI 424 IRQ_TYPE_EDGE_RISING>, 216 216 + <&intc GIC_SPI 425 IRQ_TYPE_EDGE_RISING>, 217 217 + <&intc GIC_SPI 426 IRQ_TYPE_EDGE_RISING>, 218 218 + <&intc GIC_SPI 427 IRQ_TYPE_EDGE_RISING>, 219 219 + <&intc GIC_SPI 428 IRQ_TYPE_EDGE_RISING>, 220 220 + <&intc GIC_SPI 429 IRQ_TYPE_EDGE_RISING>, 221 221 + <&intc GIC_SPI 430 IRQ_TYPE_EDGE_RISING>, 222 222 + <&intc GIC_SPI 431 IRQ_TYPE_EDGE_RISING>, 223 223 + <&intc GIC_SPI 432 IRQ_TYPE_EDGE_RISING>, 224 224 + <&intc GIC_SPI 433 IRQ_TYPE_EDGE_RISING>, 225 225 + <&intc GIC_SPI 491 IRQ_TYPE_EDGE_RISING>, 226 226 + <&intc GIC_SPI 495 IRQ_TYPE_EDGE_RISING>, 227 227 + <&intc GIC_SPI 493 IRQ_TYPE_EDGE_RISING>, 228 228 + <&intc GIC_SPI 544 IRQ_TYPE_EDGE_RISING>, 229 229 + <&intc GIC_SPI 457 IRQ_TYPE_EDGE_RISING>, 230 230 + <&intc GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, 231 231 + <&intc GIC_SPI 497 IRQ_TYPE_EDGE_RISING>, 232 232 + <&intc GIC_SPI 454 IRQ_TYPE_EDGE_RISING>, 233 233 + <&intc GIC_SPI 453 IRQ_TYPE_EDGE_RISING>, 234 234 + <&intc GIC_SPI 452 IRQ_TYPE_EDGE_RISING>, 235 235 + <&intc GIC_SPI 451 IRQ_TYPE_EDGE_RISING>, 236 236 + <&intc GIC_SPI 488 IRQ_TYPE_EDGE_RISING>, 237 237 + <&intc GIC_SPI 488 IRQ_TYPE_EDGE_RISING>, 238 238 + <&intc GIC_SPI 484 IRQ_TYPE_EDGE_RISING>, 239 239 + <&intc GIC_SPI 554 IRQ_TYPE_EDGE_RISING>, 240 240 + <&intc GIC_SPI 554 IRQ_TYPE_EDGE_RISING>, 241 241 + <&intc GIC_SPI 549 IRQ_TYPE_EDGE_RISING>, 242 242 + <&intc GIC_SPI 507 IRQ_TYPE_EDGE_RISING>, 243 243 + <&intc GIC_SPI 500 IRQ_TYPE_EDGE_RISING>, 244 244 + <&intc GIC_SPI 499 IRQ_TYPE_EDGE_RISING>, 245 245 + <&intc GIC_SPI 498 IRQ_TYPE_EDGE_RISING>, 246 246 + <&intc GIC_SPI 450 IRQ_TYPE_EDGE_RISING>, 247 247 + <&intc GIC_SPI 449 IRQ_TYPE_EDGE_RISING>, 248 248 + <&intc GIC_SPI 448 IRQ_TYPE_EDGE_RISING>, 249 249 + <&intc GIC_SPI 447 IRQ_TYPE_EDGE_RISING>, 250 250 + <&intc GIC_SPI 543 IRQ_TYPE_EDGE_RISING>, 251 251 + <&intc GIC_SPI 486 IRQ_TYPE_EDGE_RISING>, 252 252 + <&intc GIC_SPI 486 IRQ_TYPE_EDGE_RISING>, 253 253 + <&intc GIC_SPI 482 IRQ_TYPE_EDGE_RISING>, 254 254 + <&intc GIC_SPI 419 IRQ_TYPE_EDGE_RISING>; 255 255 + interrupt-names = "fatal", 256 256 + "ready", 257 257 + "spawn", 258 258 + "stop-ack", 259 259 + "misc-pulse1", 260 260 + "misc-latch", 261 261 + "sw-exception", 262 262 + "ce0", 263 263 + "ce1", 264 264 + "ce2", 265 265 + "ce3", 266 266 + "ce4", 267 267 + "ce5", 268 268 + "ce6", 269 269 + "ce7", 270 270 + "ce8", 271 271 + "ce9", 272 272 + "ce10", 273 273 + "ce11", 274 274 + "host2wbm-desc-feed", 275 275 + "host2reo-re-injection", 276 276 + "host2reo-command", 277 277 + "host2rxdma-monitor-ring1", 278 278 + "reo2ost-exception", 279 279 + "wbm2host-rx-release", 280 280 + "reo2host-status", 281 281 + "reo2host-destination-ring4", 282 282 + "reo2host-destination-ring3", 283 283 + "reo2host-destination-ring2", 284 284 + "reo2host-destination-ring1", 285 285 + "rxdma2host-monitor-destination-mac3", 286 286 + "rxdma2host-monitor-destination-mac2", 287 287 + "rxdma2host-monitor-destination-mac1", 288 288 + "host2rxdma-host-buf-ring-mac3", 289 289 + "host2rxdma-host-buf-ring-mac2", 290 290 + "host2rxdma-host-buf-ring-mac1", 291 291 + "host2tcl-input-ring4", 292 292 + "host2tcl-input-ring3", 293 293 + "host2tcl-input-ring2", 294 294 + "host2tcl-input-ring1", 295 295 + "wbm2host-tx-completions-ring4", 296 296 + "wbm2host-tx-completions-ring3", 297 297 + "wbm2host-tx-completions-ring2", 298 298 + "wbm2host-tx-completions-ring1", 299 299 + "host2tx-monitor-ring1", 300 300 + "txmon2host-monitor-destination-mac3", 301 301 + "txmon2host-monitor-destination-mac2", 302 302 + "txmon2host-monitor-destination-mac1", 303 303 + "umac-reset"; 304 304 + 305 305 + memory-region = <&q6_region>, <&m3_dump>, <&q6_caldb>, <&mlo_mem>; 306 306 + memory-region-names = "q6-region", "m3-dump", "q6-caldb", "mlo-global-mem"; 307 307 + qcom,calibration-variant = "RDP441_1"; 308 308 + qcom,rproc = <&q6v5_wcss>; 309 309 + qcom,smem-states = <&wcss_smp2p_out 8>, 310 310 + <&wcss_smp2p_out 9>, 311 311 + <&wcss_smp2p_out 10>; 312 312 + qcom,smem-state-names = "shutdown", 313 313 + "stop", 314 314 + "spawn"; 315 315 + };

+1 -4

Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml

reviewed

··· 71 71 "Platform Data Set" in Silabs jargon). Default depends of "compatible" 72 72 string. For "silabs,wf200", the default is 'wf200.pds'. 73 73 74 74 - local-mac-address: true 75 75 - 76 76 - mac-address: true 77 77 - 78 74 required: 79 75 - compatible 80 76 - reg 81 77 82 78 allOf: 79 79 + - $ref: /schemas/net/wireless/wireless-controller.yaml# 83 80 - $ref: /schemas/spi/spi-peripheral-props.yaml# 84 81 85 82 unevaluatedProperties: false

+23

Documentation/devicetree/bindings/net/wireless/wireless-controller.yaml

reviewed

··· 1 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 2 + %YAML 1.2 3 3 + --- 4 4 + $id: http://devicetree.org/schemas/net/wireless/wireless-controller.yaml# 5 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 + 7 7 + title: Wireless Controller Common Properties 8 8 + 9 9 + maintainers: 10 10 + - Lorenzo Bianconi <lorenzo@kernel.org> 11 11 + 12 12 + properties: 13 13 + $nodename: 14 14 + pattern: "^wifi(@.*)?$" 15 15 + 16 16 + allOf: 17 17 + - $ref: ieee80211.yaml# 18 18 + - $ref: /schemas/net/network-class.yaml# 19 19 + 20 20 + additionalProperties: true 21 21 + 22 22 + ... 23 23 +

+4 -1

Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml

reviewed

··· 54 54 - compatible 55 55 56 56 wifi: 57 57 - additionalProperties: false 57 57 + unevaluatedProperties: false 58 58 type: object 59 59 properties: 60 60 compatible: ··· 87 87 - interrupt-names 88 88 - qcom,smem-states 89 89 - qcom,smem-state-names 90 90 + 91 91 + allOf: 92 92 + - $ref: /schemas/net/wireless/wireless-controller.yaml# 90 93 91 94 required: 92 95 - compatible

+5 -3

drivers/bcma/driver_gpio.c

reviewed

··· 26 26 return !!bcma_chipco_gpio_in(cc, 1 << gpio); 27 27 } 28 28 29 29 - static void bcma_gpio_set_value(struct gpio_chip *chip, unsigned gpio, 30 30 - int value) 29 29 + static int bcma_gpio_set_value(struct gpio_chip *chip, unsigned int gpio, 30 30 + int value) 31 31 { 32 32 struct bcma_drv_cc *cc = gpiochip_get_data(chip); 33 33 34 34 bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0); 35 35 + 36 36 + return 0; 35 37 } 36 38 37 39 static int bcma_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) ··· 186 184 chip->request = bcma_gpio_request; 187 185 chip->free = bcma_gpio_free; 188 186 chip->get = bcma_gpio_get_value; 189 189 - chip->set = bcma_gpio_set_value; 187 187 + chip->set_rv = bcma_gpio_set_value; 190 188 chip->direction_input = bcma_gpio_direction_input; 191 189 chip->direction_output = bcma_gpio_direction_output; 192 190 chip->parent = bus->dev;

+1 -1

drivers/net/wireless/ath/ath10k/ahb.c

reviewed

··· 497 497 498 498 ath10k_dbg(ar, ATH10K_DBG_BOOT, "irq: %d\n", ar_ahb->irq); 499 499 500 500 - ath10k_dbg(ar, ATH10K_DBG_BOOT, "mem: 0x%pK mem_len: %lu gcc mem: 0x%pK tcsr_mem: 0x%pK\n", 500 500 + ath10k_dbg(ar, ATH10K_DBG_BOOT, "mem: 0x%p mem_len: %lu gcc mem: 0x%p tcsr_mem: 0x%p\n", 501 501 ar_ahb->mem, ar_ahb->mem_len, 502 502 ar_ahb->gcc_mem, ar_ahb->tcsr_mem); 503 503 return 0;

+3 -3

drivers/net/wireless/ath/ath10k/bmi.c

reviewed

··· 349 349 int ret; 350 350 size_t buf_len; 351 351 352 352 - ath10k_dbg(ar, ATH10K_DBG_BMI, "large bmi lz data buffer 0x%pK length %d\n", 352 352 + ath10k_dbg(ar, ATH10K_DBG_BMI, "large bmi lz data buffer 0x%p length %d\n", 353 353 buffer, length); 354 354 355 355 if (ar->bmi.done_sent) { ··· 395 395 u32 txlen; 396 396 int ret; 397 397 398 398 - ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi lz data buffer 0x%pK length %d\n", 398 398 + ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi lz data buffer 0x%p length %d\n", 399 399 buffer, length); 400 400 401 401 if (ar->bmi.done_sent) { ··· 461 461 int ret; 462 462 463 463 ath10k_dbg(ar, ATH10K_DBG_BMI, 464 464 - "bmi fast download address 0x%x buffer 0x%pK length %d\n", 464 464 + "bmi fast download address 0x%x buffer 0x%p length %d\n", 465 465 address, buffer, length); 466 466 467 467 ret = ath10k_bmi_lz_stream_start(ar, address);

+2 -2

drivers/net/wireless/ath/ath10k/ce.c

reviewed

··· 1388 1388 ath10k_ce_src_ring_highmark_set(ar, ctrl_addr, nentries); 1389 1389 1390 1390 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1391 1391 - "boot init ce src ring id %d entries %d base_addr %pK\n", 1391 1391 + "boot init ce src ring id %d entries %d base_addr %p\n", 1392 1392 ce_id, nentries, src_ring->base_addr_owner_space); 1393 1393 1394 1394 return 0; ··· 1426 1426 ath10k_ce_dest_ring_highmark_set(ar, ctrl_addr, nentries); 1427 1427 1428 1428 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1429 1429 - "boot ce dest ring id %d entries %d base_addr %pK\n", 1429 1429 + "boot ce dest ring id %d entries %d base_addr %p\n", 1430 1430 ce_id, nentries, dest_ring->base_addr_owner_space); 1431 1431 1432 1432 return 0;

+2 -2

drivers/net/wireless/ath/ath10k/core.c

reviewed

··· 1200 1200 } 1201 1201 1202 1202 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1203 1203 - "boot uploading firmware image %pK len %d\n", 1203 1203 + "boot uploading firmware image %p len %d\n", 1204 1204 data, data_len); 1205 1205 1206 1206 /* Check if device supports to download firmware via ··· 1826 1826 1827 1827 if (!ar->running_fw->fw_file.otp_data || 1828 1828 !ar->running_fw->fw_file.otp_len) { 1829 1829 - ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 1829 1829 + ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", 1830 1830 ar->running_fw->fw_file.otp_data, 1831 1831 ar->running_fw->fw_file.otp_len); 1832 1832 return 0;

+3 -3

drivers/net/wireless/ath/ath10k/htc.c

reviewed

··· 34 34 skb_cb = ATH10K_SKB_CB(skb); 35 35 memset(skb_cb, 0, sizeof(*skb_cb)); 36 36 37 37 - ath10k_dbg(ar, ATH10K_DBG_HTC, "%s: skb %pK\n", __func__, skb); 37 37 + ath10k_dbg(ar, ATH10K_DBG_HTC, "%s: skb %p\n", __func__, skb); 38 38 return skb; 39 39 } 40 40 ··· 54 54 struct ath10k *ar = ep->htc->ar; 55 55 struct ath10k_htc_hdr *hdr; 56 56 57 57 - ath10k_dbg(ar, ATH10K_DBG_HTC, "%s: ep %d skb %pK\n", __func__, 57 57 + ath10k_dbg(ar, ATH10K_DBG_HTC, "%s: ep %d skb %p\n", __func__, 58 58 ep->eid, skb); 59 59 60 60 /* A corner case where the copy completion is reaching to host but still ··· 515 515 /* zero length packet with trailer data, just drop these */ 516 516 goto out; 517 517 518 518 - ath10k_dbg(ar, ATH10K_DBG_HTC, "htc rx completion ep %d skb %pK\n", 518 518 + ath10k_dbg(ar, ATH10K_DBG_HTC, "htc rx completion ep %d skb %p\n", 519 519 eid, skb); 520 520 ep->ep_ops.ep_rx_complete(ar, skb); 521 521

+1 -1

drivers/net/wireless/ath/ath10k/htt_rx.c

reviewed

··· 1373 1373 } 1374 1374 1375 1375 ath10k_dbg(ar, ATH10K_DBG_DATA, 1376 1376 - "rx skb %pK len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n", 1376 1376 + "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n", 1377 1377 skb, 1378 1378 skb->len, 1379 1379 ieee80211_get_SA(hdr),

+11 -11

drivers/net/wireless/ath/ath10k/mac.c

reviewed

··· 875 875 */ 876 876 for (i = 0; i < ARRAY_SIZE(ar->peer_map); i++) { 877 877 if (ar->peer_map[i] == peer) { 878 878 - ath10k_warn(ar, "removing stale peer_map entry for %pM (ptr %pK idx %d)\n", 878 878 + ath10k_warn(ar, "removing stale peer_map entry for %pM (ptr %p idx %d)\n", 879 879 peer->addr, peer, i); 880 880 ar->peer_map[i] = NULL; 881 881 } ··· 4063 4063 4064 4064 if (!noque_offchan && info->flags & IEEE80211_TX_CTL_TX_OFFCHAN) { 4065 4065 if (!ath10k_mac_tx_frm_has_freq(ar)) { 4066 4066 - ath10k_dbg(ar, ATH10K_DBG_MAC, "mac queued offchannel skb %pK len %d\n", 4066 4066 + ath10k_dbg(ar, ATH10K_DBG_MAC, "mac queued offchannel skb %p len %d\n", 4067 4067 skb, skb->len); 4068 4068 4069 4069 skb_queue_tail(&ar->offchan_tx_queue, skb); ··· 4126 4126 4127 4127 mutex_lock(&ar->conf_mutex); 4128 4128 4129 4129 - ath10k_dbg(ar, ATH10K_DBG_MAC, "mac offchannel skb %pK len %d\n", 4129 4129 + ath10k_dbg(ar, ATH10K_DBG_MAC, "mac offchannel skb %p len %d\n", 4130 4130 skb, skb->len); 4131 4131 4132 4132 hdr = (struct ieee80211_hdr *)skb->data; ··· 4181 4181 time_left = 4182 4182 wait_for_completion_timeout(&ar->offchan_tx_completed, 3 * HZ); 4183 4183 if (time_left == 0) 4184 4184 - ath10k_warn(ar, "timed out waiting for offchannel skb %pK, len: %d\n", 4184 4184 + ath10k_warn(ar, "timed out waiting for offchannel skb %p, len: %d\n", 4185 4185 skb, skb->len); 4186 4186 4187 4187 if (!peer && tmp_peer_created) { ··· 7604 7604 * Existing station deletion. 7605 7605 */ 7606 7606 ath10k_dbg(ar, ATH10K_DBG_STA, 7607 7607 - "mac vdev %d peer delete %pM sta %pK (sta gone)\n", 7607 7607 + "mac vdev %d peer delete %pM sta %p (sta gone)\n", 7608 7608 arvif->vdev_id, sta->addr, sta); 7609 7609 7610 7610 if (sta->tdls) { ··· 7631 7631 continue; 7632 7632 7633 7633 if (peer->sta == sta) { 7634 7634 - ath10k_warn(ar, "found sta peer %pM (ptr %pK id %d) entry on vdev %i after it was supposedly removed\n", 7634 7634 + ath10k_warn(ar, "found sta peer %pM (ptr %p id %d) entry on vdev %i after it was supposedly removed\n", 7635 7635 sta->addr, peer, i, arvif->vdev_id); 7636 7636 peer->sta = NULL; 7637 7637 ··· 8811 8811 struct ath10k *ar = hw->priv; 8812 8812 8813 8813 ath10k_dbg(ar, ATH10K_DBG_MAC, 8814 8814 - "mac chanctx add freq %u width %d ptr %pK\n", 8814 8814 + "mac chanctx add freq %u width %d ptr %p\n", 8815 8815 ctx->def.chan->center_freq, ctx->def.width, ctx); 8816 8816 8817 8817 mutex_lock(&ar->conf_mutex); ··· 8835 8835 struct ath10k *ar = hw->priv; 8836 8836 8837 8837 ath10k_dbg(ar, ATH10K_DBG_MAC, 8838 8838 - "mac chanctx remove freq %u width %d ptr %pK\n", 8838 8838 + "mac chanctx remove freq %u width %d ptr %p\n", 8839 8839 ctx->def.chan->center_freq, ctx->def.width, ctx); 8840 8840 8841 8841 mutex_lock(&ar->conf_mutex); ··· 8900 8900 mutex_lock(&ar->conf_mutex); 8901 8901 8902 8902 ath10k_dbg(ar, ATH10K_DBG_MAC, 8903 8903 - "mac chanctx change freq %u width %d ptr %pK changed %x\n", 8903 8903 + "mac chanctx change freq %u width %d ptr %p changed %x\n", 8904 8904 ctx->def.chan->center_freq, ctx->def.width, ctx, changed); 8905 8905 8906 8906 /* This shouldn't really happen because channel switching should use ··· 8959 8959 mutex_lock(&ar->conf_mutex); 8960 8960 8961 8961 ath10k_dbg(ar, ATH10K_DBG_MAC, 8962 8962 - "mac chanctx assign ptr %pK vdev_id %i\n", 8962 8962 + "mac chanctx assign ptr %p vdev_id %i\n", 8963 8963 ctx, arvif->vdev_id); 8964 8964 8965 8965 if (WARN_ON(arvif->is_started)) { ··· 9039 9039 mutex_lock(&ar->conf_mutex); 9040 9040 9041 9041 ath10k_dbg(ar, ATH10K_DBG_MAC, 9042 9042 - "mac chanctx unassign ptr %pK vdev_id %i\n", 9042 9042 + "mac chanctx unassign ptr %p vdev_id %i\n", 9043 9043 ctx, arvif->vdev_id); 9044 9044 9045 9045 WARN_ON(!arvif->is_started);

+1 -1

drivers/net/wireless/ath/ath10k/pci.c

reviewed

··· 3411 3411 goto err_region; 3412 3412 } 3413 3413 3414 3414 - ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot pci_mem 0x%pK\n", ar_pci->mem); 3414 3414 + ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot pci_mem 0x%p\n", ar_pci->mem); 3415 3415 return 0; 3416 3416 3417 3417 err_region:

+2 -2

drivers/net/wireless/ath/ath10k/testmode.c

reviewed

··· 35 35 int ret; 36 36 37 37 ath10k_dbg(ar, ATH10K_DBG_TESTMODE, 38 38 - "testmode event wmi cmd_id %d skb %pK skb->len %d\n", 38 38 + "testmode event wmi cmd_id %d skb %p skb->len %d\n", 39 39 cmd_id, skb, skb->len); 40 40 41 41 ath10k_dbg_dump(ar, ATH10K_DBG_TESTMODE, NULL, "", skb->data, skb->len); ··· 397 397 cmd_id = nla_get_u32(tb[ATH10K_TM_ATTR_WMI_CMDID]); 398 398 399 399 ath10k_dbg(ar, ATH10K_DBG_TESTMODE, 400 400 - "testmode cmd wmi cmd_id %d buf %pK buf_len %d\n", 400 400 + "testmode cmd wmi cmd_id %d buf %p buf_len %d\n", 401 401 cmd_id, buf, buf_len); 402 402 403 403 ath10k_dbg_dump(ar, ATH10K_DBG_TESTMODE, NULL, "", buf, buf_len);

+1 -1

drivers/net/wireless/ath/ath10k/txrx.c

reviewed

··· 35 35 complete(&ar->offchan_tx_completed); 36 36 ar->offchan_tx_skb = NULL; /* just for sanity */ 37 37 38 38 - ath10k_dbg(ar, ATH10K_DBG_HTT, "completed offchannel skb %pK\n", skb); 38 38 + ath10k_dbg(ar, ATH10K_DBG_HTT, "completed offchannel skb %p\n", skb); 39 39 out: 40 40 spin_unlock_bh(&ar->data_lock); 41 41 }

+2 -2

drivers/net/wireless/ath/ath10k/usb.c

reviewed

··· 131 131 int status = 0; 132 132 133 133 ath10k_dbg(ar, ATH10K_DBG_USB_BULK, 134 134 - "usb recv pipe %d stat %d len %d urb 0x%pK\n", 134 134 + "usb recv pipe %d stat %d len %d urb 0x%p\n", 135 135 pipe->logical_pipe_num, urb->status, urb->actual_length, 136 136 urb); 137 137 ··· 230 230 ath10k_usb_recv_complete, urb_context); 231 231 232 232 ath10k_dbg(ar, ATH10K_DBG_USB_BULK, 233 233 - "usb bulk recv submit %d 0x%x ep 0x%2.2x len %d buf 0x%pK\n", 233 233 + "usb bulk recv submit %d 0x%x ep 0x%2.2x len %d buf 0x%p\n", 234 234 recv_pipe->logical_pipe_num, 235 235 recv_pipe->usb_pipe_handle, recv_pipe->ep_address, 236 236 ATH10K_USB_RX_BUFFER_SIZE, urb_context->skb);

+2 -2

drivers/net/wireless/ath/ath10k/wmi.c

reviewed

··· 2029 2029 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr)); 2030 2030 memcpy(cmd->buf, msdu->data, msdu->len); 2031 2031 2032 2032 - ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %pK len %d ftype %02x stype %02x\n", 2032 2032 + ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n", 2033 2033 msdu, skb->len, fc & IEEE80211_FCTL_FTYPE, 2034 2034 fc & IEEE80211_FCTL_STYPE); 2035 2035 trace_ath10k_tx_hdr(ar, skb->data, skb->len); ··· 2637 2637 status->boottime_ns = ktime_get_boottime_ns(); 2638 2638 2639 2639 ath10k_dbg(ar, ATH10K_DBG_MGMT, 2640 2640 - "event mgmt rx skb %pK len %d ftype %02x stype %02x\n", 2640 2640 + "event mgmt rx skb %p len %d ftype %02x stype %02x\n", 2641 2641 skb, skb->len, 2642 2642 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); 2643 2643

+2 -2

drivers/net/wireless/ath/ath11k/ahb.c

reviewed

··· 413 413 return ret; 414 414 } 415 415 416 416 - static void ath11k_ahb_power_down(struct ath11k_base *ab) 416 416 + static void ath11k_ahb_power_down(struct ath11k_base *ab, bool is_suspend) 417 417 { 418 418 struct ath11k_ahb *ab_ahb = ath11k_ahb_priv(ab); 419 419 ··· 1280 1280 struct ath11k_base *ab = platform_get_drvdata(pdev); 1281 1281 1282 1282 if (test_bit(ATH11K_FLAG_QMI_FAIL, &ab->dev_flags)) { 1283 1283 - ath11k_ahb_power_down(ab); 1283 1283 + ath11k_ahb_power_down(ab, false); 1284 1284 ath11k_debugfs_soc_destroy(ab); 1285 1285 ath11k_qmi_deinit_service(ab); 1286 1286 goto qmi_fail;

+278 -28

drivers/net/wireless/ath/ath11k/core.c

reviewed

··· 907 907 }, 908 908 }; 909 909 910 910 - static inline struct ath11k_pdev *ath11k_core_get_single_pdev(struct ath11k_base *ab) 911 911 - { 912 912 - WARN_ON(!ab->hw_params.single_pdev_only); 913 913 - 914 914 - return &ab->pdevs[0]; 915 915 - } 910 910 + static const struct dmi_system_id ath11k_pm_quirk_table[] = { 911 911 + { 912 912 + .driver_data = (void *)ATH11K_PM_WOW, 913 913 + .matches = { 914 914 + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 915 915 + DMI_MATCH(DMI_PRODUCT_NAME, "21J4"), 916 916 + }, 917 917 + }, 918 918 + { 919 919 + .driver_data = (void *)ATH11K_PM_WOW, 920 920 + .matches = { 921 921 + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 922 922 + DMI_MATCH(DMI_PRODUCT_NAME, "21K4"), 923 923 + }, 924 924 + }, 925 925 + { 926 926 + .driver_data = (void *)ATH11K_PM_WOW, 927 927 + .matches = { 928 928 + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 929 929 + DMI_MATCH(DMI_PRODUCT_NAME, "21K6"), 930 930 + }, 931 931 + }, 932 932 + { 933 933 + .driver_data = (void *)ATH11K_PM_WOW, 934 934 + .matches = { 935 935 + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 936 936 + DMI_MATCH(DMI_PRODUCT_NAME, "21K8"), 937 937 + }, 938 938 + }, 939 939 + { 940 940 + .driver_data = (void *)ATH11K_PM_WOW, 941 941 + .matches = { 942 942 + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 943 943 + DMI_MATCH(DMI_PRODUCT_NAME, "21KA"), 944 944 + }, 945 945 + }, 946 946 + { 947 947 + .driver_data = (void *)ATH11K_PM_WOW, 948 948 + .matches = { 949 949 + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 950 950 + DMI_MATCH(DMI_PRODUCT_NAME, "21F9"), 951 951 + }, 952 952 + }, 953 953 + {} 954 954 + }; 916 955 917 956 void ath11k_fw_stats_pdevs_free(struct list_head *head) 918 957 { ··· 1011 972 return ab->hw_params.coldboot_cal_mm; 1012 973 } 1013 974 1014 1014 - int ath11k_core_suspend(struct ath11k_base *ab) 975 975 + /* Check if we need to continue with suspend/resume operation. 976 976 + * Return: 977 977 + * a negative value: error happens and don't continue. 978 978 + * 0: no error but don't continue. 979 979 + * positive value: no error and do continue. 980 980 + */ 981 981 + static int ath11k_core_continue_suspend_resume(struct ath11k_base *ab) 1015 982 { 1016 1016 - int ret; 1017 1017 - struct ath11k_pdev *pdev; 1018 983 struct ath11k *ar; 1019 984 1020 985 if (!ab->hw_params.supports_suspend) 1021 986 return -EOPNOTSUPP; 1022 987 1023 988 /* so far single_pdev_only chips have supports_suspend as true 1024 1024 - * and only the first pdev is valid. 989 989 + * so pass 0 as a dummy pdev_id here. 1025 990 */ 1026 1026 - pdev = ath11k_core_get_single_pdev(ab); 1027 1027 - ar = pdev->ar; 991 991 + ar = ab->pdevs[0].ar; 1028 992 if (!ar || ar->state != ATH11K_STATE_OFF) 1029 993 return 0; 994 994 + 995 995 + return 1; 996 996 + } 997 997 + 998 998 + static int ath11k_core_suspend_wow(struct ath11k_base *ab) 999 999 + { 1000 1000 + int ret; 1030 1001 1031 1002 ret = ath11k_dp_rx_pktlog_stop(ab, true); 1032 1003 if (ret) { ··· 1045 996 return ret; 1046 997 } 1047 998 1048 1048 - ret = ath11k_mac_wait_tx_complete(ar); 999 999 + /* So far only single_pdev_only devices can reach here, 1000 1000 + * so it is valid to handle the first, and the only, pdev. 1001 1001 + */ 1002 1002 + ret = ath11k_mac_wait_tx_complete(ab->pdevs[0].ar); 1049 1003 if (ret) { 1050 1004 ath11k_warn(ab, "failed to wait tx complete: %d\n", ret); 1051 1005 return ret; ··· 1081 1029 1082 1030 return 0; 1083 1031 } 1084 1084 - EXPORT_SYMBOL(ath11k_core_suspend); 1085 1032 1086 1086 - int ath11k_core_resume(struct ath11k_base *ab) 1033 1033 + static int ath11k_core_suspend_default(struct ath11k_base *ab) 1087 1034 { 1088 1035 int ret; 1089 1089 - struct ath11k_pdev *pdev; 1090 1090 - struct ath11k *ar; 1091 1036 1092 1092 - if (!ab->hw_params.supports_suspend) 1093 1093 - return -EOPNOTSUPP; 1037 1037 + ret = ath11k_dp_rx_pktlog_stop(ab, true); 1038 1038 + if (ret) { 1039 1039 + ath11k_warn(ab, "failed to stop dp rx (and timer) pktlog during suspend: %d\n", 1040 1040 + ret); 1041 1041 + return ret; 1042 1042 + } 1094 1043 1095 1095 - /* so far signle_pdev_only chips have supports_suspend as true 1096 1096 - * and only the first pdev is valid. 1044 1044 + /* So far only single_pdev_only devices can reach here, 1045 1045 + * so it is valid to handle the first, and the only, pdev. 1097 1046 */ 1098 1098 - pdev = ath11k_core_get_single_pdev(ab); 1099 1099 - ar = pdev->ar; 1100 1100 - if (!ar || ar->state != ATH11K_STATE_OFF) 1047 1047 + ret = ath11k_mac_wait_tx_complete(ab->pdevs[0].ar); 1048 1048 + if (ret) { 1049 1049 + ath11k_warn(ab, "failed to wait tx complete: %d\n", ret); 1050 1050 + return ret; 1051 1051 + } 1052 1052 + 1053 1053 + ret = ath11k_dp_rx_pktlog_stop(ab, false); 1054 1054 + if (ret) { 1055 1055 + ath11k_warn(ab, "failed to stop dp rx pktlog during suspend: %d\n", 1056 1056 + ret); 1057 1057 + return ret; 1058 1058 + } 1059 1059 + 1060 1060 + ath11k_ce_stop_shadow_timers(ab); 1061 1061 + ath11k_dp_stop_shadow_timers(ab); 1062 1062 + 1063 1063 + /* PM framework skips suspend_late/resume_early callbacks 1064 1064 + * if other devices report errors in their suspend callbacks. 1065 1065 + * However ath11k_core_resume() would still be called because 1066 1066 + * here we return success thus kernel put us on dpm_suspended_list. 1067 1067 + * Since we won't go through a power down/up cycle, there is 1068 1068 + * no chance to call complete(&ab->restart_completed) in 1069 1069 + * ath11k_core_restart(), making ath11k_core_resume() timeout. 1070 1070 + * So call it here to avoid this issue. This also works in case 1071 1071 + * no error happens thus suspend_late/resume_early get called, 1072 1072 + * because it will be reinitialized in ath11k_core_resume_early(). 1073 1073 + */ 1074 1074 + complete(&ab->restart_completed); 1075 1075 + 1076 1076 + return 0; 1077 1077 + } 1078 1078 + 1079 1079 + int ath11k_core_suspend(struct ath11k_base *ab) 1080 1080 + { 1081 1081 + int ret; 1082 1082 + 1083 1083 + ret = ath11k_core_continue_suspend_resume(ab); 1084 1084 + if (ret <= 0) 1085 1085 + return ret; 1086 1086 + 1087 1087 + if (ab->actual_pm_policy == ATH11K_PM_WOW) 1088 1088 + return ath11k_core_suspend_wow(ab); 1089 1089 + 1090 1090 + return ath11k_core_suspend_default(ab); 1091 1091 + } 1092 1092 + EXPORT_SYMBOL(ath11k_core_suspend); 1093 1093 + 1094 1094 + int ath11k_core_suspend_late(struct ath11k_base *ab) 1095 1095 + { 1096 1096 + int ret; 1097 1097 + 1098 1098 + ret = ath11k_core_continue_suspend_resume(ab); 1099 1099 + if (ret <= 0) 1100 1100 + return ret; 1101 1101 + 1102 1102 + if (ab->actual_pm_policy == ATH11K_PM_WOW) 1101 1103 return 0; 1104 1104 + 1105 1105 + ath11k_hif_irq_disable(ab); 1106 1106 + ath11k_hif_ce_irq_disable(ab); 1107 1107 + 1108 1108 + ath11k_hif_power_down(ab, true); 1109 1109 + 1110 1110 + return 0; 1111 1111 + } 1112 1112 + EXPORT_SYMBOL(ath11k_core_suspend_late); 1113 1113 + 1114 1114 + int ath11k_core_resume_early(struct ath11k_base *ab) 1115 1115 + { 1116 1116 + int ret; 1117 1117 + 1118 1118 + ret = ath11k_core_continue_suspend_resume(ab); 1119 1119 + if (ret <= 0) 1120 1120 + return ret; 1121 1121 + 1122 1122 + if (ab->actual_pm_policy == ATH11K_PM_WOW) 1123 1123 + return 0; 1124 1124 + 1125 1125 + reinit_completion(&ab->restart_completed); 1126 1126 + ret = ath11k_hif_power_up(ab); 1127 1127 + if (ret) 1128 1128 + ath11k_warn(ab, "failed to power up hif during resume: %d\n", ret); 1129 1129 + 1130 1130 + return ret; 1131 1131 + } 1132 1132 + EXPORT_SYMBOL(ath11k_core_resume_early); 1133 1133 + 1134 1134 + static int ath11k_core_resume_default(struct ath11k_base *ab) 1135 1135 + { 1136 1136 + struct ath11k *ar; 1137 1137 + long time_left; 1138 1138 + int ret; 1139 1139 + 1140 1140 + time_left = wait_for_completion_timeout(&ab->restart_completed, 1141 1141 + ATH11K_RESET_TIMEOUT_HZ); 1142 1142 + if (time_left == 0) { 1143 1143 + ath11k_warn(ab, "timeout while waiting for restart complete"); 1144 1144 + return -ETIMEDOUT; 1145 1145 + } 1146 1146 + 1147 1147 + /* So far only single_pdev_only devices can reach here, 1148 1148 + * so it is valid to handle the first, and the only, pdev. 1149 1149 + */ 1150 1150 + ar = ab->pdevs[0].ar; 1151 1151 + if (ab->hw_params.current_cc_support && 1152 1152 + ar->alpha2[0] != 0 && ar->alpha2[1] != 0) { 1153 1153 + ret = ath11k_reg_set_cc(ar); 1154 1154 + if (ret) { 1155 1155 + ath11k_warn(ab, "failed to set country code during resume: %d\n", 1156 1156 + ret); 1157 1157 + return ret; 1158 1158 + } 1159 1159 + } 1160 1160 + 1161 1161 + ret = ath11k_dp_rx_pktlog_start(ab); 1162 1162 + if (ret) 1163 1163 + ath11k_warn(ab, "failed to start rx pktlog during resume: %d\n", 1164 1164 + ret); 1165 1165 + 1166 1166 + return ret; 1167 1167 + } 1168 1168 + 1169 1169 + static int ath11k_core_resume_wow(struct ath11k_base *ab) 1170 1170 + { 1171 1171 + int ret; 1102 1172 1103 1173 ret = ath11k_hif_resume(ab); 1104 1174 if (ret) { ··· 1245 1071 } 1246 1072 1247 1073 return 0; 1074 1074 + } 1075 1075 + 1076 1076 + int ath11k_core_resume(struct ath11k_base *ab) 1077 1077 + { 1078 1078 + int ret; 1079 1079 + 1080 1080 + ret = ath11k_core_continue_suspend_resume(ab); 1081 1081 + if (ret <= 0) 1082 1082 + return ret; 1083 1083 + 1084 1084 + if (ab->actual_pm_policy == ATH11K_PM_WOW) 1085 1085 + return ath11k_core_resume_wow(ab); 1086 1086 + 1087 1087 + return ath11k_core_resume_default(ab); 1248 1088 } 1249 1089 EXPORT_SYMBOL(ath11k_core_resume); 1250 1090 ··· 2238 2050 void ath11k_core_halt(struct ath11k *ar) 2239 2051 { 2240 2052 struct ath11k_base *ab = ar->ab; 2053 2053 + struct list_head *pos, *n; 2241 2054 2242 2055 lockdep_assert_held(&ar->conf_mutex); 2243 2056 ··· 2254 2065 2255 2066 rcu_assign_pointer(ab->pdevs_active[ar->pdev_idx], NULL); 2256 2067 synchronize_rcu(); 2257 2257 - INIT_LIST_HEAD(&ar->arvifs); 2068 2068 + 2069 2069 + spin_lock_bh(&ar->data_lock); 2070 2070 + list_for_each_safe(pos, n, &ar->arvifs) 2071 2071 + list_del_init(pos); 2072 2072 + spin_unlock_bh(&ar->data_lock); 2073 2073 + 2258 2074 idr_init(&ar->txmgmt_idr); 2259 2075 } 2260 2076 ··· 2399 2205 2400 2206 if (!ab->is_reset) 2401 2207 ath11k_core_post_reconfigure_recovery(ab); 2208 2208 + 2209 2209 + complete(&ab->restart_completed); 2402 2210 } 2403 2211 2404 2212 static void ath11k_core_reset(struct work_struct *work) ··· 2471 2275 ath11k_hif_irq_disable(ab); 2472 2276 ath11k_hif_ce_irq_disable(ab); 2473 2277 2474 2474 - ath11k_hif_power_down(ab); 2278 2278 + ath11k_hif_power_down(ab, false); 2475 2279 ath11k_hif_power_up(ab); 2476 2280 2477 2281 ath11k_dbg(ab, ATH11K_DBG_BOOT, "reset started\n"); ··· 2521 2325 } 2522 2326 EXPORT_SYMBOL(ath11k_core_pre_init); 2523 2327 2524 2524 - int ath11k_core_init(struct ath11k_base *ab) 2328 2328 + static int ath11k_core_pm_notify(struct notifier_block *nb, 2329 2329 + unsigned long action, void *nouse) 2330 2330 + { 2331 2331 + struct ath11k_base *ab = container_of(nb, struct ath11k_base, 2332 2332 + pm_nb); 2333 2333 + 2334 2334 + switch (action) { 2335 2335 + case PM_SUSPEND_PREPARE: 2336 2336 + ab->actual_pm_policy = ab->pm_policy; 2337 2337 + break; 2338 2338 + case PM_HIBERNATION_PREPARE: 2339 2339 + ab->actual_pm_policy = ATH11K_PM_DEFAULT; 2340 2340 + break; 2341 2341 + default: 2342 2342 + break; 2343 2343 + } 2344 2344 + 2345 2345 + return NOTIFY_OK; 2346 2346 + } 2347 2347 + 2348 2348 + static int ath11k_core_pm_notifier_register(struct ath11k_base *ab) 2349 2349 + { 2350 2350 + ab->pm_nb.notifier_call = ath11k_core_pm_notify; 2351 2351 + return register_pm_notifier(&ab->pm_nb); 2352 2352 + } 2353 2353 + 2354 2354 + void ath11k_core_pm_notifier_unregister(struct ath11k_base *ab) 2525 2355 { 2526 2356 int ret; 2357 2357 + 2358 2358 + ret = unregister_pm_notifier(&ab->pm_nb); 2359 2359 + if (ret) 2360 2360 + /* just warn here, there is nothing can be done in fail case */ 2361 2361 + ath11k_warn(ab, "failed to unregister PM notifier %d\n", ret); 2362 2362 + } 2363 2363 + EXPORT_SYMBOL(ath11k_core_pm_notifier_unregister); 2364 2364 + 2365 2365 + int ath11k_core_init(struct ath11k_base *ab) 2366 2366 + { 2367 2367 + const struct dmi_system_id *dmi_id; 2368 2368 + int ret; 2369 2369 + 2370 2370 + dmi_id = dmi_first_match(ath11k_pm_quirk_table); 2371 2371 + if (dmi_id) 2372 2372 + ab->pm_policy = (kernel_ulong_t)dmi_id->driver_data; 2373 2373 + else 2374 2374 + ab->pm_policy = ATH11K_PM_DEFAULT; 2375 2375 + 2376 2376 + ath11k_dbg(ab, ATH11K_DBG_BOOT, "pm policy %u\n", ab->pm_policy); 2377 2377 + 2378 2378 + ret = ath11k_core_pm_notifier_register(ab); 2379 2379 + if (ret) { 2380 2380 + ath11k_err(ab, "failed to register PM notifier: %d\n", ret); 2381 2381 + return ret; 2382 2382 + } 2527 2383 2528 2384 ret = ath11k_core_soc_create(ab); 2529 2385 if (ret) { ··· 2596 2348 2597 2349 mutex_unlock(&ab->core_lock); 2598 2350 2599 2599 - ath11k_hif_power_down(ab); 2351 2351 + ath11k_hif_power_down(ab, false); 2600 2352 ath11k_mac_destroy(ab); 2601 2353 ath11k_core_soc_destroy(ab); 2354 2354 + ath11k_core_pm_notifier_unregister(ab); 2602 2355 } 2603 2356 EXPORT_SYMBOL(ath11k_core_deinit); 2604 2357 ··· 2650 2401 timer_setup(&ab->rx_replenish_retry, ath11k_ce_rx_replenish_retry, 0); 2651 2402 init_completion(&ab->htc_suspend); 2652 2403 init_completion(&ab->wow.wakeup_completed); 2404 2404 + init_completion(&ab->restart_completed); 2653 2405 2654 2406 ab->dev = dev; 2655 2407 ab->hif.bus = bus;

+16

drivers/net/wireless/ath/ath11k/core.h

reviewed

··· 16 16 #include <linux/rhashtable.h> 17 17 #include <linux/average.h> 18 18 #include <linux/firmware.h> 19 19 + #include <linux/suspend.h> 19 20 20 21 #include "qmi.h" 21 22 #include "htc.h" ··· 893 892 u16 hw_rev; 894 893 }; 895 894 895 895 + enum ath11k_pm_policy { 896 896 + ATH11K_PM_DEFAULT, 897 897 + ATH11K_PM_WOW, 898 898 + }; 899 899 + 896 900 /* Master structure to hold the hw data which may be used in core module */ 897 901 struct ath11k_base { 898 902 enum ath11k_hw_rev hw_rev; ··· 1056 1050 DECLARE_BITMAP(fw_features, ATH11K_FW_FEATURE_COUNT); 1057 1051 } fw; 1058 1052 1053 1053 + struct completion restart_completed; 1054 1054 + 1059 1055 #ifdef CONFIG_NL80211_TESTMODE 1060 1056 struct { 1061 1057 u32 data_pos; ··· 1065 1057 u8 *eventdata; 1066 1058 } testmode; 1067 1059 #endif 1060 1060 + 1061 1061 + enum ath11k_pm_policy pm_policy; 1062 1062 + enum ath11k_pm_policy actual_pm_policy; 1063 1063 + struct notifier_block pm_nb; 1068 1064 1069 1065 /* must be last */ 1070 1066 u8 drv_priv[] __aligned(sizeof(void *)); ··· 1261 1249 int ath11k_core_check_dt(struct ath11k_base *ath11k); 1262 1250 int ath11k_core_check_smbios(struct ath11k_base *ab); 1263 1251 void ath11k_core_halt(struct ath11k *ar); 1252 1252 + int ath11k_core_resume_early(struct ath11k_base *ab); 1264 1253 int ath11k_core_resume(struct ath11k_base *ab); 1265 1254 int ath11k_core_suspend(struct ath11k_base *ab); 1255 1255 + int ath11k_core_suspend_late(struct ath11k_base *ab); 1266 1256 void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab); 1267 1257 bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab); 1268 1258 ··· 1335 1321 1336 1322 return "unknown"; 1337 1323 } 1324 1324 + 1325 1325 + void ath11k_core_pm_notifier_unregister(struct ath11k_base *ab); 1338 1326 1339 1327 #endif /* _CORE_H_ */

+10 -4

drivers/net/wireless/ath/ath11k/hif.h

reviewed

··· 1 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 2 /* 3 3 * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 7 7 #ifndef _HIF_H_ ··· 18 18 int (*start)(struct ath11k_base *ab); 19 19 void (*stop)(struct ath11k_base *ab); 20 20 int (*power_up)(struct ath11k_base *ab); 21 21 - void (*power_down)(struct ath11k_base *ab); 21 21 + void (*power_down)(struct ath11k_base *ab, bool is_suspend); 22 22 int (*suspend)(struct ath11k_base *ab); 23 23 int (*resume)(struct ath11k_base *ab); 24 24 int (*map_service_to_pipe)(struct ath11k_base *ab, u16 service_id, ··· 68 68 69 69 static inline int ath11k_hif_power_up(struct ath11k_base *ab) 70 70 { 71 71 + if (!ab->hif.ops->power_up) 72 72 + return -EOPNOTSUPP; 73 73 + 71 74 return ab->hif.ops->power_up(ab); 72 75 } 73 76 74 74 - static inline void ath11k_hif_power_down(struct ath11k_base *ab) 77 77 + static inline void ath11k_hif_power_down(struct ath11k_base *ab, bool is_suspend) 75 78 { 76 76 - ab->hif.ops->power_down(ab); 79 79 + if (!ab->hif.ops->power_down) 80 80 + return; 81 81 + 82 82 + ab->hif.ops->power_down(ab, is_suspend); 77 83 } 78 84 79 85 static inline int ath11k_hif_suspend(struct ath11k_base *ab)

+8 -2

drivers/net/wireless/ath/ath11k/mac.c

reviewed

··· 1531 1531 1532 1532 static struct ath11k_vif *ath11k_mac_get_tx_arvif(struct ath11k_vif *arvif) 1533 1533 { 1534 1534 - if (arvif->vif->mbssid_tx_vif) 1535 1535 - return ath11k_vif_to_arvif(arvif->vif->mbssid_tx_vif); 1534 1534 + struct ieee80211_bss_conf *link_conf, *tx_bss_conf; 1535 1535 + 1536 1536 + lockdep_assert_wiphy(arvif->ar->hw->wiphy); 1537 1537 + 1538 1538 + link_conf = &arvif->vif->bss_conf; 1539 1539 + tx_bss_conf = wiphy_dereference(arvif->ar->hw->wiphy, link_conf->tx_bss_conf); 1540 1540 + if (tx_bss_conf) 1541 1541 + return ath11k_vif_to_arvif(tx_bss_conf->vif); 1536 1542 1537 1543 return NULL; 1538 1544 }

+11 -3

drivers/net/wireless/ath/ath11k/mhi.c

reviewed

··· 1 1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 2 /* 3 3 * Copyright (c) 2020 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 7 7 #include <linux/msi.h> ··· 454 454 return 0; 455 455 } 456 456 457 457 - void ath11k_mhi_stop(struct ath11k_pci *ab_pci) 457 457 + void ath11k_mhi_stop(struct ath11k_pci *ab_pci, bool is_suspend) 458 458 { 459 459 - mhi_power_down(ab_pci->mhi_ctrl, true); 459 459 + /* During suspend we need to use mhi_power_down_keep_dev() 460 460 + * workaround, otherwise ath11k_core_resume() will timeout 461 461 + * during resume. 462 462 + */ 463 463 + if (is_suspend) 464 464 + mhi_power_down_keep_dev(ab_pci->mhi_ctrl, true); 465 465 + else 466 466 + mhi_power_down(ab_pci->mhi_ctrl, true); 467 467 + 460 468 mhi_unprepare_after_power_down(ab_pci->mhi_ctrl); 461 469 } 462 470

+2 -2

drivers/net/wireless/ath/ath11k/mhi.h

reviewed

··· 1 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 2 /* 3 3 * Copyright (c) 2020 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2022, 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 #ifndef _ATH11K_MHI_H 7 7 #define _ATH11K_MHI_H ··· 18 18 #define MHICTRL_RESET_MASK 0x2 19 19 20 20 int ath11k_mhi_start(struct ath11k_pci *ar_pci); 21 21 - void ath11k_mhi_stop(struct ath11k_pci *ar_pci); 21 21 + void ath11k_mhi_stop(struct ath11k_pci *ar_pci, bool is_suspend); 22 22 int ath11k_mhi_register(struct ath11k_pci *ar_pci); 23 23 void ath11k_mhi_unregister(struct ath11k_pci *ar_pci); 24 24 void ath11k_mhi_set_mhictrl_reset(struct ath11k_base *ab);

+40 -10

drivers/net/wireless/ath/ath11k/pci.c

reviewed

··· 821 821 return 0; 822 822 } 823 823 824 824 - static void ath11k_pci_power_down(struct ath11k_base *ab) 824 824 + static void ath11k_pci_power_down(struct ath11k_base *ab, bool is_suspend) 825 825 { 826 826 struct ath11k_pci *ab_pci = ath11k_pci_priv(ab); 827 827 ··· 832 832 833 833 ath11k_pci_msi_disable(ab_pci); 834 834 835 835 - ath11k_mhi_stop(ab_pci); 835 835 + ath11k_mhi_stop(ab_pci, is_suspend); 836 836 clear_bit(ATH11K_FLAG_DEVICE_INIT_DONE, &ab->dev_flags); 837 837 ath11k_pci_sw_reset(ab_pci->ab, false); 838 838 } ··· 929 929 { 930 930 struct ath11k_base *ab; 931 931 struct ath11k_pci *ab_pci; 932 932 - u32 soc_hw_version_major, soc_hw_version_minor, addr; 932 932 + u32 soc_hw_version_major, soc_hw_version_minor; 933 933 int ret; 934 934 u32 sub_version; 935 935 ··· 955 955 * from DT. If memory is reserved from DT for FW, ath11k driver need not 956 956 * allocate memory. 957 957 */ 958 958 - ret = of_property_read_u32(ab->dev->of_node, "memory-region", &addr); 959 959 - if (!ret) 958 958 + if (of_property_present(ab->dev->of_node, "memory-region")) 960 959 set_bit(ATH11K_FLAG_FIXED_MEM_RGN, &ab->dev_flags); 961 960 962 961 ret = ath11k_pci_claim(ab_pci, pdev); ··· 1160 1161 ath11k_pci_set_irq_affinity_hint(ab_pci, NULL); 1161 1162 1162 1163 if (test_bit(ATH11K_FLAG_QMI_FAIL, &ab->dev_flags)) { 1163 1163 - ath11k_pci_power_down(ab); 1164 1164 + ath11k_pci_power_down(ab, false); 1164 1165 ath11k_debugfs_soc_destroy(ab); 1165 1166 ath11k_qmi_deinit_service(ab); 1167 1167 + ath11k_core_pm_notifier_unregister(ab); 1166 1168 goto qmi_fail; 1167 1169 } 1168 1170 ··· 1192 1192 struct ath11k_pci *ab_pci = ath11k_pci_priv(ab); 1193 1193 1194 1194 ath11k_pci_set_irq_affinity_hint(ab_pci, NULL); 1195 1195 - ath11k_pci_power_down(ab); 1195 1195 + ath11k_pci_power_down(ab, false); 1196 1196 } 1197 1197 1198 1198 static __maybe_unused int ath11k_pci_pm_suspend(struct device *dev) ··· 1229 1229 return ret; 1230 1230 } 1231 1231 1232 1232 - static SIMPLE_DEV_PM_OPS(ath11k_pci_pm_ops, 1233 1233 - ath11k_pci_pm_suspend, 1234 1234 - ath11k_pci_pm_resume); 1232 1232 + static __maybe_unused int ath11k_pci_pm_suspend_late(struct device *dev) 1233 1233 + { 1234 1234 + struct ath11k_base *ab = dev_get_drvdata(dev); 1235 1235 + int ret; 1236 1236 + 1237 1237 + ret = ath11k_core_suspend_late(ab); 1238 1238 + if (ret) 1239 1239 + ath11k_warn(ab, "failed to late suspend core: %d\n", ret); 1240 1240 + 1241 1241 + /* Similar to ath11k_pci_pm_suspend(), we return success here 1242 1242 + * even error happens, to allow system suspend/hibernation survive. 1243 1243 + */ 1244 1244 + return 0; 1245 1245 + } 1246 1246 + 1247 1247 + static __maybe_unused int ath11k_pci_pm_resume_early(struct device *dev) 1248 1248 + { 1249 1249 + struct ath11k_base *ab = dev_get_drvdata(dev); 1250 1250 + int ret; 1251 1251 + 1252 1252 + ret = ath11k_core_resume_early(ab); 1253 1253 + if (ret) 1254 1254 + ath11k_warn(ab, "failed to early resume core: %d\n", ret); 1255 1255 + 1256 1256 + return ret; 1257 1257 + } 1258 1258 + 1259 1259 + static const struct dev_pm_ops __maybe_unused ath11k_pci_pm_ops = { 1260 1260 + SET_SYSTEM_SLEEP_PM_OPS(ath11k_pci_pm_suspend, 1261 1261 + ath11k_pci_pm_resume) 1262 1262 + SET_LATE_SYSTEM_SLEEP_PM_OPS(ath11k_pci_pm_suspend_late, 1263 1263 + ath11k_pci_pm_resume_early) 1264 1264 + }; 1235 1265 1236 1266 static struct pci_driver ath11k_pci_driver = { 1237 1267 .name = "ath11k_pci",

+2 -2

drivers/net/wireless/ath/ath11k/qmi.c

reviewed

··· 1 1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 2 /* 3 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 7 7 #include <linux/elf.h> ··· 2887 2887 } 2888 2888 2889 2889 /* reset the firmware */ 2890 2890 - ath11k_hif_power_down(ab); 2890 2890 + ath11k_hif_power_down(ab, false); 2891 2891 ath11k_hif_power_up(ab); 2892 2892 ath11k_dbg(ab, ATH11K_DBG_QMI, "exit wait for cold boot done\n"); 2893 2893 return 0;

+1 -1

drivers/net/wireless/ath/ath11k/testmode.c

reviewed

··· 107 107 u32 pdev_id; 108 108 109 109 ath11k_dbg(ab, ATH11K_DBG_TESTMODE, 110 110 - "event wmi cmd_id %d ftm event msg %pK datalen %d\n", 110 110 + "event wmi cmd_id %d ftm event msg %p datalen %d\n", 111 111 cmd_id, ftm_msg, length); 112 112 ath11k_dbg_dump(ab, ATH11K_DBG_TESTMODE, NULL, "", ftm_msg, length); 113 113 pdev_id = DP_HW2SW_MACID(ftm_msg->seg_hdr.pdev_id);

+8

drivers/net/wireless/ath/ath12k/Kconfig

reviewed

··· 15 15 16 16 If you choose to build a module, it'll be called ath12k. 17 17 18 18 + config ATH12K_AHB 19 19 + bool "QTI ath12k AHB support" 20 20 + depends on ATH12K && REMOTEPROC 21 21 + select QCOM_MDT_LOADER 22 22 + select QCOM_SCM 23 23 + help 24 24 + Enable support for Ath12k AHB bus chipsets, example IPQ5332. 25 25 + 18 26 config ATH12K_DEBUG 19 27 bool "ath12k debugging" 20 28 depends on ATH12K

+1

drivers/net/wireless/ath/ath12k/Makefile

reviewed

··· 23 23 fw.o \ 24 24 p2p.o 25 25 26 26 + ath12k-$(CONFIG_ATH12K_AHB) += ahb.o 26 27 ath12k-$(CONFIG_ATH12K_DEBUGFS) += debugfs.o debugfs_htt_stats.o debugfs_sta.o 27 28 ath12k-$(CONFIG_ACPI) += acpi.o 28 29 ath12k-$(CONFIG_ATH12K_TRACING) += trace.o

+1156

drivers/net/wireless/ath/ath12k/ahb.c

reviewed

··· 1 1 + // SPDX-License-Identifier: BSD-3-Clause-Clear 2 2 + /* 3 3 + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 4 + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 + */ 6 6 + 7 7 + #include <linux/dma-mapping.h> 8 8 + #include <linux/firmware/qcom/qcom_scm.h> 9 9 + #include <linux/of.h> 10 10 + #include <linux/of_device.h> 11 11 + #include <linux/platform_device.h> 12 12 + #include <linux/remoteproc.h> 13 13 + #include <linux/soc/qcom/mdt_loader.h> 14 14 + #include <linux/soc/qcom/smem_state.h> 15 15 + #include "ahb.h" 16 16 + #include "debug.h" 17 17 + #include "hif.h" 18 18 + 19 19 + static const struct of_device_id ath12k_ahb_of_match[] = { 20 20 + { .compatible = "qcom,ipq5332-wifi", 21 21 + .data = (void *)ATH12K_HW_IPQ5332_HW10, 22 22 + }, 23 23 + { } 24 24 + }; 25 25 + 26 26 + MODULE_DEVICE_TABLE(of, ath12k_ahb_of_match); 27 27 + 28 28 + #define ATH12K_IRQ_CE0_OFFSET 4 29 29 + #define ATH12K_MAX_UPDS 1 30 30 + #define ATH12K_UPD_IRQ_WRD_LEN 18 31 31 + static const char ath12k_userpd_irq[][9] = {"spawn", 32 32 + "ready", 33 33 + "stop-ack"}; 34 34 + 35 35 + static const char *irq_name[ATH12K_IRQ_NUM_MAX] = { 36 36 + "misc-pulse1", 37 37 + "misc-latch", 38 38 + "sw-exception", 39 39 + "watchdog", 40 40 + "ce0", 41 41 + "ce1", 42 42 + "ce2", 43 43 + "ce3", 44 44 + "ce4", 45 45 + "ce5", 46 46 + "ce6", 47 47 + "ce7", 48 48 + "ce8", 49 49 + "ce9", 50 50 + "ce10", 51 51 + "ce11", 52 52 + "host2wbm-desc-feed", 53 53 + "host2reo-re-injection", 54 54 + "host2reo-command", 55 55 + "host2rxdma-monitor-ring3", 56 56 + "host2rxdma-monitor-ring2", 57 57 + "host2rxdma-monitor-ring1", 58 58 + "reo2ost-exception", 59 59 + "wbm2host-rx-release", 60 60 + "reo2host-status", 61 61 + "reo2host-destination-ring4", 62 62 + "reo2host-destination-ring3", 63 63 + "reo2host-destination-ring2", 64 64 + "reo2host-destination-ring1", 65 65 + "rxdma2host-monitor-destination-mac3", 66 66 + "rxdma2host-monitor-destination-mac2", 67 67 + "rxdma2host-monitor-destination-mac1", 68 68 + "ppdu-end-interrupts-mac3", 69 69 + "ppdu-end-interrupts-mac2", 70 70 + "ppdu-end-interrupts-mac1", 71 71 + "rxdma2host-monitor-status-ring-mac3", 72 72 + "rxdma2host-monitor-status-ring-mac2", 73 73 + "rxdma2host-monitor-status-ring-mac1", 74 74 + "host2rxdma-host-buf-ring-mac3", 75 75 + "host2rxdma-host-buf-ring-mac2", 76 76 + "host2rxdma-host-buf-ring-mac1", 77 77 + "rxdma2host-destination-ring-mac3", 78 78 + "rxdma2host-destination-ring-mac2", 79 79 + "rxdma2host-destination-ring-mac1", 80 80 + "host2tcl-input-ring4", 81 81 + "host2tcl-input-ring3", 82 82 + "host2tcl-input-ring2", 83 83 + "host2tcl-input-ring1", 84 84 + "wbm2host-tx-completions-ring4", 85 85 + "wbm2host-tx-completions-ring3", 86 86 + "wbm2host-tx-completions-ring2", 87 87 + "wbm2host-tx-completions-ring1", 88 88 + "tcl2host-status-ring", 89 89 + }; 90 90 + 91 91 + enum ext_irq_num { 92 92 + host2wbm_desc_feed = 16, 93 93 + host2reo_re_injection, 94 94 + host2reo_command, 95 95 + host2rxdma_monitor_ring3, 96 96 + host2rxdma_monitor_ring2, 97 97 + host2rxdma_monitor_ring1, 98 98 + reo2host_exception, 99 99 + wbm2host_rx_release, 100 100 + reo2host_status, 101 101 + reo2host_destination_ring4, 102 102 + reo2host_destination_ring3, 103 103 + reo2host_destination_ring2, 104 104 + reo2host_destination_ring1, 105 105 + rxdma2host_monitor_destination_mac3, 106 106 + rxdma2host_monitor_destination_mac2, 107 107 + rxdma2host_monitor_destination_mac1, 108 108 + ppdu_end_interrupts_mac3, 109 109 + ppdu_end_interrupts_mac2, 110 110 + ppdu_end_interrupts_mac1, 111 111 + rxdma2host_monitor_status_ring_mac3, 112 112 + rxdma2host_monitor_status_ring_mac2, 113 113 + rxdma2host_monitor_status_ring_mac1, 114 114 + host2rxdma_host_buf_ring_mac3, 115 115 + host2rxdma_host_buf_ring_mac2, 116 116 + host2rxdma_host_buf_ring_mac1, 117 117 + rxdma2host_destination_ring_mac3, 118 118 + rxdma2host_destination_ring_mac2, 119 119 + rxdma2host_destination_ring_mac1, 120 120 + host2tcl_input_ring4, 121 121 + host2tcl_input_ring3, 122 122 + host2tcl_input_ring2, 123 123 + host2tcl_input_ring1, 124 124 + wbm2host_tx_completions_ring4, 125 125 + wbm2host_tx_completions_ring3, 126 126 + wbm2host_tx_completions_ring2, 127 127 + wbm2host_tx_completions_ring1, 128 128 + tcl2host_status_ring, 129 129 + }; 130 130 + 131 131 + static u32 ath12k_ahb_read32(struct ath12k_base *ab, u32 offset) 132 132 + { 133 133 + if (ab->ce_remap && offset < HAL_SEQ_WCSS_CMEM_OFFSET) 134 134 + return ioread32(ab->mem_ce + offset); 135 135 + return ioread32(ab->mem + offset); 136 136 + } 137 137 + 138 138 + static void ath12k_ahb_write32(struct ath12k_base *ab, u32 offset, 139 139 + u32 value) 140 140 + { 141 141 + if (ab->ce_remap && offset < HAL_SEQ_WCSS_CMEM_OFFSET) 142 142 + iowrite32(value, ab->mem_ce + offset); 143 143 + else 144 144 + iowrite32(value, ab->mem + offset); 145 145 + } 146 146 + 147 147 + static void ath12k_ahb_cancel_workqueue(struct ath12k_base *ab) 148 148 + { 149 149 + int i; 150 150 + 151 151 + for (i = 0; i < ab->hw_params->ce_count; i++) { 152 152 + struct ath12k_ce_pipe *ce_pipe = &ab->ce.ce_pipe[i]; 153 153 + 154 154 + if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR) 155 155 + continue; 156 156 + 157 157 + cancel_work_sync(&ce_pipe->intr_wq); 158 158 + } 159 159 + } 160 160 + 161 161 + static void ath12k_ahb_ext_grp_disable(struct ath12k_ext_irq_grp *irq_grp) 162 162 + { 163 163 + int i; 164 164 + 165 165 + for (i = 0; i < irq_grp->num_irq; i++) 166 166 + disable_irq_nosync(irq_grp->ab->irq_num[irq_grp->irqs[i]]); 167 167 + } 168 168 + 169 169 + static void __ath12k_ahb_ext_irq_disable(struct ath12k_base *ab) 170 170 + { 171 171 + int i; 172 172 + 173 173 + for (i = 0; i < ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) { 174 174 + struct ath12k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i]; 175 175 + 176 176 + ath12k_ahb_ext_grp_disable(irq_grp); 177 177 + if (irq_grp->napi_enabled) { 178 178 + napi_synchronize(&irq_grp->napi); 179 179 + napi_disable(&irq_grp->napi); 180 180 + irq_grp->napi_enabled = false; 181 181 + } 182 182 + } 183 183 + } 184 184 + 185 185 + static void ath12k_ahb_ext_grp_enable(struct ath12k_ext_irq_grp *irq_grp) 186 186 + { 187 187 + int i; 188 188 + 189 189 + for (i = 0; i < irq_grp->num_irq; i++) 190 190 + enable_irq(irq_grp->ab->irq_num[irq_grp->irqs[i]]); 191 191 + } 192 192 + 193 193 + static void ath12k_ahb_setbit32(struct ath12k_base *ab, u8 bit, u32 offset) 194 194 + { 195 195 + u32 val; 196 196 + 197 197 + val = ath12k_ahb_read32(ab, offset); 198 198 + ath12k_ahb_write32(ab, offset, val | BIT(bit)); 199 199 + } 200 200 + 201 201 + static void ath12k_ahb_clearbit32(struct ath12k_base *ab, u8 bit, u32 offset) 202 202 + { 203 203 + u32 val; 204 204 + 205 205 + val = ath12k_ahb_read32(ab, offset); 206 206 + ath12k_ahb_write32(ab, offset, val & ~BIT(bit)); 207 207 + } 208 208 + 209 209 + static void ath12k_ahb_ce_irq_enable(struct ath12k_base *ab, u16 ce_id) 210 210 + { 211 211 + const struct ce_attr *ce_attr; 212 212 + const struct ce_ie_addr *ce_ie_addr = ab->hw_params->ce_ie_addr; 213 213 + u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr; 214 214 + 215 215 + ie1_reg_addr = ce_ie_addr->ie1_reg_addr; 216 216 + ie2_reg_addr = ce_ie_addr->ie2_reg_addr; 217 217 + ie3_reg_addr = ce_ie_addr->ie3_reg_addr; 218 218 + 219 219 + ce_attr = &ab->hw_params->host_ce_config[ce_id]; 220 220 + if (ce_attr->src_nentries) 221 221 + ath12k_ahb_setbit32(ab, ce_id, ie1_reg_addr); 222 222 + 223 223 + if (ce_attr->dest_nentries) { 224 224 + ath12k_ahb_setbit32(ab, ce_id, ie2_reg_addr); 225 225 + ath12k_ahb_setbit32(ab, ce_id + CE_HOST_IE_3_SHIFT, 226 226 + ie3_reg_addr); 227 227 + } 228 228 + } 229 229 + 230 230 + static void ath12k_ahb_ce_irq_disable(struct ath12k_base *ab, u16 ce_id) 231 231 + { 232 232 + const struct ce_attr *ce_attr; 233 233 + const struct ce_ie_addr *ce_ie_addr = ab->hw_params->ce_ie_addr; 234 234 + u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr; 235 235 + 236 236 + ie1_reg_addr = ce_ie_addr->ie1_reg_addr; 237 237 + ie2_reg_addr = ce_ie_addr->ie2_reg_addr; 238 238 + ie3_reg_addr = ce_ie_addr->ie3_reg_addr; 239 239 + 240 240 + ce_attr = &ab->hw_params->host_ce_config[ce_id]; 241 241 + if (ce_attr->src_nentries) 242 242 + ath12k_ahb_clearbit32(ab, ce_id, ie1_reg_addr); 243 243 + 244 244 + if (ce_attr->dest_nentries) { 245 245 + ath12k_ahb_clearbit32(ab, ce_id, ie2_reg_addr); 246 246 + ath12k_ahb_clearbit32(ab, ce_id + CE_HOST_IE_3_SHIFT, 247 247 + ie3_reg_addr); 248 248 + } 249 249 + } 250 250 + 251 251 + static void ath12k_ahb_sync_ce_irqs(struct ath12k_base *ab) 252 252 + { 253 253 + int i; 254 254 + int irq_idx; 255 255 + 256 256 + for (i = 0; i < ab->hw_params->ce_count; i++) { 257 257 + if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR) 258 258 + continue; 259 259 + 260 260 + irq_idx = ATH12K_IRQ_CE0_OFFSET + i; 261 261 + synchronize_irq(ab->irq_num[irq_idx]); 262 262 + } 263 263 + } 264 264 + 265 265 + static void ath12k_ahb_sync_ext_irqs(struct ath12k_base *ab) 266 266 + { 267 267 + int i, j; 268 268 + int irq_idx; 269 269 + 270 270 + for (i = 0; i < ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) { 271 271 + struct ath12k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i]; 272 272 + 273 273 + for (j = 0; j < irq_grp->num_irq; j++) { 274 274 + irq_idx = irq_grp->irqs[j]; 275 275 + synchronize_irq(ab->irq_num[irq_idx]); 276 276 + } 277 277 + } 278 278 + } 279 279 + 280 280 + static void ath12k_ahb_ce_irqs_enable(struct ath12k_base *ab) 281 281 + { 282 282 + int i; 283 283 + 284 284 + for (i = 0; i < ab->hw_params->ce_count; i++) { 285 285 + if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR) 286 286 + continue; 287 287 + ath12k_ahb_ce_irq_enable(ab, i); 288 288 + } 289 289 + } 290 290 + 291 291 + static void ath12k_ahb_ce_irqs_disable(struct ath12k_base *ab) 292 292 + { 293 293 + int i; 294 294 + 295 295 + for (i = 0; i < ab->hw_params->ce_count; i++) { 296 296 + if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR) 297 297 + continue; 298 298 + ath12k_ahb_ce_irq_disable(ab, i); 299 299 + } 300 300 + } 301 301 + 302 302 + static int ath12k_ahb_start(struct ath12k_base *ab) 303 303 + { 304 304 + ath12k_ahb_ce_irqs_enable(ab); 305 305 + ath12k_ce_rx_post_buf(ab); 306 306 + 307 307 + return 0; 308 308 + } 309 309 + 310 310 + static void ath12k_ahb_ext_irq_enable(struct ath12k_base *ab) 311 311 + { 312 312 + struct ath12k_ext_irq_grp *irq_grp; 313 313 + int i; 314 314 + 315 315 + for (i = 0; i < ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) { 316 316 + irq_grp = &ab->ext_irq_grp[i]; 317 317 + if (!irq_grp->napi_enabled) { 318 318 + napi_enable(&irq_grp->napi); 319 319 + irq_grp->napi_enabled = true; 320 320 + } 321 321 + ath12k_ahb_ext_grp_enable(irq_grp); 322 322 + } 323 323 + } 324 324 + 325 325 + static void ath12k_ahb_ext_irq_disable(struct ath12k_base *ab) 326 326 + { 327 327 + __ath12k_ahb_ext_irq_disable(ab); 328 328 + ath12k_ahb_sync_ext_irqs(ab); 329 329 + } 330 330 + 331 331 + static void ath12k_ahb_stop(struct ath12k_base *ab) 332 332 + { 333 333 + if (!test_bit(ATH12K_FLAG_CRASH_FLUSH, &ab->dev_flags)) 334 334 + ath12k_ahb_ce_irqs_disable(ab); 335 335 + ath12k_ahb_sync_ce_irqs(ab); 336 336 + ath12k_ahb_cancel_workqueue(ab); 337 337 + timer_delete_sync(&ab->rx_replenish_retry); 338 338 + ath12k_ce_cleanup_pipes(ab); 339 339 + } 340 340 + 341 341 + static int ath12k_ahb_power_up(struct ath12k_base *ab) 342 342 + { 343 343 + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); 344 344 + char fw_name[ATH12K_USERPD_FW_NAME_LEN]; 345 345 + char fw2_name[ATH12K_USERPD_FW_NAME_LEN]; 346 346 + struct device *dev = ab->dev; 347 347 + const struct firmware *fw, *fw2; 348 348 + struct reserved_mem *rmem = NULL; 349 349 + unsigned long time_left; 350 350 + phys_addr_t mem_phys; 351 351 + void *mem_region; 352 352 + size_t mem_size; 353 353 + u32 pasid; 354 354 + int ret; 355 355 + 356 356 + rmem = ath12k_core_get_reserved_mem(ab, 0); 357 357 + if (!rmem) 358 358 + return -ENODEV; 359 359 + 360 360 + mem_phys = rmem->base; 361 361 + mem_size = rmem->size; 362 362 + mem_region = devm_memremap(dev, mem_phys, mem_size, MEMREMAP_WC); 363 363 + if (IS_ERR(mem_region)) { 364 364 + ath12k_err(ab, "unable to map memory region: %pa+%pa\n", 365 365 + &rmem->base, &rmem->size); 366 366 + return PTR_ERR(mem_region); 367 367 + } 368 368 + 369 369 + snprintf(fw_name, sizeof(fw_name), "%s/%s/%s%d%s", ATH12K_FW_DIR, 370 370 + ab->hw_params->fw.dir, ATH12K_AHB_FW_PREFIX, ab_ahb->userpd_id, 371 371 + ATH12K_AHB_FW_SUFFIX); 372 372 + 373 373 + ret = request_firmware(&fw, fw_name, dev); 374 374 + if (ret < 0) { 375 375 + ath12k_err(ab, "request_firmware failed\n"); 376 376 + return ret; 377 377 + } 378 378 + 379 379 + ath12k_dbg(ab, ATH12K_DBG_AHB, "Booting fw image %s, size %zd\n", fw_name, 380 380 + fw->size); 381 381 + 382 382 + if (!fw->size) { 383 383 + ath12k_err(ab, "Invalid firmware size\n"); 384 384 + ret = -EINVAL; 385 385 + goto err_fw; 386 386 + } 387 387 + 388 388 + pasid = (u32_encode_bits(ab_ahb->userpd_id, ATH12K_USERPD_ID_MASK)) | 389 389 + ATH12K_AHB_UPD_SWID; 390 390 + 391 391 + /* Load FW image to a reserved memory location */ 392 392 + ret = qcom_mdt_load(dev, fw, fw_name, pasid, mem_region, mem_phys, mem_size, 393 393 + &mem_phys); 394 394 + if (ret) { 395 395 + ath12k_err(ab, "Failed to load MDT segments: %d\n", ret); 396 396 + goto err_fw; 397 397 + } 398 398 + 399 399 + snprintf(fw2_name, sizeof(fw2_name), "%s/%s/%s", ATH12K_FW_DIR, 400 400 + ab->hw_params->fw.dir, ATH12K_AHB_FW2); 401 401 + 402 402 + ret = request_firmware(&fw2, fw2_name, dev); 403 403 + if (ret < 0) { 404 404 + ath12k_err(ab, "request_firmware failed\n"); 405 405 + goto err_fw; 406 406 + } 407 407 + 408 408 + ath12k_dbg(ab, ATH12K_DBG_AHB, "Booting fw image %s, size %zd\n", fw2_name, 409 409 + fw2->size); 410 410 + 411 411 + if (!fw2->size) { 412 412 + ath12k_err(ab, "Invalid firmware size\n"); 413 413 + ret = -EINVAL; 414 414 + goto err_fw2; 415 415 + } 416 416 + 417 417 + ret = qcom_mdt_load_no_init(dev, fw2, fw2_name, pasid, mem_region, mem_phys, 418 418 + mem_size, &mem_phys); 419 419 + if (ret) { 420 420 + ath12k_err(ab, "Failed to load MDT segments: %d\n", ret); 421 421 + goto err_fw2; 422 422 + } 423 423 + 424 424 + /* Authenticate FW image using peripheral ID */ 425 425 + ret = qcom_scm_pas_auth_and_reset(pasid); 426 426 + if (ret) { 427 427 + ath12k_err(ab, "failed to boot the remote processor %d\n", ret); 428 428 + goto err_fw2; 429 429 + } 430 430 + 431 431 + /* Instruct Q6 to spawn userPD thread */ 432 432 + ret = qcom_smem_state_update_bits(ab_ahb->spawn_state, BIT(ab_ahb->spawn_bit), 433 433 + BIT(ab_ahb->spawn_bit)); 434 434 + if (ret) { 435 435 + ath12k_err(ab, "Failed to update spawn state %d\n", ret); 436 436 + goto err_fw2; 437 437 + } 438 438 + 439 439 + time_left = wait_for_completion_timeout(&ab_ahb->userpd_spawned, 440 440 + ATH12K_USERPD_SPAWN_TIMEOUT); 441 441 + if (!time_left) { 442 442 + ath12k_err(ab, "UserPD spawn wait timed out\n"); 443 443 + ret = -ETIMEDOUT; 444 444 + goto err_fw2; 445 445 + } 446 446 + 447 447 + time_left = wait_for_completion_timeout(&ab_ahb->userpd_ready, 448 448 + ATH12K_USERPD_READY_TIMEOUT); 449 449 + if (!time_left) { 450 450 + ath12k_err(ab, "UserPD ready wait timed out\n"); 451 451 + ret = -ETIMEDOUT; 452 452 + goto err_fw2; 453 453 + } 454 454 + 455 455 + qcom_smem_state_update_bits(ab_ahb->spawn_state, BIT(ab_ahb->spawn_bit), 0); 456 456 + 457 457 + ath12k_dbg(ab, ATH12K_DBG_AHB, "UserPD%d is now UP\n", ab_ahb->userpd_id); 458 458 + 459 459 + err_fw2: 460 460 + release_firmware(fw2); 461 461 + err_fw: 462 462 + release_firmware(fw); 463 463 + return ret; 464 464 + } 465 465 + 466 466 + static void ath12k_ahb_power_down(struct ath12k_base *ab, bool is_suspend) 467 467 + { 468 468 + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); 469 469 + unsigned long time_left; 470 470 + u32 pasid; 471 471 + int ret; 472 472 + 473 473 + qcom_smem_state_update_bits(ab_ahb->stop_state, BIT(ab_ahb->stop_bit), 474 474 + BIT(ab_ahb->stop_bit)); 475 475 + 476 476 + time_left = wait_for_completion_timeout(&ab_ahb->userpd_stopped, 477 477 + ATH12K_USERPD_STOP_TIMEOUT); 478 478 + if (!time_left) { 479 479 + ath12k_err(ab, "UserPD stop wait timed out\n"); 480 480 + return; 481 481 + } 482 482 + 483 483 + qcom_smem_state_update_bits(ab_ahb->stop_state, BIT(ab_ahb->stop_bit), 0); 484 484 + 485 485 + pasid = (u32_encode_bits(ab_ahb->userpd_id, ATH12K_USERPD_ID_MASK)) | 486 486 + ATH12K_AHB_UPD_SWID; 487 487 + /* Release the firmware */ 488 488 + ret = qcom_scm_pas_shutdown(pasid); 489 489 + if (ret) 490 490 + ath12k_err(ab, "scm pas shutdown failed for userPD%d: %d\n", 491 491 + ab_ahb->userpd_id, ret); 492 492 + } 493 493 + 494 494 + static void ath12k_ahb_init_qmi_ce_config(struct ath12k_base *ab) 495 495 + { 496 496 + struct ath12k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg; 497 497 + 498 498 + cfg->tgt_ce_len = ab->hw_params->target_ce_count; 499 499 + cfg->tgt_ce = ab->hw_params->target_ce_config; 500 500 + cfg->svc_to_ce_map_len = ab->hw_params->svc_to_ce_map_len; 501 501 + cfg->svc_to_ce_map = ab->hw_params->svc_to_ce_map; 502 502 + ab->qmi.service_ins_id = ab->hw_params->qmi_service_ins_id; 503 503 + } 504 504 + 505 505 + static void ath12k_ahb_ce_workqueue(struct work_struct *work) 506 506 + { 507 507 + struct ath12k_ce_pipe *ce_pipe = from_work(ce_pipe, work, intr_wq); 508 508 + 509 509 + ath12k_ce_per_engine_service(ce_pipe->ab, ce_pipe->pipe_num); 510 510 + 511 511 + ath12k_ahb_ce_irq_enable(ce_pipe->ab, ce_pipe->pipe_num); 512 512 + } 513 513 + 514 514 + static irqreturn_t ath12k_ahb_ce_interrupt_handler(int irq, void *arg) 515 515 + { 516 516 + struct ath12k_ce_pipe *ce_pipe = arg; 517 517 + 518 518 + /* last interrupt received for this CE */ 519 519 + ce_pipe->timestamp = jiffies; 520 520 + 521 521 + ath12k_ahb_ce_irq_disable(ce_pipe->ab, ce_pipe->pipe_num); 522 522 + 523 523 + queue_work(system_bh_wq, &ce_pipe->intr_wq); 524 524 + 525 525 + return IRQ_HANDLED; 526 526 + } 527 527 + 528 528 + static int ath12k_ahb_ext_grp_napi_poll(struct napi_struct *napi, int budget) 529 529 + { 530 530 + struct ath12k_ext_irq_grp *irq_grp = container_of(napi, 531 531 + struct ath12k_ext_irq_grp, 532 532 + napi); 533 533 + struct ath12k_base *ab = irq_grp->ab; 534 534 + int work_done; 535 535 + 536 536 + work_done = ath12k_dp_service_srng(ab, irq_grp, budget); 537 537 + if (work_done < budget) { 538 538 + napi_complete_done(napi, work_done); 539 539 + ath12k_ahb_ext_grp_enable(irq_grp); 540 540 + } 541 541 + 542 542 + if (work_done > budget) 543 543 + work_done = budget; 544 544 + 545 545 + return work_done; 546 546 + } 547 547 + 548 548 + static irqreturn_t ath12k_ahb_ext_interrupt_handler(int irq, void *arg) 549 549 + { 550 550 + struct ath12k_ext_irq_grp *irq_grp = arg; 551 551 + 552 552 + /* last interrupt received for this group */ 553 553 + irq_grp->timestamp = jiffies; 554 554 + 555 555 + ath12k_ahb_ext_grp_disable(irq_grp); 556 556 + 557 557 + napi_schedule(&irq_grp->napi); 558 558 + 559 559 + return IRQ_HANDLED; 560 560 + } 561 561 + 562 562 + static int ath12k_ahb_config_ext_irq(struct ath12k_base *ab) 563 563 + { 564 564 + const struct ath12k_hw_ring_mask *ring_mask; 565 565 + struct ath12k_ext_irq_grp *irq_grp; 566 566 + const struct hal_ops *hal_ops; 567 567 + int i, j, irq, irq_idx, ret; 568 568 + u32 num_irq; 569 569 + 570 570 + ring_mask = ab->hw_params->ring_mask; 571 571 + hal_ops = ab->hw_params->hal_ops; 572 572 + for (i = 0; i < ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) { 573 573 + irq_grp = &ab->ext_irq_grp[i]; 574 574 + num_irq = 0; 575 575 + 576 576 + irq_grp->ab = ab; 577 577 + irq_grp->grp_id = i; 578 578 + 579 579 + irq_grp->napi_ndev = alloc_netdev_dummy(0); 580 580 + if (!irq_grp->napi_ndev) 581 581 + return -ENOMEM; 582 582 + 583 583 + netif_napi_add(irq_grp->napi_ndev, &irq_grp->napi, 584 584 + ath12k_ahb_ext_grp_napi_poll); 585 585 + 586 586 + for (j = 0; j < ATH12K_EXT_IRQ_NUM_MAX; j++) { 587 587 + /* For TX ring, ensure that the ring mask and the 588 588 + * tcl_to_wbm_rbm_map point to the same ring number. 589 589 + */ 590 590 + if (ring_mask->tx[i] & 591 591 + BIT(hal_ops->tcl_to_wbm_rbm_map[j].wbm_ring_num)) { 592 592 + irq_grp->irqs[num_irq++] = 593 593 + wbm2host_tx_completions_ring1 - j; 594 594 + } 595 595 + 596 596 + if (ring_mask->rx[i] & BIT(j)) { 597 597 + irq_grp->irqs[num_irq++] = 598 598 + reo2host_destination_ring1 - j; 599 599 + } 600 600 + 601 601 + if (ring_mask->rx_err[i] & BIT(j)) 602 602 + irq_grp->irqs[num_irq++] = reo2host_exception; 603 603 + 604 604 + if (ring_mask->rx_wbm_rel[i] & BIT(j)) 605 605 + irq_grp->irqs[num_irq++] = wbm2host_rx_release; 606 606 + 607 607 + if (ring_mask->reo_status[i] & BIT(j)) 608 608 + irq_grp->irqs[num_irq++] = reo2host_status; 609 609 + 610 610 + if (ring_mask->rx_mon_dest[i] & BIT(j)) 611 611 + irq_grp->irqs[num_irq++] = 612 612 + rxdma2host_monitor_destination_mac1; 613 613 + } 614 614 + 615 615 + irq_grp->num_irq = num_irq; 616 616 + 617 617 + for (j = 0; j < irq_grp->num_irq; j++) { 618 618 + irq_idx = irq_grp->irqs[j]; 619 619 + 620 620 + irq = platform_get_irq_byname(ab->pdev, 621 621 + irq_name[irq_idx]); 622 622 + ab->irq_num[irq_idx] = irq; 623 623 + irq_set_status_flags(irq, IRQ_NOAUTOEN | IRQ_DISABLE_UNLAZY); 624 624 + ret = devm_request_irq(ab->dev, irq, 625 625 + ath12k_ahb_ext_interrupt_handler, 626 626 + IRQF_TRIGGER_RISING, 627 627 + irq_name[irq_idx], irq_grp); 628 628 + if (ret) 629 629 + ath12k_warn(ab, "failed request_irq for %d\n", irq); 630 630 + } 631 631 + } 632 632 + 633 633 + return 0; 634 634 + } 635 635 + 636 636 + static int ath12k_ahb_config_irq(struct ath12k_base *ab) 637 637 + { 638 638 + int irq, irq_idx, i; 639 639 + int ret; 640 640 + 641 641 + /* Configure CE irqs */ 642 642 + for (i = 0; i < ab->hw_params->ce_count; i++) { 643 643 + struct ath12k_ce_pipe *ce_pipe = &ab->ce.ce_pipe[i]; 644 644 + 645 645 + if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR) 646 646 + continue; 647 647 + 648 648 + irq_idx = ATH12K_IRQ_CE0_OFFSET + i; 649 649 + 650 650 + INIT_WORK(&ce_pipe->intr_wq, ath12k_ahb_ce_workqueue); 651 651 + irq = platform_get_irq_byname(ab->pdev, irq_name[irq_idx]); 652 652 + ret = devm_request_irq(ab->dev, irq, ath12k_ahb_ce_interrupt_handler, 653 653 + IRQF_TRIGGER_RISING, irq_name[irq_idx], 654 654 + ce_pipe); 655 655 + if (ret) 656 656 + return ret; 657 657 + 658 658 + ab->irq_num[irq_idx] = irq; 659 659 + } 660 660 + 661 661 + /* Configure external interrupts */ 662 662 + ret = ath12k_ahb_config_ext_irq(ab); 663 663 + 664 664 + return ret; 665 665 + } 666 666 + 667 667 + static int ath12k_ahb_map_service_to_pipe(struct ath12k_base *ab, u16 service_id, 668 668 + u8 *ul_pipe, u8 *dl_pipe) 669 669 + { 670 670 + const struct service_to_pipe *entry; 671 671 + bool ul_set = false, dl_set = false; 672 672 + u32 pipedir; 673 673 + int i; 674 674 + 675 675 + for (i = 0; i < ab->hw_params->svc_to_ce_map_len; i++) { 676 676 + entry = &ab->hw_params->svc_to_ce_map[i]; 677 677 + 678 678 + if (__le32_to_cpu(entry->service_id) != service_id) 679 679 + continue; 680 680 + 681 681 + pipedir = __le32_to_cpu(entry->pipedir); 682 682 + if (pipedir == PIPEDIR_IN || pipedir == PIPEDIR_INOUT) { 683 683 + WARN_ON(dl_set); 684 684 + *dl_pipe = __le32_to_cpu(entry->pipenum); 685 685 + dl_set = true; 686 686 + } 687 687 + 688 688 + if (pipedir == PIPEDIR_OUT || pipedir == PIPEDIR_INOUT) { 689 689 + WARN_ON(ul_set); 690 690 + *ul_pipe = __le32_to_cpu(entry->pipenum); 691 691 + ul_set = true; 692 692 + } 693 693 + } 694 694 + 695 695 + if (WARN_ON(!ul_set || !dl_set)) 696 696 + return -ENOENT; 697 697 + 698 698 + return 0; 699 699 + } 700 700 + 701 701 + static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = { 702 702 + .start = ath12k_ahb_start, 703 703 + .stop = ath12k_ahb_stop, 704 704 + .read32 = ath12k_ahb_read32, 705 705 + .write32 = ath12k_ahb_write32, 706 706 + .irq_enable = ath12k_ahb_ext_irq_enable, 707 707 + .irq_disable = ath12k_ahb_ext_irq_disable, 708 708 + .map_service_to_pipe = ath12k_ahb_map_service_to_pipe, 709 709 + .power_up = ath12k_ahb_power_up, 710 710 + .power_down = ath12k_ahb_power_down, 711 711 + }; 712 712 + 713 713 + static irqreturn_t ath12k_userpd_irq_handler(int irq, void *data) 714 714 + { 715 715 + struct ath12k_base *ab = data; 716 716 + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); 717 717 + 718 718 + if (irq == ab_ahb->userpd_irq_num[ATH12K_USERPD_SPAWN_IRQ]) { 719 719 + complete(&ab_ahb->userpd_spawned); 720 720 + } else if (irq == ab_ahb->userpd_irq_num[ATH12K_USERPD_READY_IRQ]) { 721 721 + complete(&ab_ahb->userpd_ready); 722 722 + } else if (irq == ab_ahb->userpd_irq_num[ATH12K_USERPD_STOP_ACK_IRQ]) { 723 723 + complete(&ab_ahb->userpd_stopped); 724 724 + } else { 725 725 + ath12k_err(ab, "Invalid userpd interrupt\n"); 726 726 + return IRQ_NONE; 727 727 + } 728 728 + 729 729 + return IRQ_HANDLED; 730 730 + } 731 731 + 732 732 + static int ath12k_ahb_config_rproc_irq(struct ath12k_base *ab) 733 733 + { 734 734 + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); 735 735 + int i, ret; 736 736 + char *upd_irq_name; 737 737 + 738 738 + for (i = 0; i < ATH12K_USERPD_MAX_IRQ; i++) { 739 739 + ab_ahb->userpd_irq_num[i] = platform_get_irq_byname(ab->pdev, 740 740 + ath12k_userpd_irq[i]); 741 741 + if (ab_ahb->userpd_irq_num[i] < 0) 742 742 + return ab_ahb->userpd_irq_num[i]; 743 743 + 744 744 + upd_irq_name = devm_kzalloc(&ab->pdev->dev, ATH12K_UPD_IRQ_WRD_LEN, 745 745 + GFP_KERNEL); 746 746 + if (!upd_irq_name) 747 747 + return -ENOMEM; 748 748 + 749 749 + scnprintf(upd_irq_name, ATH12K_UPD_IRQ_WRD_LEN, "UserPD%u-%s", 750 750 + ab_ahb->userpd_id, ath12k_userpd_irq[i]); 751 751 + ret = devm_request_threaded_irq(&ab->pdev->dev, ab_ahb->userpd_irq_num[i], 752 752 + NULL, ath12k_userpd_irq_handler, 753 753 + IRQF_TRIGGER_RISING | IRQF_ONESHOT, 754 754 + upd_irq_name, ab); 755 755 + if (ret) 756 756 + return dev_err_probe(&ab->pdev->dev, ret, 757 757 + "Request %s irq failed: %d\n", 758 758 + ath12k_userpd_irq[i], ret); 759 759 + } 760 760 + 761 761 + ab_ahb->spawn_state = devm_qcom_smem_state_get(&ab->pdev->dev, "spawn", 762 762 + &ab_ahb->spawn_bit); 763 763 + if (IS_ERR(ab_ahb->spawn_state)) 764 764 + return dev_err_probe(&ab->pdev->dev, PTR_ERR(ab_ahb->spawn_state), 765 765 + "Failed to acquire spawn state\n"); 766 766 + 767 767 + ab_ahb->stop_state = devm_qcom_smem_state_get(&ab->pdev->dev, "stop", 768 768 + &ab_ahb->stop_bit); 769 769 + if (IS_ERR(ab_ahb->stop_state)) 770 770 + return dev_err_probe(&ab->pdev->dev, PTR_ERR(ab_ahb->stop_state), 771 771 + "Failed to acquire stop state\n"); 772 772 + 773 773 + init_completion(&ab_ahb->userpd_spawned); 774 774 + init_completion(&ab_ahb->userpd_ready); 775 775 + init_completion(&ab_ahb->userpd_stopped); 776 776 + return 0; 777 777 + } 778 778 + 779 779 + static int ath12k_ahb_root_pd_state_notifier(struct notifier_block *nb, 780 780 + const unsigned long event, void *data) 781 781 + { 782 782 + struct ath12k_ahb *ab_ahb = container_of(nb, struct ath12k_ahb, root_pd_nb); 783 783 + struct ath12k_base *ab = ab_ahb->ab; 784 784 + 785 785 + if (event == ATH12K_RPROC_AFTER_POWERUP) { 786 786 + ath12k_dbg(ab, ATH12K_DBG_AHB, "Root PD is UP\n"); 787 787 + complete(&ab_ahb->rootpd_ready); 788 788 + } 789 789 + 790 790 + return 0; 791 791 + } 792 792 + 793 793 + static int ath12k_ahb_register_rproc_notifier(struct ath12k_base *ab) 794 794 + { 795 795 + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); 796 796 + 797 797 + ab_ahb->root_pd_nb.notifier_call = ath12k_ahb_root_pd_state_notifier; 798 798 + init_completion(&ab_ahb->rootpd_ready); 799 799 + 800 800 + ab_ahb->root_pd_notifier = qcom_register_ssr_notifier(ab_ahb->tgt_rproc->name, 801 801 + &ab_ahb->root_pd_nb); 802 802 + if (IS_ERR(ab_ahb->root_pd_notifier)) 803 803 + return PTR_ERR(ab_ahb->root_pd_notifier); 804 804 + 805 805 + return 0; 806 806 + } 807 807 + 808 808 + static void ath12k_ahb_unregister_rproc_notifier(struct ath12k_base *ab) 809 809 + { 810 810 + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); 811 811 + 812 812 + if (!ab_ahb->root_pd_notifier) { 813 813 + ath12k_err(ab, "Rproc notifier not registered\n"); 814 814 + return; 815 815 + } 816 816 + 817 817 + qcom_unregister_ssr_notifier(ab_ahb->root_pd_notifier, 818 818 + &ab_ahb->root_pd_nb); 819 819 + ab_ahb->root_pd_notifier = NULL; 820 820 + } 821 821 + 822 822 + static int ath12k_ahb_get_rproc(struct ath12k_base *ab) 823 823 + { 824 824 + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); 825 825 + struct device *dev = ab->dev; 826 826 + struct device_node *np; 827 827 + struct rproc *prproc; 828 828 + 829 829 + np = of_parse_phandle(dev->of_node, "qcom,rproc", 0); 830 830 + if (!np) { 831 831 + ath12k_err(ab, "failed to get q6_rproc handle\n"); 832 832 + return -ENOENT; 833 833 + } 834 834 + 835 835 + prproc = rproc_get_by_phandle(np->phandle); 836 836 + of_node_put(np); 837 837 + if (!prproc) 838 838 + return dev_err_probe(&ab->pdev->dev, -EPROBE_DEFER, 839 839 + "failed to get rproc\n"); 840 840 + 841 841 + ab_ahb->tgt_rproc = prproc; 842 842 + 843 843 + return 0; 844 844 + } 845 845 + 846 846 + static int ath12k_ahb_boot_root_pd(struct ath12k_base *ab) 847 847 + { 848 848 + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); 849 849 + unsigned long time_left; 850 850 + int ret; 851 851 + 852 852 + ret = rproc_boot(ab_ahb->tgt_rproc); 853 853 + if (ret < 0) { 854 854 + ath12k_err(ab, "RootPD boot failed\n"); 855 855 + return ret; 856 856 + } 857 857 + 858 858 + time_left = wait_for_completion_timeout(&ab_ahb->rootpd_ready, 859 859 + ATH12K_ROOTPD_READY_TIMEOUT); 860 860 + if (!time_left) { 861 861 + ath12k_err(ab, "RootPD ready wait timed out\n"); 862 862 + return -ETIMEDOUT; 863 863 + } 864 864 + 865 865 + return 0; 866 866 + } 867 867 + 868 868 + static int ath12k_ahb_configure_rproc(struct ath12k_base *ab) 869 869 + { 870 870 + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); 871 871 + int ret; 872 872 + 873 873 + ret = ath12k_ahb_get_rproc(ab); 874 874 + if (ret < 0) 875 875 + return ret; 876 876 + 877 877 + ret = ath12k_ahb_register_rproc_notifier(ab); 878 878 + if (ret < 0) { 879 879 + ret = dev_err_probe(&ab->pdev->dev, ret, 880 880 + "failed to register rproc notifier\n"); 881 881 + goto err_put_rproc; 882 882 + } 883 883 + 884 884 + if (ab_ahb->tgt_rproc->state != RPROC_RUNNING) { 885 885 + ret = ath12k_ahb_boot_root_pd(ab); 886 886 + if (ret < 0) { 887 887 + ath12k_err(ab, "failed to boot the remote processor Q6\n"); 888 888 + goto err_unreg_notifier; 889 889 + } 890 890 + } 891 891 + 892 892 + return ath12k_ahb_config_rproc_irq(ab); 893 893 + 894 894 + err_unreg_notifier: 895 895 + ath12k_ahb_unregister_rproc_notifier(ab); 896 896 + 897 897 + err_put_rproc: 898 898 + rproc_put(ab_ahb->tgt_rproc); 899 899 + return ret; 900 900 + } 901 901 + 902 902 + static void ath12k_ahb_deconfigure_rproc(struct ath12k_base *ab) 903 903 + { 904 904 + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); 905 905 + 906 906 + ath12k_ahb_unregister_rproc_notifier(ab); 907 907 + rproc_put(ab_ahb->tgt_rproc); 908 908 + } 909 909 + 910 910 + static int ath12k_ahb_resource_init(struct ath12k_base *ab) 911 911 + { 912 912 + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); 913 913 + struct platform_device *pdev = ab->pdev; 914 914 + struct resource *mem_res; 915 915 + int ret; 916 916 + 917 917 + ab->mem = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res); 918 918 + if (IS_ERR(ab->mem)) { 919 919 + ret = dev_err_probe(&pdev->dev, PTR_ERR(ab->mem), "ioremap error\n"); 920 920 + goto out; 921 921 + } 922 922 + 923 923 + ab->mem_len = resource_size(mem_res); 924 924 + 925 925 + if (ab->hw_params->ce_remap) { 926 926 + const struct ce_remap *ce_remap = ab->hw_params->ce_remap; 927 927 + /* CE register space is moved out of WCSS and the space is not 928 928 + * contiguous, hence remapping the CE registers to a new space 929 929 + * for accessing them. 930 930 + */ 931 931 + ab->mem_ce = ioremap(ce_remap->base, ce_remap->size); 932 932 + if (!ab->mem_ce) { 933 933 + dev_err(&pdev->dev, "ce ioremap error\n"); 934 934 + ret = -ENOMEM; 935 935 + goto err_mem_unmap; 936 936 + } 937 937 + ab->ce_remap = true; 938 938 + ab->ce_remap_base_addr = HAL_IPQ5332_CE_WFSS_REG_BASE; 939 939 + } 940 940 + 941 941 + ab_ahb->xo_clk = devm_clk_get(ab->dev, "xo"); 942 942 + if (IS_ERR(ab_ahb->xo_clk)) { 943 943 + ret = dev_err_probe(&pdev->dev, PTR_ERR(ab_ahb->xo_clk), 944 944 + "failed to get xo clock\n"); 945 945 + goto err_mem_ce_unmap; 946 946 + } 947 947 + 948 948 + ret = clk_prepare_enable(ab_ahb->xo_clk); 949 949 + if (ret) { 950 950 + dev_err(&pdev->dev, "failed to enable gcc_xo_clk: %d\n", ret); 951 951 + goto err_clock_deinit; 952 952 + } 953 953 + 954 954 + return 0; 955 955 + 956 956 + err_clock_deinit: 957 957 + devm_clk_put(ab->dev, ab_ahb->xo_clk); 958 958 + 959 959 + err_mem_ce_unmap: 960 960 + ab_ahb->xo_clk = NULL; 961 961 + if (ab->hw_params->ce_remap) 962 962 + iounmap(ab->mem_ce); 963 963 + 964 964 + err_mem_unmap: 965 965 + ab->mem_ce = NULL; 966 966 + devm_iounmap(ab->dev, ab->mem); 967 967 + 968 968 + out: 969 969 + ab->mem = NULL; 970 970 + return ret; 971 971 + } 972 972 + 973 973 + static void ath12k_ahb_resource_deinit(struct ath12k_base *ab) 974 974 + { 975 975 + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); 976 976 + 977 977 + if (ab->mem) 978 978 + devm_iounmap(ab->dev, ab->mem); 979 979 + 980 980 + if (ab->mem_ce) 981 981 + iounmap(ab->mem_ce); 982 982 + 983 983 + ab->mem = NULL; 984 984 + ab->mem_ce = NULL; 985 985 + 986 986 + clk_disable_unprepare(ab_ahb->xo_clk); 987 987 + devm_clk_put(ab->dev, ab_ahb->xo_clk); 988 988 + ab_ahb->xo_clk = NULL; 989 989 + } 990 990 + 991 991 + static int ath12k_ahb_probe(struct platform_device *pdev) 992 992 + { 993 993 + struct ath12k_base *ab; 994 994 + const struct ath12k_hif_ops *hif_ops; 995 995 + struct ath12k_ahb *ab_ahb; 996 996 + enum ath12k_hw_rev hw_rev; 997 997 + u32 addr, userpd_id; 998 998 + int ret; 999 999 + 1000 1000 + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 1001 1001 + if (ret) { 1002 1002 + dev_err(&pdev->dev, "Failed to set 32-bit coherent dma\n"); 1003 1003 + return ret; 1004 1004 + } 1005 1005 + 1006 1006 + ab = ath12k_core_alloc(&pdev->dev, sizeof(struct ath12k_ahb), 1007 1007 + ATH12K_BUS_AHB); 1008 1008 + if (!ab) 1009 1009 + return -ENOMEM; 1010 1010 + 1011 1011 + hw_rev = (enum ath12k_hw_rev)(kernel_ulong_t)of_device_get_match_data(&pdev->dev); 1012 1012 + switch (hw_rev) { 1013 1013 + case ATH12K_HW_IPQ5332_HW10: 1014 1014 + hif_ops = &ath12k_ahb_hif_ops_ipq5332; 1015 1015 + userpd_id = ATH12K_IPQ5332_USERPD_ID; 1016 1016 + break; 1017 1017 + default: 1018 1018 + ret = -EOPNOTSUPP; 1019 1019 + goto err_core_free; 1020 1020 + } 1021 1021 + 1022 1022 + ab->hif.ops = hif_ops; 1023 1023 + ab->pdev = pdev; 1024 1024 + ab->hw_rev = hw_rev; 1025 1025 + platform_set_drvdata(pdev, ab); 1026 1026 + ab_ahb = ath12k_ab_to_ahb(ab); 1027 1027 + ab_ahb->ab = ab; 1028 1028 + ab_ahb->userpd_id = userpd_id; 1029 1029 + 1030 1030 + /* Set fixed_mem_region to true for platforms that support fixed memory 1031 1031 + * reservation from DT. If memory is reserved from DT for FW, ath12k driver 1032 1032 + * need not to allocate memory. 1033 1033 + */ 1034 1034 + if (!of_property_read_u32(ab->dev->of_node, "memory-region", &addr)) 1035 1035 + set_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags); 1036 1036 + 1037 1037 + ret = ath12k_core_pre_init(ab); 1038 1038 + if (ret) 1039 1039 + goto err_core_free; 1040 1040 + 1041 1041 + ret = ath12k_ahb_resource_init(ab); 1042 1042 + if (ret) 1043 1043 + goto err_core_free; 1044 1044 + 1045 1045 + ret = ath12k_hal_srng_init(ab); 1046 1046 + if (ret) 1047 1047 + goto err_resource_deinit; 1048 1048 + 1049 1049 + ret = ath12k_ce_alloc_pipes(ab); 1050 1050 + if (ret) { 1051 1051 + ath12k_err(ab, "failed to allocate ce pipes: %d\n", ret); 1052 1052 + goto err_hal_srng_deinit; 1053 1053 + } 1054 1054 + 1055 1055 + ath12k_ahb_init_qmi_ce_config(ab); 1056 1056 + 1057 1057 + ret = ath12k_ahb_configure_rproc(ab); 1058 1058 + if (ret) 1059 1059 + goto err_ce_free; 1060 1060 + 1061 1061 + ret = ath12k_ahb_config_irq(ab); 1062 1062 + if (ret) { 1063 1063 + ath12k_err(ab, "failed to configure irq: %d\n", ret); 1064 1064 + goto err_rproc_deconfigure; 1065 1065 + } 1066 1066 + 1067 1067 + ret = ath12k_core_init(ab); 1068 1068 + if (ret) { 1069 1069 + ath12k_err(ab, "failed to init core: %d\n", ret); 1070 1070 + goto err_rproc_deconfigure; 1071 1071 + } 1072 1072 + 1073 1073 + return 0; 1074 1074 + 1075 1075 + err_rproc_deconfigure: 1076 1076 + ath12k_ahb_deconfigure_rproc(ab); 1077 1077 + 1078 1078 + err_ce_free: 1079 1079 + ath12k_ce_free_pipes(ab); 1080 1080 + 1081 1081 + err_hal_srng_deinit: 1082 1082 + ath12k_hal_srng_deinit(ab); 1083 1083 + 1084 1084 + err_resource_deinit: 1085 1085 + ath12k_ahb_resource_deinit(ab); 1086 1086 + 1087 1087 + err_core_free: 1088 1088 + ath12k_core_free(ab); 1089 1089 + platform_set_drvdata(pdev, NULL); 1090 1090 + 1091 1091 + return ret; 1092 1092 + } 1093 1093 + 1094 1094 + static void ath12k_ahb_remove_prepare(struct ath12k_base *ab) 1095 1095 + { 1096 1096 + unsigned long left; 1097 1097 + 1098 1098 + if (test_bit(ATH12K_FLAG_RECOVERY, &ab->dev_flags)) { 1099 1099 + left = wait_for_completion_timeout(&ab->driver_recovery, 1100 1100 + ATH12K_AHB_RECOVERY_TIMEOUT); 1101 1101 + if (!left) 1102 1102 + ath12k_warn(ab, "failed to receive recovery response completion\n"); 1103 1103 + } 1104 1104 + 1105 1105 + set_bit(ATH12K_FLAG_UNREGISTERING, &ab->dev_flags); 1106 1106 + cancel_work_sync(&ab->restart_work); 1107 1107 + cancel_work_sync(&ab->qmi.event_work); 1108 1108 + } 1109 1109 + 1110 1110 + static void ath12k_ahb_free_resources(struct ath12k_base *ab) 1111 1111 + { 1112 1112 + struct platform_device *pdev = ab->pdev; 1113 1113 + 1114 1114 + ath12k_hal_srng_deinit(ab); 1115 1115 + ath12k_ce_free_pipes(ab); 1116 1116 + ath12k_ahb_resource_deinit(ab); 1117 1117 + ath12k_ahb_deconfigure_rproc(ab); 1118 1118 + ath12k_core_free(ab); 1119 1119 + platform_set_drvdata(pdev, NULL); 1120 1120 + } 1121 1121 + 1122 1122 + static void ath12k_ahb_remove(struct platform_device *pdev) 1123 1123 + { 1124 1124 + struct ath12k_base *ab = platform_get_drvdata(pdev); 1125 1125 + 1126 1126 + if (test_bit(ATH12K_FLAG_QMI_FAIL, &ab->dev_flags)) { 1127 1127 + ath12k_ahb_power_down(ab, false); 1128 1128 + ath12k_qmi_deinit_service(ab); 1129 1129 + goto qmi_fail; 1130 1130 + } 1131 1131 + 1132 1132 + ath12k_ahb_remove_prepare(ab); 1133 1133 + ath12k_core_deinit(ab); 1134 1134 + 1135 1135 + qmi_fail: 1136 1136 + ath12k_ahb_free_resources(ab); 1137 1137 + } 1138 1138 + 1139 1139 + static struct platform_driver ath12k_ahb_driver = { 1140 1140 + .driver = { 1141 1141 + .name = "ath12k_ahb", 1142 1142 + .of_match_table = ath12k_ahb_of_match, 1143 1143 + }, 1144 1144 + .probe = ath12k_ahb_probe, 1145 1145 + .remove = ath12k_ahb_remove, 1146 1146 + }; 1147 1147 + 1148 1148 + int ath12k_ahb_init(void) 1149 1149 + { 1150 1150 + return platform_driver_register(&ath12k_ahb_driver); 1151 1151 + } 1152 1152 + 1153 1153 + void ath12k_ahb_exit(void) 1154 1154 + { 1155 1155 + platform_driver_unregister(&ath12k_ahb_driver); 1156 1156 + }

+80

drivers/net/wireless/ath/ath12k/ahb.h

reviewed

··· 1 1 + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 2 + /* 3 3 + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 4 + * Copyright (c) 2022-2025, Qualcomm Innovation Center, Inc. All rights reserved. 5 5 + */ 6 6 + #ifndef ATH12K_AHB_H 7 7 + #define ATH12K_AHB_H 8 8 + 9 9 + #include <linux/clk.h> 10 10 + #include <linux/remoteproc/qcom_rproc.h> 11 11 + #include "core.h" 12 12 + 13 13 + #define ATH12K_AHB_RECOVERY_TIMEOUT (3 * HZ) 14 14 + 15 15 + #define ATH12K_AHB_SMP2P_SMEM_MSG GENMASK(15, 0) 16 16 + #define ATH12K_AHB_SMP2P_SMEM_SEQ_NO GENMASK(31, 16) 17 17 + #define ATH12K_AHB_SMP2P_SMEM_VALUE_MASK 0xFFFFFFFF 18 18 + #define ATH12K_PCI_CE_WAKE_IRQ 2 19 19 + #define ATH12K_PCI_IRQ_CE0_OFFSET 3 20 20 + #define ATH12K_ROOTPD_READY_TIMEOUT (5 * HZ) 21 21 + #define ATH12K_RPROC_AFTER_POWERUP QCOM_SSR_AFTER_POWERUP 22 22 + #define ATH12K_AHB_FW_PREFIX "q6_fw" 23 23 + #define ATH12K_AHB_FW_SUFFIX ".mdt" 24 24 + #define ATH12K_AHB_FW2 "iu_fw.mdt" 25 25 + #define ATH12K_AHB_UPD_SWID 0x12 26 26 + #define ATH12K_USERPD_SPAWN_TIMEOUT (5 * HZ) 27 27 + #define ATH12K_USERPD_READY_TIMEOUT (10 * HZ) 28 28 + #define ATH12K_USERPD_STOP_TIMEOUT (5 * HZ) 29 29 + #define ATH12K_USERPD_ID_MASK GENMASK(9, 8) 30 30 + #define ATH12K_USERPD_FW_NAME_LEN 35 31 31 + 32 32 + enum ath12k_ahb_smp2p_msg_id { 33 33 + ATH12K_AHB_POWER_SAVE_ENTER = 1, 34 34 + ATH12K_AHB_POWER_SAVE_EXIT, 35 35 + }; 36 36 + 37 37 + enum ath12k_ahb_userpd_irq { 38 38 + ATH12K_USERPD_SPAWN_IRQ, 39 39 + ATH12K_USERPD_READY_IRQ, 40 40 + ATH12K_USERPD_STOP_ACK_IRQ, 41 41 + ATH12K_USERPD_MAX_IRQ, 42 42 + }; 43 43 + 44 44 + struct ath12k_base; 45 45 + 46 46 + struct ath12k_ahb { 47 47 + struct ath12k_base *ab; 48 48 + struct rproc *tgt_rproc; 49 49 + struct clk *xo_clk; 50 50 + struct completion rootpd_ready; 51 51 + struct notifier_block root_pd_nb; 52 52 + void *root_pd_notifier; 53 53 + struct qcom_smem_state *spawn_state; 54 54 + struct qcom_smem_state *stop_state; 55 55 + struct completion userpd_spawned; 56 56 + struct completion userpd_ready; 57 57 + struct completion userpd_stopped; 58 58 + u32 userpd_id; 59 59 + u32 spawn_bit; 60 60 + u32 stop_bit; 61 61 + int userpd_irq_num[ATH12K_USERPD_MAX_IRQ]; 62 62 + }; 63 63 + 64 64 + static inline struct ath12k_ahb *ath12k_ab_to_ahb(struct ath12k_base *ab) 65 65 + { 66 66 + return (struct ath12k_ahb *)ab->drv_priv; 67 67 + } 68 68 + 69 69 + #ifdef CONFIG_ATH12K_AHB 70 70 + int ath12k_ahb_init(void); 71 71 + void ath12k_ahb_exit(void); 72 72 + #else 73 73 + static inline int ath12k_ahb_init(void) 74 74 + { 75 75 + return 0; 76 76 + } 77 77 + 78 78 + static inline void ath12k_ahb_exit(void) {}; 79 79 + #endif 80 80 + #endif

+91 -1

drivers/net/wireless/ath/ath12k/ce.c

reviewed

··· 1 1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 2 /* 3 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2022, 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 7 7 #include "dp_rx.h" ··· 217 217 .dest_nentries = 0, 218 218 }, 219 219 220 220 + }; 221 221 + 222 222 + const struct ce_attr ath12k_host_ce_config_ipq5332[] = { 223 223 + /* CE0: host->target HTC control and raw streams */ 224 224 + { 225 225 + .flags = CE_ATTR_FLAGS, 226 226 + .src_nentries = 16, 227 227 + .src_sz_max = 2048, 228 228 + .dest_nentries = 0, 229 229 + }, 230 230 + /* CE1: target->host HTT + HTC control */ 231 231 + { 232 232 + .flags = CE_ATTR_FLAGS, 233 233 + .src_nentries = 0, 234 234 + .src_sz_max = 2048, 235 235 + .dest_nentries = 512, 236 236 + .recv_cb = ath12k_htc_rx_completion_handler, 237 237 + }, 238 238 + /* CE2: target->host WMI */ 239 239 + { 240 240 + .flags = CE_ATTR_FLAGS, 241 241 + .src_nentries = 0, 242 242 + .src_sz_max = 2048, 243 243 + .dest_nentries = 128, 244 244 + .recv_cb = ath12k_htc_rx_completion_handler, 245 245 + }, 246 246 + /* CE3: host->target WMI */ 247 247 + { 248 248 + .flags = CE_ATTR_FLAGS, 249 249 + .src_nentries = 32, 250 250 + .src_sz_max = 2048, 251 251 + .dest_nentries = 0, 252 252 + }, 253 253 + /* CE4: host->target HTT */ 254 254 + { 255 255 + .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR, 256 256 + .src_nentries = 2048, 257 257 + .src_sz_max = 256, 258 258 + .dest_nentries = 0, 259 259 + }, 260 260 + /* CE5: target -> host PKTLOG */ 261 261 + { 262 262 + .flags = CE_ATTR_FLAGS, 263 263 + .src_nentries = 0, 264 264 + .src_sz_max = 2048, 265 265 + .dest_nentries = 512, 266 266 + .recv_cb = ath12k_dp_htt_htc_t2h_msg_handler, 267 267 + }, 268 268 + /* CE6: Target autonomous HIF_memcpy */ 269 269 + { 270 270 + .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR, 271 271 + .src_nentries = 0, 272 272 + .src_sz_max = 0, 273 273 + .dest_nentries = 0, 274 274 + }, 275 275 + /* CE7: CV Prefetch */ 276 276 + { 277 277 + .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR, 278 278 + .src_nentries = 0, 279 279 + .src_sz_max = 0, 280 280 + .dest_nentries = 0, 281 281 + }, 282 282 + /* CE8: Target HIF memcpy (Generic HIF memcypy) */ 283 283 + { 284 284 + .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR, 285 285 + .src_nentries = 0, 286 286 + .src_sz_max = 0, 287 287 + .dest_nentries = 0, 288 288 + }, 289 289 + /* CE9: WMI logging/CFR/Spectral/Radar */ 290 290 + { 291 291 + .flags = CE_ATTR_FLAGS, 292 292 + .src_nentries = 0, 293 293 + .src_sz_max = 2048, 294 294 + .dest_nentries = 128, 295 295 + }, 296 296 + /* CE10: Unused */ 297 297 + { 298 298 + .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR, 299 299 + .src_nentries = 0, 300 300 + .src_sz_max = 0, 301 301 + .dest_nentries = 0, 302 302 + }, 303 303 + /* CE11: Unused */ 304 304 + { 305 305 + .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR, 306 306 + .src_nentries = 0, 307 307 + .src_sz_max = 0, 308 308 + .dest_nentries = 0, 309 309 + }, 220 310 }; 221 311 222 312 static int ath12k_ce_rx_buf_enqueue_pipe(struct ath12k_ce_pipe *pipe,

+15 -3

drivers/net/wireless/ath/ath12k/ce.h

reviewed

··· 1 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 2 /* 3 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2022, 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 7 7 #ifndef ATH12K_CE_H ··· 39 39 #define PIPEDIR_INOUT_H2H 4 /* bidirectional, host to host */ 40 40 41 41 /* CE address/mask */ 42 42 - #define CE_HOST_IE_ADDRESS 0x00A1803C 43 43 - #define CE_HOST_IE_2_ADDRESS 0x00A18040 42 42 + #define CE_HOST_IE_ADDRESS 0x75804C 43 43 + #define CE_HOST_IE_2_ADDRESS 0x758050 44 44 #define CE_HOST_IE_3_ADDRESS CE_HOST_IE_ADDRESS 45 45 46 46 #define CE_HOST_IE_3_SHIFT 0xC ··· 74 74 __le32 nbytes_max; 75 75 __le32 flags; 76 76 __le32 reserved; 77 77 + }; 78 78 + 79 79 + struct ce_ie_addr { 80 80 + u32 ie1_reg_addr; 81 81 + u32 ie2_reg_addr; 82 82 + u32 ie3_reg_addr; 83 83 + }; 84 84 + 85 85 + struct ce_remap { 86 86 + u32 base; 87 87 + u32 size; 77 88 }; 78 89 79 90 struct ce_attr { ··· 175 164 176 165 extern const struct ce_attr ath12k_host_ce_config_qcn9274[]; 177 166 extern const struct ce_attr ath12k_host_ce_config_wcn7850[]; 167 167 + extern const struct ce_attr ath12k_host_ce_config_ipq5332[]; 178 168 179 169 void ath12k_ce_cleanup_pipes(struct ath12k_base *ab); 180 170 void ath12k_ce_rx_replenish_retry(struct timer_list *t);

+267 -25

drivers/net/wireless/ath/ath12k/core.c

reviewed

··· 10 10 #include <linux/firmware.h> 11 11 #include <linux/of.h> 12 12 #include <linux/of_graph.h> 13 13 + #include "ahb.h" 13 14 #include "core.h" 14 15 #include "dp_tx.h" 15 16 #include "dp_rx.h" 16 17 #include "debug.h" 17 17 - #include "hif.h" 18 18 - #include "fw.h" 19 18 #include "debugfs.h" 19 19 + #include "fw.h" 20 20 + #include "hif.h" 21 21 + #include "pci.h" 20 22 #include "wow.h" 21 23 24 24 + static int ahb_err, pci_err; 22 25 unsigned int ath12k_debug_mask; 23 26 module_param_named(debug_mask, ath12k_debug_mask, uint, 0644); 24 27 MODULE_PARM_DESC(debug_mask, "Debugging mask"); ··· 615 612 return TARGET_NUM_TIDS(SINGLE); 616 613 } 617 614 615 615 + struct reserved_mem *ath12k_core_get_reserved_mem(struct ath12k_base *ab, 616 616 + int index) 617 617 + { 618 618 + struct device *dev = ab->dev; 619 619 + struct reserved_mem *rmem; 620 620 + struct device_node *node; 621 621 + 622 622 + node = of_parse_phandle(dev->of_node, "memory-region", index); 623 623 + if (!node) { 624 624 + ath12k_dbg(ab, ATH12K_DBG_BOOT, 625 625 + "failed to parse memory-region for index %d\n", index); 626 626 + return NULL; 627 627 + } 628 628 + 629 629 + rmem = of_reserved_mem_lookup(node); 630 630 + of_node_put(node); 631 631 + if (!rmem) { 632 632 + ath12k_dbg(ab, ATH12K_DBG_BOOT, 633 633 + "unable to get memory-region for index %d\n", index); 634 634 + return NULL; 635 635 + } 636 636 + 637 637 + return rmem; 638 638 + } 639 639 + 640 640 + static inline 641 641 + void ath12k_core_to_group_ref_get(struct ath12k_base *ab) 642 642 + { 643 643 + struct ath12k_hw_group *ag = ab->ag; 644 644 + 645 645 + lockdep_assert_held(&ag->mutex); 646 646 + 647 647 + if (ab->hw_group_ref) { 648 648 + ath12k_dbg(ab, ATH12K_DBG_BOOT, "core already attached to group %d\n", 649 649 + ag->id); 650 650 + return; 651 651 + } 652 652 + 653 653 + ab->hw_group_ref = true; 654 654 + ag->num_started++; 655 655 + 656 656 + ath12k_dbg(ab, ATH12K_DBG_BOOT, "core attached to group %d, num_started %d\n", 657 657 + ag->id, ag->num_started); 658 658 + } 659 659 + 660 660 + static inline 661 661 + void ath12k_core_to_group_ref_put(struct ath12k_base *ab) 662 662 + { 663 663 + struct ath12k_hw_group *ag = ab->ag; 664 664 + 665 665 + lockdep_assert_held(&ag->mutex); 666 666 + 667 667 + if (!ab->hw_group_ref) { 668 668 + ath12k_dbg(ab, ATH12K_DBG_BOOT, "core already de-attached from group %d\n", 669 669 + ag->id); 670 670 + return; 671 671 + } 672 672 + 673 673 + ab->hw_group_ref = false; 674 674 + ag->num_started--; 675 675 + 676 676 + ath12k_dbg(ab, ATH12K_DBG_BOOT, "core de-attached from group %d, num_started %d\n", 677 677 + ag->id, ag->num_started); 678 678 + } 679 679 + 618 680 static void ath12k_core_stop(struct ath12k_base *ab) 619 681 { 620 620 - ath12k_core_stopped(ab); 682 682 + ath12k_core_to_group_ref_put(ab); 621 683 622 684 if (!test_bit(ATH12K_FLAG_CRASH_FLUSH, &ab->dev_flags)) 623 685 ath12k_qmi_firmware_stop(ab); ··· 919 851 920 852 ath12k_acpi_set_dsm_func(ab); 921 853 922 922 - if (!test_bit(ATH12K_FLAG_RECOVERY, &ab->dev_flags)) 923 923 - /* Indicate the core start in the appropriate group */ 924 924 - ath12k_core_started(ab); 854 854 + /* Indicate the core start in the appropriate group */ 855 855 + ath12k_core_to_group_ref_get(ab); 925 856 926 857 return 0; 927 858 ··· 958 891 ab = ag->ab[i]; 959 892 if (!ab) 960 893 continue; 894 894 + 895 895 + clear_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags); 896 896 + 961 897 ath12k_core_device_cleanup(ab); 962 898 } 963 899 ··· 1096 1026 1097 1027 mutex_lock(&ab->core_lock); 1098 1028 1029 1029 + set_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags); 1030 1030 + 1099 1031 ret = ath12k_core_pdev_create(ab); 1100 1032 if (ret) { 1101 1033 ath12k_err(ab, "failed to create pdev core %d\n", ret); ··· 1154 1082 lockdep_assert_held(&ag->mutex); 1155 1083 1156 1084 return (ag->num_started == ag->num_devices); 1085 1085 + } 1086 1086 + 1087 1087 + static void ath12k_fw_stats_pdevs_free(struct list_head *head) 1088 1088 + { 1089 1089 + struct ath12k_fw_stats_pdev *i, *tmp; 1090 1090 + 1091 1091 + list_for_each_entry_safe(i, tmp, head, list) { 1092 1092 + list_del(&i->list); 1093 1093 + kfree(i); 1094 1094 + } 1095 1095 + } 1096 1096 + 1097 1097 + void ath12k_fw_stats_bcn_free(struct list_head *head) 1098 1098 + { 1099 1099 + struct ath12k_fw_stats_bcn *i, *tmp; 1100 1100 + 1101 1101 + list_for_each_entry_safe(i, tmp, head, list) { 1102 1102 + list_del(&i->list); 1103 1103 + kfree(i); 1104 1104 + } 1105 1105 + } 1106 1106 + 1107 1107 + static void ath12k_fw_stats_vdevs_free(struct list_head *head) 1108 1108 + { 1109 1109 + struct ath12k_fw_stats_vdev *i, *tmp; 1110 1110 + 1111 1111 + list_for_each_entry_safe(i, tmp, head, list) { 1112 1112 + list_del(&i->list); 1113 1113 + kfree(i); 1114 1114 + } 1115 1115 + } 1116 1116 + 1117 1117 + void ath12k_fw_stats_init(struct ath12k *ar) 1118 1118 + { 1119 1119 + INIT_LIST_HEAD(&ar->fw_stats.vdevs); 1120 1120 + INIT_LIST_HEAD(&ar->fw_stats.pdevs); 1121 1121 + INIT_LIST_HEAD(&ar->fw_stats.bcn); 1122 1122 + init_completion(&ar->fw_stats_complete); 1123 1123 + } 1124 1124 + 1125 1125 + void ath12k_fw_stats_free(struct ath12k_fw_stats *stats) 1126 1126 + { 1127 1127 + ath12k_fw_stats_pdevs_free(&stats->pdevs); 1128 1128 + ath12k_fw_stats_vdevs_free(&stats->vdevs); 1129 1129 + ath12k_fw_stats_bcn_free(&stats->bcn); 1130 1130 + } 1131 1131 + 1132 1132 + void ath12k_fw_stats_reset(struct ath12k *ar) 1133 1133 + { 1134 1134 + spin_lock_bh(&ar->data_lock); 1135 1135 + ar->fw_stats.fw_stats_done = false; 1136 1136 + ath12k_fw_stats_free(&ar->fw_stats); 1137 1137 + spin_unlock_bh(&ar->data_lock); 1157 1138 } 1158 1139 1159 1140 static void ath12k_core_trigger_partner(struct ath12k_base *ab) ··· 1371 1246 1372 1247 void ath12k_core_halt(struct ath12k *ar) 1373 1248 { 1249 1249 + struct list_head *pos, *n; 1374 1250 struct ath12k_base *ab = ar->ab; 1375 1251 1376 1252 lockdep_assert_wiphy(ath12k_ar_to_hw(ar)->wiphy); ··· 1384 1258 cancel_delayed_work_sync(&ar->scan.timeout); 1385 1259 cancel_work_sync(&ar->regd_update_work); 1386 1260 cancel_work_sync(&ab->rfkill_work); 1261 1261 + cancel_work_sync(&ab->update_11d_work); 1387 1262 1388 1263 rcu_assign_pointer(ab->pdevs_active[ar->pdev_idx], NULL); 1389 1264 synchronize_rcu(); 1390 1390 - INIT_LIST_HEAD(&ar->arvifs); 1265 1265 + 1266 1266 + spin_lock_bh(&ar->data_lock); 1267 1267 + list_for_each_safe(pos, n, &ar->arvifs) 1268 1268 + list_del_init(pos); 1269 1269 + spin_unlock_bh(&ar->data_lock); 1270 1270 + 1391 1271 idr_init(&ar->txmgmt_idr); 1392 1272 } 1393 1273 ··· 1417 1285 ah->state == ATH12K_HW_STATE_TM) 1418 1286 continue; 1419 1287 1288 1288 + wiphy_lock(ah->hw->wiphy); 1289 1289 + 1290 1290 + /* If queue 0 is stopped, it is safe to assume that all 1291 1291 + * other queues are stopped by driver via 1292 1292 + * ieee80211_stop_queues() below. This means, there is 1293 1293 + * no need to stop it again and hence continue 1294 1294 + */ 1295 1295 + if (ieee80211_queue_stopped(ah->hw, 0)) { 1296 1296 + wiphy_unlock(ah->hw->wiphy); 1297 1297 + continue; 1298 1298 + } 1299 1299 + 1420 1300 ieee80211_stop_queues(ah->hw); 1421 1301 1422 1302 for (j = 0; j < ah->num_radio; j++) { 1423 1303 ar = &ah->radio[j]; 1424 1304 1425 1305 ath12k_mac_drain_tx(ar); 1306 1306 + ar->state_11d = ATH12K_11D_IDLE; 1307 1307 + complete(&ar->completed_11d_scan); 1426 1308 complete(&ar->scan.started); 1427 1427 - complete(&ar->scan.completed); 1309 1309 + complete_all(&ar->scan.completed); 1428 1310 complete(&ar->scan.on_channel); 1429 1311 complete(&ar->peer_assoc_done); 1430 1312 complete(&ar->peer_delete_done); ··· 1452 1306 ath12k_mac_tx_mgmt_pending_free, ar); 1453 1307 idr_destroy(&ar->txmgmt_idr); 1454 1308 wake_up(&ar->txmgmt_empty_waitq); 1309 1309 + 1310 1310 + ar->monitor_vdev_id = -1; 1311 1311 + ar->monitor_vdev_created = false; 1312 1312 + ar->monitor_started = false; 1455 1313 } 1314 1314 + 1315 1315 + wiphy_unlock(ah->hw->wiphy); 1456 1316 } 1457 1317 1458 1318 wake_up(&ab->wmi_ab.tx_credits_wq); 1459 1319 wake_up(&ab->peer_mapping_wq); 1320 1320 + } 1321 1321 + 1322 1322 + static void ath12k_update_11d(struct work_struct *work) 1323 1323 + { 1324 1324 + struct ath12k_base *ab = container_of(work, struct ath12k_base, update_11d_work); 1325 1325 + struct ath12k *ar; 1326 1326 + struct ath12k_pdev *pdev; 1327 1327 + struct wmi_set_current_country_arg arg = {}; 1328 1328 + int ret, i; 1329 1329 + 1330 1330 + spin_lock_bh(&ab->base_lock); 1331 1331 + memcpy(&arg.alpha2, &ab->new_alpha2, 2); 1332 1332 + spin_unlock_bh(&ab->base_lock); 1333 1333 + 1334 1334 + ath12k_dbg(ab, ATH12K_DBG_WMI, "update 11d new cc %c%c\n", 1335 1335 + arg.alpha2[0], arg.alpha2[1]); 1336 1336 + 1337 1337 + for (i = 0; i < ab->num_radios; i++) { 1338 1338 + pdev = &ab->pdevs[i]; 1339 1339 + ar = pdev->ar; 1340 1340 + 1341 1341 + memcpy(&ar->alpha2, &arg.alpha2, 2); 1342 1342 + ret = ath12k_wmi_send_set_current_country_cmd(ar, &arg); 1343 1343 + if (ret) 1344 1344 + ath12k_warn(ar->ab, 1345 1345 + "pdev id %d failed set current country code: %d\n", 1346 1346 + i, ret); 1347 1347 + } 1460 1348 } 1461 1349 1462 1350 static void ath12k_core_post_reconfigure_recovery(struct ath12k_base *ab) ··· 1566 1386 ath12k_dbg(ab, ATH12K_DBG_BOOT, "reset success\n"); 1567 1387 } 1568 1388 1389 1389 + mutex_lock(&ag->mutex); 1390 1390 + 1391 1391 + if (!ath12k_core_hw_group_start_ready(ag)) { 1392 1392 + mutex_unlock(&ag->mutex); 1393 1393 + goto exit_restart; 1394 1394 + } 1395 1395 + 1569 1396 for (i = 0; i < ag->num_hw; i++) { 1570 1570 - ah = ath12k_ag_to_ah(ab->ag, i); 1397 1397 + ah = ath12k_ag_to_ah(ag, i); 1571 1398 ieee80211_restart_hw(ah->hw); 1572 1399 } 1400 1400 + 1401 1401 + mutex_unlock(&ag->mutex); 1573 1402 } 1574 1403 1404 1404 + exit_restart: 1575 1405 complete(&ab->restart_completed); 1576 1406 } 1577 1407 1578 1408 static void ath12k_core_reset(struct work_struct *work) 1579 1409 { 1580 1410 struct ath12k_base *ab = container_of(work, struct ath12k_base, reset_work); 1581 1581 - int reset_count, fail_cont_count; 1411 1411 + struct ath12k_hw_group *ag = ab->ag; 1412 1412 + int reset_count, fail_cont_count, i; 1582 1413 long time_left; 1583 1414 1584 1415 if (!(test_bit(ATH12K_FLAG_QMI_FW_READY_COMPLETE, &ab->dev_flags))) { ··· 1648 1457 ath12k_hif_ce_irq_disable(ab); 1649 1458 1650 1459 ath12k_hif_power_down(ab, false); 1651 1651 - ath12k_hif_power_up(ab); 1652 1460 1653 1653 - ath12k_dbg(ab, ATH12K_DBG_BOOT, "reset started\n"); 1461 1461 + /* prepare for power up */ 1462 1462 + ab->qmi.num_radios = U8_MAX; 1463 1463 + 1464 1464 + mutex_lock(&ag->mutex); 1465 1465 + ath12k_core_to_group_ref_put(ab); 1466 1466 + 1467 1467 + if (ag->num_started > 0) { 1468 1468 + ath12k_dbg(ab, ATH12K_DBG_BOOT, 1469 1469 + "waiting for %d partner device(s) to reset\n", 1470 1470 + ag->num_started); 1471 1471 + mutex_unlock(&ag->mutex); 1472 1472 + return; 1473 1473 + } 1474 1474 + 1475 1475 + /* Prepare MLO global memory region for power up */ 1476 1476 + ath12k_qmi_reset_mlo_mem(ag); 1477 1477 + 1478 1478 + for (i = 0; i < ag->num_devices; i++) { 1479 1479 + ab = ag->ab[i]; 1480 1480 + if (!ab) 1481 1481 + continue; 1482 1482 + 1483 1483 + ath12k_hif_power_up(ab); 1484 1484 + ath12k_dbg(ab, ATH12K_DBG_BOOT, "reset started\n"); 1485 1485 + } 1486 1486 + 1487 1487 + mutex_unlock(&ag->mutex); 1654 1488 } 1655 1489 1656 1490 int ath12k_core_pre_init(struct ath12k_base *ab) ··· 2059 1843 2060 1844 lockdep_assert_held(&ag->mutex); 2061 1845 2062 2062 - /* If more than one devices are grouped, then inter MLO 2063 2063 - * functionality can work still independent of whether internally 2064 2064 - * each device supports single_chip_mlo or not. 2065 2065 - * Only when there is one device, then disable for WCN chipsets 2066 2066 - * till the required driver implementation is in place. 2067 2067 - */ 2068 1846 if (ag->num_devices == 1) { 2069 1847 ab = ag->ab[0]; 2070 2070 - 2071 2071 - /* WCN chipsets does not advertise in firmware features 2072 2072 - * hence skip checking 2073 2073 - */ 2074 2074 - if (ab->hw_params->def_num_link) 1848 1848 + /* QCN9274 firmware uses firmware IE for MLO advertisement */ 1849 1849 + if (ab->fw.fw_features_valid) { 1850 1850 + ag->mlo_capable = 1851 1851 + ath12k_fw_feature_supported(ab, ATH12K_FW_FEATURE_MLO); 2075 1852 return; 1853 1853 + } 1854 1854 + 1855 1855 + /* while WCN7850 firmware uses QMI single_chip_mlo_support bit */ 1856 1856 + ag->mlo_capable = ab->single_chip_mlo_support; 1857 1857 + return; 2076 1858 } 2077 1859 2078 1860 ag->mlo_capable = true; ··· 2083 1869 /* even if 1 device's firmware feature indicates MLO 2084 1870 * unsupported, make MLO unsupported for the whole group 2085 1871 */ 2086 2086 - if (!test_bit(ATH12K_FW_FEATURE_MLO, ab->fw.fw_features)) { 1872 1872 + if (!ath12k_fw_feature_supported(ab, ATH12K_FW_FEATURE_MLO)) { 2087 1873 ag->mlo_capable = false; 2088 1874 return; 2089 1875 } ··· 2180 1966 INIT_WORK(&ab->reset_work, ath12k_core_reset); 2181 1967 INIT_WORK(&ab->rfkill_work, ath12k_rfkill_work); 2182 1968 INIT_WORK(&ab->dump_work, ath12k_coredump_upload); 1969 1969 + INIT_WORK(&ab->update_11d_work, ath12k_update_11d); 2183 1970 2184 1971 timer_setup(&ab->rx_replenish_retry, ath12k_ce_rx_replenish_retry, 0); 2185 1972 init_completion(&ab->htc_suspend); ··· 2190 1975 ab->dev = dev; 2191 1976 ab->hif.bus = bus; 2192 1977 ab->qmi.num_radios = U8_MAX; 1978 1978 + ab->single_chip_mlo_support = false; 2193 1979 2194 1980 /* Device index used to identify the devices in a group. 2195 1981 * ··· 2211 1995 return NULL; 2212 1996 } 2213 1997 2214 2214 - MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11be wireless LAN cards."); 1998 1998 + static int ath12k_init(void) 1999 1999 + { 2000 2000 + ahb_err = ath12k_ahb_init(); 2001 2001 + if (ahb_err) 2002 2002 + pr_warn("Failed to initialize ath12k AHB device: %d\n", ahb_err); 2003 2003 + 2004 2004 + pci_err = ath12k_pci_init(); 2005 2005 + if (pci_err) 2006 2006 + pr_warn("Failed to initialize ath12k PCI device: %d\n", pci_err); 2007 2007 + 2008 2008 + /* If both failed, return one of the failures (arbitrary) */ 2009 2009 + return ahb_err && pci_err ? ahb_err : 0; 2010 2010 + } 2011 2011 + 2012 2012 + static void ath12k_exit(void) 2013 2013 + { 2014 2014 + if (!pci_err) 2015 2015 + ath12k_pci_exit(); 2016 2016 + 2017 2017 + if (!ahb_err) 2018 2018 + ath12k_ahb_exit(); 2019 2019 + } 2020 2020 + 2021 2021 + module_init(ath12k_init); 2022 2022 + module_exit(ath12k_exit); 2023 2023 + 2024 2024 + MODULE_DESCRIPTION("Driver support for Qualcomm Technologies 802.11be WLAN devices"); 2215 2025 MODULE_LICENSE("Dual BSD/GPL");

+76 -21

drivers/net/wireless/ath/ath12k/core.h

reviewed

··· 14 14 #include <linux/dmi.h> 15 15 #include <linux/ctype.h> 16 16 #include <linux/firmware.h> 17 17 + #include <linux/of_reserved_mem.h> 17 18 #include <linux/panic_notifier.h> 18 19 #include <linux/average.h> 19 20 #include "qmi.h" ··· 148 147 enum ath12k_hw_rev { 149 148 ATH12K_HW_QCN9274_HW10, 150 149 ATH12K_HW_QCN9274_HW20, 151 151 - ATH12K_HW_WCN7850_HW20 150 150 + ATH12K_HW_WCN7850_HW20, 151 151 + ATH12K_HW_IPQ5332_HW10, 152 152 }; 153 153 154 154 enum ath12k_firmware_mode { ··· 162 160 163 161 #define ATH12K_IRQ_NUM_MAX 57 164 162 #define ATH12K_EXT_IRQ_NUM_MAX 16 163 163 + #define ATH12K_MAX_TCL_RING_NUM 3 165 164 166 165 struct ath12k_ext_irq_grp { 167 166 struct ath12k_base *ab; ··· 222 219 ATH12K_SCAN_ABORTING, 223 220 }; 224 221 222 222 + enum ath12k_11d_state { 223 223 + ATH12K_11D_IDLE, 224 224 + ATH12K_11D_PREPARING, 225 225 + ATH12K_11D_RUNNING, 226 226 + }; 227 227 + 225 228 enum ath12k_hw_group_flags { 226 229 ATH12K_GROUP_FLAG_REGISTERED, 227 230 ATH12K_GROUP_FLAG_UNREGISTER, ··· 247 238 ATH12K_FLAG_EXT_IRQ_ENABLED, 248 239 ATH12K_FLAG_QMI_FW_READY_COMPLETE, 249 240 ATH12K_FLAG_FTM_SEGMENTED, 241 241 + ATH12K_FLAG_FIXED_MEM_REGION, 250 242 }; 251 243 252 244 struct ath12k_tx_conf { ··· 305 295 int txpower; 306 296 bool rsnie_present; 307 297 bool wpaie_present; 308 308 - struct ieee80211_chanctx_conf chanctx; 309 298 u8 vdev_stats_id; 310 299 u32 punct_bitmap; 311 300 u8 link_id; 312 301 struct ath12k_vif *ahvif; 313 302 struct ath12k_rekey_data rekey_data; 303 303 + struct ath12k_link_stats link_stats; 304 304 + spinlock_t link_stats_lock; /* Protects updates to link_stats */ 314 305 315 306 u8 current_cntdown_counter; 307 307 + 308 308 + /* only used in station mode */ 309 309 + bool is_sta_assoc_link; 316 310 }; 317 311 318 312 struct ath12k_vif { ··· 377 363 #define HAL_RX_MAX_MCS_BE 15 378 364 #define HAL_RX_MAX_NSS 8 379 365 #define HAL_RX_MAX_NUM_LEGACY_RATES 12 366 366 + 367 367 + #define ATH12K_SCAN_TIMEOUT_HZ (20 * HZ) 380 368 381 369 struct ath12k_rx_peer_rate_stats { 382 370 u64 ht_mcs_count[HAL_RX_MAX_MCS_HT + 1]; ··· 535 519 u8 link_idx; 536 520 }; 537 521 522 522 + struct ath12k_reoq_buf { 523 523 + void *vaddr; 524 524 + dma_addr_t paddr_aligned; 525 525 + u32 size; 526 526 + }; 527 527 + 538 528 struct ath12k_sta { 539 529 struct ath12k_vif *ahvif; 540 530 enum hal_pn_type pn_type; ··· 553 531 u8 num_peer; 554 532 555 533 enum ieee80211_sta_state state; 534 534 + 535 535 + struct ath12k_reoq_buf reoq_bufs[IEEE80211_NUM_TIDS + 1]; 556 536 }; 557 537 558 558 - #define ATH12K_MIN_5G_FREQ 4150 559 559 - #define ATH12K_MIN_6G_FREQ 5925 560 560 - #define ATH12K_MAX_6G_FREQ 7115 538 538 + #define ATH12K_HALF_20MHZ_BW 10 539 539 + #define ATH12K_2GHZ_MIN_CENTER 2412 540 540 + #define ATH12K_2GHZ_MAX_CENTER 2484 541 541 + #define ATH12K_5GHZ_MIN_CENTER 4900 542 542 + #define ATH12K_5GHZ_MAX_CENTER 5920 543 543 + #define ATH12K_6GHZ_MIN_CENTER 5935 544 544 + #define ATH12K_6GHZ_MAX_CENTER 7115 545 545 + #define ATH12K_MIN_2GHZ_FREQ (ATH12K_2GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW - 1) 546 546 + #define ATH12K_MAX_2GHZ_FREQ (ATH12K_2GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW + 1) 547 547 + #define ATH12K_MIN_5GHZ_FREQ (ATH12K_5GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW) 548 548 + #define ATH12K_MAX_5GHZ_FREQ (ATH12K_5GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW) 549 549 + #define ATH12K_MIN_6GHZ_FREQ (ATH12K_6GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW) 550 550 + #define ATH12K_MAX_6GHZ_FREQ (ATH12K_6GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW) 561 551 #define ATH12K_NUM_CHANS 101 562 562 - #define ATH12K_MAX_5G_CHAN 173 552 552 + #define ATH12K_MAX_5GHZ_CHAN 173 563 553 564 554 enum ath12k_hw_state { 565 555 ATH12K_HW_STATE_OFF, ··· 762 728 #endif 763 729 764 730 bool dfs_block_radar_events; 765 765 - bool monitor_conf_enabled; 766 731 bool monitor_vdev_created; 767 732 bool monitor_started; 768 733 int monitor_vdev_id; ··· 770 737 771 738 bool nlo_enabled; 772 739 740 740 + /* Protected by wiphy::mtx lock. */ 741 741 + u32 vdev_id_11d_scan; 742 742 + struct completion completed_11d_scan; 743 743 + enum ath12k_11d_state state_11d; 744 744 + u8 alpha2[REG_ALPHA2_LEN]; 745 745 + bool regdom_set_by_user; 746 746 + 773 747 struct completion fw_stats_complete; 774 748 775 749 struct completion mlo_setup_done; 776 750 u32 mlo_setup_status; 777 751 u8 ftm_msgref; 778 752 struct ath12k_fw_stats fw_stats; 753 753 + unsigned long last_tx_power_update; 779 754 }; 780 755 781 756 struct ath12k_hw { ··· 893 852 struct ath12k_soc_dp_tx_err_stats tx_err; 894 853 }; 895 854 855 855 + struct ath12k_reg_freq { 856 856 + u32 start_freq; 857 857 + u32 end_freq; 858 858 + }; 859 859 + 896 860 struct ath12k_mlo_memory { 897 861 struct target_mem_chunk chunk[ATH12K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01]; 898 862 int mlo_mem_size; ··· 968 922 969 923 void __iomem *mem; 970 924 unsigned long mem_len; 925 925 + 926 926 + void __iomem *mem_ce; 927 927 + u32 ce_remap_base_addr; 928 928 + bool ce_remap; 971 929 972 930 struct { 973 931 enum ath12k_bus bus; ··· 1061 1011 /* continuous recovery fail count */ 1062 1012 atomic_t fail_cont_count; 1063 1013 unsigned long reset_fail_timeout; 1014 1014 + struct work_struct update_11d_work; 1015 1015 + u8 new_alpha2[2]; 1064 1016 struct { 1065 1017 /* protected by data_lock */ 1066 1018 u32 fw_crash_counter; ··· 1103 1051 size_t m3_len; 1104 1052 1105 1053 DECLARE_BITMAP(fw_features, ATH12K_FW_FEATURE_COUNT); 1054 1054 + bool fw_features_valid; 1106 1055 } fw; 1107 1056 1108 1057 const struct hal_rx_ops *hal_rx_ops; ··· 1140 1087 struct ath12k_wsi_info wsi_info; 1141 1088 enum ath12k_firmware_mode fw_mode; 1142 1089 struct ath12k_ftm_event_obj ftm_event_obj; 1090 1090 + bool hw_group_ref; 1091 1091 + 1092 1092 + /* Denote whether MLO is possible within the device */ 1093 1093 + bool single_chip_mlo_support; 1094 1094 + 1095 1095 + struct ath12k_reg_freq reg_freq_2ghz; 1096 1096 + struct ath12k_reg_freq reg_freq_5ghz; 1097 1097 + struct ath12k_reg_freq reg_freq_6ghz; 1143 1098 1144 1099 /* must be last */ 1145 1100 u8 drv_priv[] __aligned(sizeof(void *)); ··· 1276 1215 u32 ath12k_core_get_max_num_tids(struct ath12k_base *ab); 1277 1216 1278 1217 void ath12k_core_hw_group_set_mlo_capable(struct ath12k_hw_group *ag); 1218 1218 + void ath12k_fw_stats_init(struct ath12k *ar); 1219 1219 + void ath12k_fw_stats_bcn_free(struct list_head *head); 1220 1220 + void ath12k_fw_stats_free(struct ath12k_fw_stats *stats); 1221 1221 + void ath12k_fw_stats_reset(struct ath12k *ar); 1222 1222 + struct reserved_mem *ath12k_core_get_reserved_mem(struct ath12k_base *ab, 1223 1223 + int index); 1279 1224 1280 1225 static inline const char *ath12k_scan_state_str(enum ath12k_scan_state state) 1281 1226 { ··· 1351 1284 switch (bus) { 1352 1285 case ATH12K_BUS_PCI: 1353 1286 return "pci"; 1287 1287 + case ATH12K_BUS_AHB: 1288 1288 + return "ahb"; 1354 1289 } 1355 1290 1356 1291 return "unknown"; ··· 1400 1331 static inline struct ath12k_hw_group *ath12k_ab_to_ag(struct ath12k_base *ab) 1401 1332 { 1402 1333 return ab->ag; 1403 1403 - } 1404 1404 - 1405 1405 - static inline void ath12k_core_started(struct ath12k_base *ab) 1406 1406 - { 1407 1407 - lockdep_assert_held(&ab->ag->mutex); 1408 1408 - 1409 1409 - ab->ag->num_started++; 1410 1410 - } 1411 1411 - 1412 1412 - static inline void ath12k_core_stopped(struct ath12k_base *ab) 1413 1413 - { 1414 1414 - lockdep_assert_held(&ab->ag->mutex); 1415 1415 - 1416 1416 - ab->ag->num_started--; 1417 1334 } 1418 1335 1419 1336 static inline struct ath12k_base *ath12k_ag_to_ab(struct ath12k_hw_group *ag,

+124 -110

drivers/net/wireless/ath/ath12k/debugfs.c

reviewed

··· 88 88 u32 chan_freq = le32_to_cpu(tpc_stats->tpc_config.chan_freq); 89 89 u8 band; 90 90 91 91 - band = ((chan_freq > ATH12K_MIN_6G_FREQ) ? NL80211_BAND_6GHZ : 92 92 - ((chan_freq > ATH12K_MIN_5G_FREQ) ? NL80211_BAND_5GHZ : 91 91 + band = ((chan_freq > ATH12K_MIN_6GHZ_FREQ) ? NL80211_BAND_6GHZ : 92 92 + ((chan_freq > ATH12K_MIN_5GHZ_FREQ) ? NL80211_BAND_5GHZ : 93 93 NL80211_BAND_2GHZ)); 94 94 95 95 if (band == NL80211_BAND_5GHZ || band == NL80211_BAND_6GHZ) { ··· 833 833 .open = simple_open, 834 834 }; 835 835 836 836 + static int ath12k_open_link_stats(struct inode *inode, struct file *file) 837 837 + { 838 838 + struct ath12k_vif *ahvif = inode->i_private; 839 839 + size_t len = 0, buf_len = (PAGE_SIZE * 2); 840 840 + struct ath12k_link_stats linkstat; 841 841 + struct ath12k_link_vif *arvif; 842 842 + unsigned long links_map; 843 843 + struct wiphy *wiphy; 844 844 + int link_id, i; 845 845 + char *buf; 846 846 + 847 847 + if (!ahvif) 848 848 + return -EINVAL; 849 849 + 850 850 + buf = kzalloc(buf_len, GFP_KERNEL); 851 851 + if (!buf) 852 852 + return -ENOMEM; 853 853 + 854 854 + wiphy = ahvif->ah->hw->wiphy; 855 855 + wiphy_lock(wiphy); 856 856 + 857 857 + links_map = ahvif->links_map; 858 858 + for_each_set_bit(link_id, &links_map, 859 859 + IEEE80211_MLD_MAX_NUM_LINKS) { 860 860 + arvif = rcu_dereference_protected(ahvif->link[link_id], 861 861 + lockdep_is_held(&wiphy->mtx)); 862 862 + 863 863 + spin_lock_bh(&arvif->link_stats_lock); 864 864 + linkstat = arvif->link_stats; 865 865 + spin_unlock_bh(&arvif->link_stats_lock); 866 866 + 867 867 + len += scnprintf(buf + len, buf_len - len, 868 868 + "link[%d] Tx Unicast Frames Enqueued = %d\n", 869 869 + link_id, linkstat.tx_enqueued); 870 870 + len += scnprintf(buf + len, buf_len - len, 871 871 + "link[%d] Tx Broadcast Frames Enqueued = %d\n", 872 872 + link_id, linkstat.tx_bcast_mcast); 873 873 + len += scnprintf(buf + len, buf_len - len, 874 874 + "link[%d] Tx Frames Completed = %d\n", 875 875 + link_id, linkstat.tx_completed); 876 876 + len += scnprintf(buf + len, buf_len - len, 877 877 + "link[%d] Tx Frames Dropped = %d\n", 878 878 + link_id, linkstat.tx_dropped); 879 879 + 880 880 + len += scnprintf(buf + len, buf_len - len, 881 881 + "link[%d] Tx Frame descriptor Encap Type = ", 882 882 + link_id); 883 883 + 884 884 + len += scnprintf(buf + len, buf_len - len, 885 885 + " raw:%d", 886 886 + linkstat.tx_encap_type[0]); 887 887 + 888 888 + len += scnprintf(buf + len, buf_len - len, 889 889 + " native_wifi:%d", 890 890 + linkstat.tx_encap_type[1]); 891 891 + 892 892 + len += scnprintf(buf + len, buf_len - len, 893 893 + " ethernet:%d", 894 894 + linkstat.tx_encap_type[2]); 895 895 + 896 896 + len += scnprintf(buf + len, buf_len - len, 897 897 + "\nlink[%d] Tx Frame descriptor Encrypt Type = ", 898 898 + link_id); 899 899 + 900 900 + for (i = 0; i < HAL_ENCRYPT_TYPE_MAX; i++) { 901 901 + len += scnprintf(buf + len, buf_len - len, 902 902 + " %d:%d", i, 903 903 + linkstat.tx_encrypt_type[i]); 904 904 + } 905 905 + len += scnprintf(buf + len, buf_len - len, 906 906 + "\nlink[%d] Tx Frame descriptor Type = buffer:%d extension:%d\n", 907 907 + link_id, linkstat.tx_desc_type[0], 908 908 + linkstat.tx_desc_type[1]); 909 909 + 910 910 + len += scnprintf(buf + len, buf_len - len, 911 911 + "------------------------------------------------------\n"); 912 912 + } 913 913 + 914 914 + wiphy_unlock(wiphy); 915 915 + 916 916 + file->private_data = buf; 917 917 + 918 918 + return 0; 919 919 + } 920 920 + 921 921 + static int ath12k_release_link_stats(struct inode *inode, struct file *file) 922 922 + { 923 923 + kfree(file->private_data); 924 924 + return 0; 925 925 + } 926 926 + 927 927 + static ssize_t ath12k_read_link_stats(struct file *file, 928 928 + char __user *user_buf, 929 929 + size_t count, loff_t *ppos) 930 930 + { 931 931 + const char *buf = file->private_data; 932 932 + size_t len = strlen(buf); 933 933 + 934 934 + return simple_read_from_buffer(user_buf, count, ppos, buf, len); 935 935 + } 936 936 + 937 937 + static const struct file_operations ath12k_fops_link_stats = { 938 938 + .open = ath12k_open_link_stats, 939 939 + .release = ath12k_release_link_stats, 940 940 + .read = ath12k_read_link_stats, 941 941 + .owner = THIS_MODULE, 942 942 + .llseek = default_llseek, 943 943 + }; 944 944 + 945 945 + void ath12k_debugfs_op_vif_add(struct ieee80211_hw *hw, 946 946 + struct ieee80211_vif *vif) 947 947 + { 948 948 + struct ath12k_vif *ahvif = ath12k_vif_to_ahvif(vif); 949 949 + 950 950 + debugfs_create_file("link_stats", 0400, vif->debugfs_dir, ahvif, 951 951 + &ath12k_fops_link_stats); 952 952 + } 953 953 + 836 954 void ath12k_debugfs_soc_create(struct ath12k_base *ab) 837 955 { 838 956 bool dput_needed; ··· 986 868 * a minor cosmetic issue to leave an empty ath12k directory to 987 869 * debugfs. 988 870 */ 989 989 - } 990 990 - 991 991 - static void ath12k_fw_stats_pdevs_free(struct list_head *head) 992 992 - { 993 993 - struct ath12k_fw_stats_pdev *i, *tmp; 994 994 - 995 995 - list_for_each_entry_safe(i, tmp, head, list) { 996 996 - list_del(&i->list); 997 997 - kfree(i); 998 998 - } 999 999 - } 1000 1000 - 1001 1001 - static void ath12k_fw_stats_bcn_free(struct list_head *head) 1002 1002 - { 1003 1003 - struct ath12k_fw_stats_bcn *i, *tmp; 1004 1004 - 1005 1005 - list_for_each_entry_safe(i, tmp, head, list) { 1006 1006 - list_del(&i->list); 1007 1007 - kfree(i); 1008 1008 - } 1009 1009 - } 1010 1010 - 1011 1011 - static void ath12k_fw_stats_vdevs_free(struct list_head *head) 1012 1012 - { 1013 1013 - struct ath12k_fw_stats_vdev *i, *tmp; 1014 1014 - 1015 1015 - list_for_each_entry_safe(i, tmp, head, list) { 1016 1016 - list_del(&i->list); 1017 1017 - kfree(i); 1018 1018 - } 1019 1019 - } 1020 1020 - 1021 1021 - void ath12k_debugfs_fw_stats_reset(struct ath12k *ar) 1022 1022 - { 1023 1023 - spin_lock_bh(&ar->data_lock); 1024 1024 - ar->fw_stats.fw_stats_done = false; 1025 1025 - ath12k_fw_stats_vdevs_free(&ar->fw_stats.vdevs); 1026 1026 - ath12k_fw_stats_bcn_free(&ar->fw_stats.bcn); 1027 1027 - ath12k_fw_stats_pdevs_free(&ar->fw_stats.pdevs); 1028 1028 - spin_unlock_bh(&ar->data_lock); 1029 1029 - } 1030 1030 - 1031 1031 - static int ath12k_debugfs_fw_stats_request(struct ath12k *ar, 1032 1032 - struct ath12k_fw_stats_req_params *param) 1033 1033 - { 1034 1034 - struct ath12k_base *ab = ar->ab; 1035 1035 - unsigned long timeout, time_left; 1036 1036 - int ret; 1037 1037 - 1038 1038 - lockdep_assert_wiphy(ath12k_ar_to_hw(ar)->wiphy); 1039 1039 - 1040 1040 - /* FW stats can get split when exceeding the stats data buffer limit. 1041 1041 - * In that case, since there is no end marking for the back-to-back 1042 1042 - * received 'update stats' event, we keep a 3 seconds timeout in case, 1043 1043 - * fw_stats_done is not marked yet 1044 1044 - */ 1045 1045 - timeout = jiffies + msecs_to_jiffies(3 * 1000); 1046 1046 - 1047 1047 - ath12k_debugfs_fw_stats_reset(ar); 1048 1048 - 1049 1049 - reinit_completion(&ar->fw_stats_complete); 1050 1050 - 1051 1051 - ret = ath12k_wmi_send_stats_request_cmd(ar, param->stats_id, 1052 1052 - param->vdev_id, param->pdev_id); 1053 1053 - 1054 1054 - if (ret) { 1055 1055 - ath12k_warn(ab, "could not request fw stats (%d)\n", 1056 1056 - ret); 1057 1057 - return ret; 1058 1058 - } 1059 1059 - 1060 1060 - time_left = wait_for_completion_timeout(&ar->fw_stats_complete, 1061 1061 - 1 * HZ); 1062 1062 - /* If the wait timed out, return -ETIMEDOUT */ 1063 1063 - if (!time_left) 1064 1064 - return -ETIMEDOUT; 1065 1065 - 1066 1066 - /* Firmware sends WMI_UPDATE_STATS_EVENTID back-to-back 1067 1067 - * when stats data buffer limit is reached. fw_stats_complete 1068 1068 - * is completed once host receives first event from firmware, but 1069 1069 - * still end might not be marked in the TLV. 1070 1070 - * Below loop is to confirm that firmware completed sending all the event 1071 1071 - * and fw_stats_done is marked true when end is marked in the TLV 1072 1072 - */ 1073 1073 - for (;;) { 1074 1074 - if (time_after(jiffies, timeout)) 1075 1075 - break; 1076 1076 - 1077 1077 - spin_lock_bh(&ar->data_lock); 1078 1078 - if (ar->fw_stats.fw_stats_done) { 1079 1079 - spin_unlock_bh(&ar->data_lock); 1080 1080 - break; 1081 1081 - } 1082 1082 - spin_unlock_bh(&ar->data_lock); 1083 1083 - } 1084 1084 - return 0; 1085 871 } 1086 872 1087 873 void ··· 1044 1022 num_bcn = 0; 1045 1023 } 1046 1024 } 1047 1047 - if (stats->stats_id == WMI_REQUEST_PDEV_STAT) { 1048 1048 - list_splice_tail_init(&stats->pdevs, &ar->fw_stats.pdevs); 1049 1049 - ar->fw_stats.fw_stats_done = true; 1050 1050 - } 1051 1025 } 1052 1026 1053 1027 static int ath12k_open_vdev_stats(struct inode *inode, struct file *file) ··· 1070 1052 param.vdev_id = 0; 1071 1053 param.stats_id = WMI_REQUEST_VDEV_STAT; 1072 1054 1073 1073 - ret = ath12k_debugfs_fw_stats_request(ar, &param); 1055 1055 + ret = ath12k_mac_get_fw_stats(ar, &param); 1074 1056 if (ret) { 1075 1057 ath12k_warn(ar->ab, "failed to request fw vdev stats: %d\n", ret); 1076 1058 return ret; ··· 1135 1117 continue; 1136 1118 1137 1119 param.vdev_id = arvif->vdev_id; 1138 1138 - ret = ath12k_debugfs_fw_stats_request(ar, &param); 1120 1120 + ret = ath12k_mac_get_fw_stats(ar, &param); 1139 1121 if (ret) { 1140 1122 ath12k_warn(ar->ab, "failed to request fw bcn stats: %d\n", ret); 1141 1123 return ret; ··· 1202 1184 param.vdev_id = 0; 1203 1185 param.stats_id = WMI_REQUEST_PDEV_STAT; 1204 1186 1205 1205 - ret = ath12k_debugfs_fw_stats_request(ar, &param); 1187 1187 + ret = ath12k_mac_get_fw_stats(ar, &param); 1206 1188 if (ret) { 1207 1189 ath12k_warn(ab, "failed to request fw pdev stats: %d\n", ret); 1208 1190 return ret; ··· 1257 1239 debugfs_create_file("pdev_stats", 0600, fwstats_dir, ar, 1258 1240 &fops_pdev_stats); 1259 1241 1260 1260 - INIT_LIST_HEAD(&ar->fw_stats.vdevs); 1261 1261 - INIT_LIST_HEAD(&ar->fw_stats.bcn); 1262 1262 - INIT_LIST_HEAD(&ar->fw_stats.pdevs); 1263 1263 - 1264 1264 - init_completion(&ar->fw_stats_complete); 1242 1242 + ath12k_fw_stats_init(ar); 1265 1243 } 1266 1244 1267 1245 void ath12k_debugfs_register(struct ath12k *ar)

+7 -5

drivers/net/wireless/ath/ath12k/debugfs.h

reviewed

··· 14 14 void ath12k_debugfs_unregister(struct ath12k *ar); 15 15 void ath12k_debugfs_fw_stats_process(struct ath12k *ar, 16 16 struct ath12k_fw_stats *stats); 17 17 - void ath12k_debugfs_fw_stats_reset(struct ath12k *ar); 17 17 + void ath12k_debugfs_op_vif_add(struct ieee80211_hw *hw, 18 18 + struct ieee80211_vif *vif); 18 19 19 20 static inline bool ath12k_debugfs_is_extd_rx_stats_enabled(struct ath12k *ar) 20 21 { ··· 130 129 { 131 130 } 132 131 133 133 - static inline void ath12k_debugfs_fw_stats_reset(struct ath12k *ar) 134 134 - { 135 135 - } 136 136 - 137 132 static inline bool ath12k_debugfs_is_extd_rx_stats_enabled(struct ath12k *ar) 138 133 { 139 134 return false; ··· 138 141 static inline int ath12k_debugfs_rx_filter(struct ath12k *ar) 139 142 { 140 143 return 0; 144 144 + } 145 145 + 146 146 + static inline void ath12k_debugfs_op_vif_add(struct ieee80211_hw *hw, 147 147 + struct ieee80211_vif *vif) 148 148 + { 141 149 } 142 150 #endif /* CONFIG_ATH12K_DEBUGFS */ 143 151

+3

drivers/net/wireless/ath/ath12k/debugfs_htt_stats.c

reviewed

··· 5377 5377 const int size = 32; 5378 5378 int num_args; 5379 5379 5380 5380 + if (count > size) 5381 5381 + return -EINVAL; 5382 5382 + 5380 5383 char *buf __free(kfree) = kzalloc(size, GFP_KERNEL); 5381 5384 if (!buf) 5382 5385 return -ENOMEM;

+63 -25

drivers/net/wireless/ath/ath12k/dp.c

reviewed

··· 1206 1206 if (!skb) 1207 1207 continue; 1208 1208 1209 1209 + skb_cb = ATH12K_SKB_CB(skb); 1210 1210 + if (skb_cb->paddr_ext_desc) { 1211 1211 + dma_unmap_single(ab->dev, 1212 1212 + skb_cb->paddr_ext_desc, 1213 1213 + tx_desc_info->skb_ext_desc->len, 1214 1214 + DMA_TO_DEVICE); 1215 1215 + dev_kfree_skb_any(tx_desc_info->skb_ext_desc); 1216 1216 + } 1217 1217 + 1209 1218 /* if we are unregistering, hw would've been destroyed and 1210 1219 * ar is no longer valid. 1211 1220 */ 1212 1221 if (!(test_bit(ATH12K_FLAG_UNREGISTERING, &ab->dev_flags))) { 1213 1213 - skb_cb = ATH12K_SKB_CB(skb); 1214 1222 ar = skb_cb->ar; 1215 1223 1216 1224 if (atomic_dec_and_test(&ar->dp.num_tx_pending)) ··· 1269 1261 if (!ab->hw_params->reoq_lut_support) 1270 1262 return; 1271 1263 1272 1272 - if (dp->reoq_lut.vaddr) { 1264 1264 + if (dp->reoq_lut.vaddr_unaligned) { 1273 1265 ath12k_hif_write32(ab, 1274 1266 HAL_SEQ_WCSS_UMAC_REO_REG + 1275 1267 HAL_REO1_QDESC_LUT_BASE0(ab), 0); 1276 1276 - dma_free_coherent(ab->dev, DP_REOQ_LUT_SIZE, 1277 1277 - dp->reoq_lut.vaddr, dp->reoq_lut.paddr); 1278 1278 - dp->reoq_lut.vaddr = NULL; 1268 1268 + dma_free_coherent(ab->dev, dp->reoq_lut.size, 1269 1269 + dp->reoq_lut.vaddr_unaligned, 1270 1270 + dp->reoq_lut.paddr_unaligned); 1271 1271 + dp->reoq_lut.vaddr_unaligned = NULL; 1279 1272 } 1280 1273 1281 1281 - if (dp->ml_reoq_lut.vaddr) { 1274 1274 + if (dp->ml_reoq_lut.vaddr_unaligned) { 1282 1275 ath12k_hif_write32(ab, 1283 1276 HAL_SEQ_WCSS_UMAC_REO_REG + 1284 1277 HAL_REO1_QDESC_LUT_BASE1(ab), 0); 1285 1285 - dma_free_coherent(ab->dev, DP_REOQ_LUT_SIZE, 1286 1286 - dp->ml_reoq_lut.vaddr, dp->ml_reoq_lut.paddr); 1287 1287 - dp->ml_reoq_lut.vaddr = NULL; 1278 1278 + dma_free_coherent(ab->dev, dp->ml_reoq_lut.size, 1279 1279 + dp->ml_reoq_lut.vaddr_unaligned, 1280 1280 + dp->ml_reoq_lut.paddr_unaligned); 1281 1281 + dp->ml_reoq_lut.vaddr_unaligned = NULL; 1288 1282 } 1289 1283 } 1290 1284 ··· 1618 1608 return ret; 1619 1609 } 1620 1610 1611 1611 + static int ath12k_dp_alloc_reoq_lut(struct ath12k_base *ab, 1612 1612 + struct ath12k_reo_q_addr_lut *lut) 1613 1613 + { 1614 1614 + lut->size = DP_REOQ_LUT_SIZE + HAL_REO_QLUT_ADDR_ALIGN - 1; 1615 1615 + lut->vaddr_unaligned = dma_alloc_coherent(ab->dev, lut->size, 1616 1616 + &lut->paddr_unaligned, 1617 1617 + GFP_KERNEL | __GFP_ZERO); 1618 1618 + if (!lut->vaddr_unaligned) 1619 1619 + return -ENOMEM; 1620 1620 + 1621 1621 + lut->vaddr = PTR_ALIGN(lut->vaddr_unaligned, HAL_REO_QLUT_ADDR_ALIGN); 1622 1622 + lut->paddr = lut->paddr_unaligned + 1623 1623 + ((unsigned long)lut->vaddr - (unsigned long)lut->vaddr_unaligned); 1624 1624 + return 0; 1625 1625 + } 1626 1626 + 1621 1627 static int ath12k_dp_reoq_lut_setup(struct ath12k_base *ab) 1622 1628 { 1623 1629 struct ath12k_dp *dp = &ab->dp; 1630 1630 + u32 val; 1631 1631 + int ret; 1624 1632 1625 1633 if (!ab->hw_params->reoq_lut_support) 1626 1634 return 0; 1627 1635 1628 1628 - dp->reoq_lut.vaddr = dma_alloc_coherent(ab->dev, 1629 1629 - DP_REOQ_LUT_SIZE, 1630 1630 - &dp->reoq_lut.paddr, 1631 1631 - GFP_KERNEL | __GFP_ZERO); 1632 1632 - if (!dp->reoq_lut.vaddr) { 1636 1636 + ret = ath12k_dp_alloc_reoq_lut(ab, &dp->reoq_lut); 1637 1637 + if (ret) { 1633 1638 ath12k_warn(ab, "failed to allocate memory for reoq table"); 1634 1634 - return -ENOMEM; 1639 1639 + return ret; 1635 1640 } 1636 1641 1637 1637 - dp->ml_reoq_lut.vaddr = dma_alloc_coherent(ab->dev, 1638 1638 - DP_REOQ_LUT_SIZE, 1639 1639 - &dp->ml_reoq_lut.paddr, 1640 1640 - GFP_KERNEL | __GFP_ZERO); 1641 1641 - if (!dp->ml_reoq_lut.vaddr) { 1642 1642 + ret = ath12k_dp_alloc_reoq_lut(ab, &dp->ml_reoq_lut); 1643 1643 + if (ret) { 1642 1644 ath12k_warn(ab, "failed to allocate memory for ML reoq table"); 1643 1643 - dma_free_coherent(ab->dev, DP_REOQ_LUT_SIZE, 1644 1644 - dp->reoq_lut.vaddr, dp->reoq_lut.paddr); 1645 1645 - dp->reoq_lut.vaddr = NULL; 1646 1646 - return -ENOMEM; 1645 1645 + dma_free_coherent(ab->dev, dp->reoq_lut.size, 1646 1646 + dp->reoq_lut.vaddr_unaligned, 1647 1647 + dp->reoq_lut.paddr_unaligned); 1648 1648 + dp->reoq_lut.vaddr_unaligned = NULL; 1649 1649 + return ret; 1647 1650 } 1651 1651 + 1652 1652 + /* Bits in the register have address [39:8] LUT base address to be 1653 1653 + * allocated such that LSBs are assumed to be zero. Also, current 1654 1654 + * design supports paddr up to 4 GB max hence it fits in 32 bit 1655 1655 + * register only 1656 1656 + */ 1648 1657 1649 1658 ath12k_hif_write32(ab, HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_QDESC_LUT_BASE0(ab), 1650 1650 - dp->reoq_lut.paddr); 1659 1659 + dp->reoq_lut.paddr >> 8); 1660 1660 + 1651 1661 ath12k_hif_write32(ab, HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_QDESC_LUT_BASE1(ab), 1652 1662 dp->ml_reoq_lut.paddr >> 8); 1663 1663 + 1664 1664 + val = ath12k_hif_read32(ab, HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_QDESC_ADDR(ab)); 1665 1665 + 1666 1666 + ath12k_hif_write32(ab, HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_QDESC_ADDR(ab), 1667 1667 + val | HAL_REO_QDESC_ADDR_READ_LUT_ENABLE); 1668 1668 + 1669 1669 + ath12k_hif_write32(ab, HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_QDESC_MAX_PEERID(ab), 1670 1670 + HAL_REO_QDESC_MAX_PEERID); 1653 1671 1654 1672 return 0; 1655 1673 }

+24 -1

drivers/net/wireless/ath/ath12k/dp.h

reviewed

··· 7 7 #ifndef ATH12K_DP_H 8 8 #define ATH12K_DP_H 9 9 10 10 + #include "hal_desc.h" 10 11 #include "hal_rx.h" 11 12 #include "hw.h" 12 13 ··· 107 106 struct list_head list; 108 107 struct sk_buff *head; 109 108 struct sk_buff *tail; 109 109 + u32 err_bitmap; 110 110 + u8 decap_format; 110 111 }; 111 112 112 113 #define DP_MON_MAX_STATUS_BUF 32 ··· 296 293 struct ath12k_tx_desc_info { 297 294 struct list_head list; 298 295 struct sk_buff *skb; 296 296 + struct sk_buff *skb_ext_desc; 299 297 u32 desc_id; /* Cookie */ 300 298 u8 mac_id; 301 299 u8 pool_id; 300 300 + }; 301 301 + 302 302 + struct ath12k_tx_desc_params { 303 303 + struct sk_buff *skb; 304 304 + struct sk_buff *skb_ext_desc; 305 305 + u8 mac_id; 302 306 }; 303 307 304 308 struct ath12k_spt_info { ··· 319 309 } __packed; 320 310 321 311 struct ath12k_reo_q_addr_lut { 322 322 - dma_addr_t paddr; 312 312 + u32 *vaddr_unaligned; 323 313 u32 *vaddr; 314 314 + dma_addr_t paddr_unaligned; 315 315 + dma_addr_t paddr; 316 316 + u32 size; 317 317 + }; 318 318 + 319 319 + struct ath12k_link_stats { 320 320 + u32 tx_enqueued; 321 321 + u32 tx_completed; 322 322 + u32 tx_bcast_mcast; 323 323 + u32 tx_dropped; 324 324 + u32 tx_encap_type[HAL_TCL_ENCAP_TYPE_MAX]; 325 325 + u32 tx_encrypt_type[HAL_ENCRYPT_TYPE_MAX]; 326 326 + u32 tx_desc_type[HAL_TCL_DESC_TYPE_MAX]; 324 327 }; 325 328 326 329 struct ath12k_dp {

+315 -62

drivers/net/wireless/ath/ath12k/dp_mon.c

reviewed

··· 1647 1647 u32_get_bits(info[0], HAL_RX_MPDU_START_INFO0_PPDU_ID); 1648 1648 } 1649 1649 1650 1650 - break; 1650 1650 + return HAL_RX_MON_STATUS_MPDU_START; 1651 1651 } 1652 1652 case HAL_RX_MSDU_START: 1653 1653 /* TODO: add msdu start parsing logic */ ··· 1688 1688 return HAL_RX_MON_STATUS_PPDU_NOT_DONE; 1689 1689 } 1690 1690 1691 1691 - static void ath12k_dp_mon_rx_msdus_set_payload(struct ath12k *ar, 1692 1692 - struct sk_buff *head_msdu, 1693 1693 - struct sk_buff *tail_msdu) 1691 1691 + static void 1692 1692 + ath12k_dp_mon_fill_rx_stats_info(struct ath12k *ar, 1693 1693 + struct hal_rx_mon_ppdu_info *ppdu_info, 1694 1694 + struct ieee80211_rx_status *rx_status) 1694 1695 { 1695 1695 - u32 rx_pkt_offset, l2_hdr_offset; 1696 1696 + u32 center_freq = ppdu_info->freq; 1696 1697 1697 1697 - rx_pkt_offset = ar->ab->hal.hal_desc_sz; 1698 1698 - l2_hdr_offset = 1699 1699 - ath12k_dp_rx_h_l3pad(ar->ab, (struct hal_rx_desc *)tail_msdu->data); 1700 1700 - skb_pull(head_msdu, rx_pkt_offset + l2_hdr_offset); 1698 1698 + rx_status->freq = center_freq; 1699 1699 + rx_status->bw = ath12k_mac_bw_to_mac80211_bw(ppdu_info->bw); 1700 1700 + rx_status->nss = ppdu_info->nss; 1701 1701 + rx_status->rate_idx = 0; 1702 1702 + rx_status->encoding = RX_ENC_LEGACY; 1703 1703 + rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL; 1704 1704 + 1705 1705 + if (center_freq >= ATH12K_MIN_6GHZ_FREQ && 1706 1706 + center_freq <= ATH12K_MAX_6GHZ_FREQ) { 1707 1707 + rx_status->band = NL80211_BAND_6GHZ; 1708 1708 + } else if (center_freq >= ATH12K_MIN_2GHZ_FREQ && 1709 1709 + center_freq <= ATH12K_MAX_2GHZ_FREQ) { 1710 1710 + rx_status->band = NL80211_BAND_2GHZ; 1711 1711 + } else if (center_freq >= ATH12K_MIN_5GHZ_FREQ && 1712 1712 + center_freq <= ATH12K_MAX_5GHZ_FREQ) { 1713 1713 + rx_status->band = NL80211_BAND_5GHZ; 1714 1714 + } else { 1715 1715 + rx_status->band = NUM_NL80211_BANDS; 1716 1716 + } 1717 1717 + } 1718 1718 + 1719 1719 + static void 1720 1720 + ath12k_dp_mon_fill_rx_rate(struct ath12k *ar, 1721 1721 + struct hal_rx_mon_ppdu_info *ppdu_info, 1722 1722 + struct ieee80211_rx_status *rx_status) 1723 1723 + { 1724 1724 + struct ieee80211_supported_band *sband; 1725 1725 + enum rx_msdu_start_pkt_type pkt_type; 1726 1726 + u8 rate_mcs, nss, sgi; 1727 1727 + bool is_cck; 1728 1728 + 1729 1729 + pkt_type = ppdu_info->preamble_type; 1730 1730 + rate_mcs = ppdu_info->rate; 1731 1731 + nss = ppdu_info->nss; 1732 1732 + sgi = ppdu_info->gi; 1733 1733 + 1734 1734 + switch (pkt_type) { 1735 1735 + case RX_MSDU_START_PKT_TYPE_11A: 1736 1736 + case RX_MSDU_START_PKT_TYPE_11B: 1737 1737 + is_cck = (pkt_type == RX_MSDU_START_PKT_TYPE_11B); 1738 1738 + if (rx_status->band < NUM_NL80211_BANDS) { 1739 1739 + sband = &ar->mac.sbands[rx_status->band]; 1740 1740 + rx_status->rate_idx = ath12k_mac_hw_rate_to_idx(sband, rate_mcs, 1741 1741 + is_cck); 1742 1742 + } 1743 1743 + break; 1744 1744 + case RX_MSDU_START_PKT_TYPE_11N: 1745 1745 + rx_status->encoding = RX_ENC_HT; 1746 1746 + if (rate_mcs > ATH12K_HT_MCS_MAX) { 1747 1747 + ath12k_warn(ar->ab, 1748 1748 + "Received with invalid mcs in HT mode %d\n", 1749 1749 + rate_mcs); 1750 1750 + break; 1751 1751 + } 1752 1752 + rx_status->rate_idx = rate_mcs + (8 * (nss - 1)); 1753 1753 + if (sgi) 1754 1754 + rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1755 1755 + break; 1756 1756 + case RX_MSDU_START_PKT_TYPE_11AC: 1757 1757 + rx_status->encoding = RX_ENC_VHT; 1758 1758 + rx_status->rate_idx = rate_mcs; 1759 1759 + if (rate_mcs > ATH12K_VHT_MCS_MAX) { 1760 1760 + ath12k_warn(ar->ab, 1761 1761 + "Received with invalid mcs in VHT mode %d\n", 1762 1762 + rate_mcs); 1763 1763 + break; 1764 1764 + } 1765 1765 + if (sgi) 1766 1766 + rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1767 1767 + break; 1768 1768 + case RX_MSDU_START_PKT_TYPE_11AX: 1769 1769 + rx_status->rate_idx = rate_mcs; 1770 1770 + if (rate_mcs > ATH12K_HE_MCS_MAX) { 1771 1771 + ath12k_warn(ar->ab, 1772 1772 + "Received with invalid mcs in HE mode %d\n", 1773 1773 + rate_mcs); 1774 1774 + break; 1775 1775 + } 1776 1776 + rx_status->encoding = RX_ENC_HE; 1777 1777 + rx_status->he_gi = ath12k_he_gi_to_nl80211_he_gi(sgi); 1778 1778 + break; 1779 1779 + case RX_MSDU_START_PKT_TYPE_11BE: 1780 1780 + rx_status->rate_idx = rate_mcs; 1781 1781 + if (rate_mcs > ATH12K_EHT_MCS_MAX) { 1782 1782 + ath12k_warn(ar->ab, 1783 1783 + "Received with invalid mcs in EHT mode %d\n", 1784 1784 + rate_mcs); 1785 1785 + break; 1786 1786 + } 1787 1787 + rx_status->encoding = RX_ENC_EHT; 1788 1788 + rx_status->he_gi = ath12k_he_gi_to_nl80211_he_gi(sgi); 1789 1789 + break; 1790 1790 + default: 1791 1791 + ath12k_dbg(ar->ab, ATH12K_DBG_DATA, 1792 1792 + "monitor receives invalid preamble type %d", 1793 1793 + pkt_type); 1794 1794 + break; 1795 1795 + } 1701 1796 } 1702 1797 1703 1798 static struct sk_buff * 1704 1799 ath12k_dp_mon_rx_merg_msdus(struct ath12k *ar, 1705 1705 - struct sk_buff *head_msdu, struct sk_buff *tail_msdu, 1706 1706 - struct ieee80211_rx_status *rxs, bool *fcs_err) 1800 1800 + struct dp_mon_mpdu *mon_mpdu, 1801 1801 + struct hal_rx_mon_ppdu_info *ppdu_info, 1802 1802 + struct ieee80211_rx_status *rxs) 1707 1803 { 1708 1804 struct ath12k_base *ab = ar->ab; 1709 1805 struct sk_buff *msdu, *mpdu_buf, *prev_buf, *head_frag_list; 1710 1710 - struct hal_rx_desc *rx_desc, *tail_rx_desc; 1711 1711 - u8 *hdr_desc, *dest, decap_format; 1806 1806 + struct sk_buff *head_msdu; 1807 1807 + struct hal_rx_desc *rx_desc; 1808 1808 + u8 *hdr_desc, *dest, decap_format = mon_mpdu->decap_format; 1712 1809 struct ieee80211_hdr_3addr *wh; 1713 1713 - u32 err_bitmap, frag_list_sum_len = 0; 1810 1810 + struct ieee80211_channel *channel; 1811 1811 + u32 frag_list_sum_len = 0; 1812 1812 + u8 channel_num = ppdu_info->chan_num; 1714 1813 1715 1814 mpdu_buf = NULL; 1815 1815 + head_msdu = mon_mpdu->head; 1716 1816 1717 1817 if (!head_msdu) 1718 1818 goto err_merge_fail; 1719 1819 1720 1720 - rx_desc = (struct hal_rx_desc *)head_msdu->data; 1721 1721 - tail_rx_desc = (struct hal_rx_desc *)tail_msdu->data; 1820 1820 + ath12k_dp_mon_fill_rx_stats_info(ar, ppdu_info, rxs); 1722 1821 1723 1723 - err_bitmap = ath12k_dp_rx_h_mpdu_err(ab, tail_rx_desc); 1724 1724 - if (err_bitmap & HAL_RX_MPDU_ERR_FCS) 1725 1725 - *fcs_err = true; 1822 1822 + if (unlikely(rxs->band == NUM_NL80211_BANDS || 1823 1823 + !ath12k_ar_to_hw(ar)->wiphy->bands[rxs->band])) { 1824 1824 + ath12k_dbg(ar->ab, ATH12K_DBG_DATA, 1825 1825 + "sband is NULL for status band %d channel_num %d center_freq %d pdev_id %d\n", 1826 1826 + rxs->band, channel_num, ppdu_info->freq, ar->pdev_idx); 1726 1827 1727 1727 - decap_format = ath12k_dp_rx_h_decap_type(ab, tail_rx_desc); 1828 1828 + spin_lock_bh(&ar->data_lock); 1829 1829 + channel = ar->rx_channel; 1830 1830 + if (channel) { 1831 1831 + rxs->band = channel->band; 1832 1832 + channel_num = 1833 1833 + ieee80211_frequency_to_channel(channel->center_freq); 1834 1834 + } 1835 1835 + spin_unlock_bh(&ar->data_lock); 1836 1836 + } 1728 1837 1729 1729 - ath12k_dp_rx_h_ppdu(ar, tail_rx_desc, rxs); 1838 1838 + if (rxs->band < NUM_NL80211_BANDS) 1839 1839 + rxs->freq = ieee80211_channel_to_frequency(channel_num, 1840 1840 + rxs->band); 1841 1841 + 1842 1842 + ath12k_dp_mon_fill_rx_rate(ar, ppdu_info, rxs); 1730 1843 1731 1844 if (decap_format == DP_RX_DECAP_TYPE_RAW) { 1732 1732 - ath12k_dp_mon_rx_msdus_set_payload(ar, head_msdu, tail_msdu); 1845 1845 + skb_pull(head_msdu, ATH12K_MON_RX_PKT_OFFSET); 1733 1846 1734 1847 prev_buf = head_msdu; 1735 1848 msdu = head_msdu->next; 1736 1849 head_frag_list = NULL; 1737 1850 1738 1851 while (msdu) { 1739 1739 - ath12k_dp_mon_rx_msdus_set_payload(ar, msdu, tail_msdu); 1852 1852 + skb_pull(msdu, ATH12K_MON_RX_PKT_OFFSET); 1740 1853 1741 1854 if (!head_frag_list) 1742 1855 head_frag_list = msdu; ··· 1861 1748 1862 1749 prev_buf->next = NULL; 1863 1750 1864 1864 - skb_trim(prev_buf, prev_buf->len - HAL_RX_FCS_LEN); 1751 1751 + skb_trim(prev_buf, prev_buf->len); 1865 1752 if (head_frag_list) { 1866 1753 skb_shinfo(head_msdu)->frag_list = head_frag_list; 1867 1754 head_msdu->data_len = frag_list_sum_len; ··· 1884 1771 msdu = head_msdu; 1885 1772 1886 1773 while (msdu) { 1887 1887 - ath12k_dp_mon_rx_msdus_set_payload(ar, msdu, tail_msdu); 1774 1774 + skb_pull(msdu, ATH12K_MON_RX_PKT_OFFSET); 1888 1775 if (qos_pkt) { 1889 1776 dest = skb_push(msdu, sizeof(__le16)); 1890 1777 if (!dest) ··· 2067 1954 2068 1955 static void ath12k_dp_mon_rx_deliver_msdu(struct ath12k *ar, struct napi_struct *napi, 2069 1956 struct sk_buff *msdu, 2070 2070 - struct ieee80211_rx_status *status) 1957 1957 + struct ieee80211_rx_status *status, 1958 1958 + u8 decap) 2071 1959 { 2072 1960 static const struct ieee80211_radiotap_he known = { 2073 1961 .data1 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA1_DATA_MCS_KNOWN | ··· 2080 1966 struct ieee80211_sta *pubsta = NULL; 2081 1967 struct ath12k_peer *peer; 2082 1968 struct ath12k_skb_rxcb *rxcb = ATH12K_SKB_RXCB(msdu); 2083 2083 - u8 decap = DP_RX_DECAP_TYPE_RAW; 1969 1969 + struct ath12k_dp_rx_info rx_info; 2084 1970 bool is_mcbc = rxcb->is_mcbc; 2085 1971 bool is_eapol_tkip = rxcb->is_eapol; 1972 1972 + 1973 1973 + status->link_valid = 0; 2086 1974 2087 1975 if ((status->encoding == RX_ENC_HE) && !(status->flag & RX_FLAG_RADIOTAP_HE) && 2088 1976 !(status->flag & RX_FLAG_SKIP_MONITOR)) { ··· 2093 1977 status->flag |= RX_FLAG_RADIOTAP_HE; 2094 1978 } 2095 1979 2096 2096 - if (!(status->flag & RX_FLAG_ONLY_MONITOR)) 2097 2097 - decap = ath12k_dp_rx_h_decap_type(ar->ab, rxcb->rx_desc); 2098 1980 spin_lock_bh(&ar->ab->base_lock); 2099 2099 - peer = ath12k_dp_rx_h_find_peer(ar->ab, msdu); 1981 1981 + rx_info.addr2_present = false; 1982 1982 + peer = ath12k_dp_rx_h_find_peer(ar->ab, msdu, &rx_info); 2100 1983 if (peer && peer->sta) { 2101 1984 pubsta = peer->sta; 2102 1985 if (pubsta->valid_links) { ··· 2150 2035 } 2151 2036 2152 2037 static int ath12k_dp_mon_rx_deliver(struct ath12k *ar, 2153 2153 - struct sk_buff *head_msdu, struct sk_buff *tail_msdu, 2038 2038 + struct dp_mon_mpdu *mon_mpdu, 2154 2039 struct hal_rx_mon_ppdu_info *ppduinfo, 2155 2040 struct napi_struct *napi) 2156 2041 { 2157 2042 struct ath12k_pdev_dp *dp = &ar->dp; 2158 2043 struct sk_buff *mon_skb, *skb_next, *header; 2159 2044 struct ieee80211_rx_status *rxs = &dp->rx_status; 2160 2160 - bool fcs_err = false; 2045 2045 + u8 decap = DP_RX_DECAP_TYPE_RAW; 2161 2046 2162 2162 - mon_skb = ath12k_dp_mon_rx_merg_msdus(ar, 2163 2163 - head_msdu, tail_msdu, 2164 2164 - rxs, &fcs_err); 2047 2047 + mon_skb = ath12k_dp_mon_rx_merg_msdus(ar, mon_mpdu, ppduinfo, rxs); 2165 2048 if (!mon_skb) 2166 2049 goto mon_deliver_fail; 2167 2050 2168 2051 header = mon_skb; 2169 2052 rxs->flag = 0; 2170 2053 2171 2171 - if (fcs_err) 2054 2054 + if (mon_mpdu->err_bitmap & HAL_RX_MPDU_ERR_FCS) 2172 2055 rxs->flag = RX_FLAG_FAILED_FCS_CRC; 2173 2056 2174 2057 do { ··· 2183 2070 rxs->flag |= RX_FLAG_ALLOW_SAME_PN; 2184 2071 } 2185 2072 rxs->flag |= RX_FLAG_ONLY_MONITOR; 2073 2073 + 2074 2074 + if (!(rxs->flag & RX_FLAG_ONLY_MONITOR)) 2075 2075 + decap = mon_mpdu->decap_format; 2076 2076 + 2186 2077 ath12k_dp_mon_update_radiotap(ar, ppduinfo, mon_skb, rxs); 2187 2187 - ath12k_dp_mon_rx_deliver_msdu(ar, napi, mon_skb, rxs); 2078 2078 + ath12k_dp_mon_rx_deliver_msdu(ar, napi, mon_skb, rxs, decap); 2188 2079 mon_skb = skb_next; 2189 2080 } while (mon_skb); 2190 2081 rxs->flag = 0; ··· 2196 2079 return 0; 2197 2080 2198 2081 mon_deliver_fail: 2199 2199 - mon_skb = head_msdu; 2082 2082 + mon_skb = mon_mpdu->head; 2200 2083 while (mon_skb) { 2201 2084 skb_next = mon_skb->next; 2202 2085 dev_kfree_skb_any(mon_skb); 2203 2086 mon_skb = skb_next; 2204 2087 } 2205 2088 return -EINVAL; 2089 2089 + } 2090 2090 + 2091 2091 + static int ath12k_dp_pkt_set_pktlen(struct sk_buff *skb, u32 len) 2092 2092 + { 2093 2093 + if (skb->len > len) { 2094 2094 + skb_trim(skb, len); 2095 2095 + } else { 2096 2096 + if (skb_tailroom(skb) < len - skb->len) { 2097 2097 + if ((pskb_expand_head(skb, 0, 2098 2098 + len - skb->len - skb_tailroom(skb), 2099 2099 + GFP_ATOMIC))) { 2100 2100 + return -ENOMEM; 2101 2101 + } 2102 2102 + } 2103 2103 + skb_put(skb, (len - skb->len)); 2104 2104 + } 2105 2105 + 2106 2106 + return 0; 2107 2107 + } 2108 2108 + 2109 2109 + static void ath12k_dp_mon_parse_rx_msdu_end_err(u32 info, u32 *errmap) 2110 2110 + { 2111 2111 + if (info & RX_MSDU_END_INFO13_FCS_ERR) 2112 2112 + *errmap |= HAL_RX_MPDU_ERR_FCS; 2113 2113 + 2114 2114 + if (info & RX_MSDU_END_INFO13_DECRYPT_ERR) 2115 2115 + *errmap |= HAL_RX_MPDU_ERR_DECRYPT; 2116 2116 + 2117 2117 + if (info & RX_MSDU_END_INFO13_TKIP_MIC_ERR) 2118 2118 + *errmap |= HAL_RX_MPDU_ERR_TKIP_MIC; 2119 2119 + 2120 2120 + if (info & RX_MSDU_END_INFO13_A_MSDU_ERROR) 2121 2121 + *errmap |= HAL_RX_MPDU_ERR_AMSDU_ERR; 2122 2122 + 2123 2123 + if (info & RX_MSDU_END_INFO13_OVERFLOW_ERR) 2124 2124 + *errmap |= HAL_RX_MPDU_ERR_OVERFLOW; 2125 2125 + 2126 2126 + if (info & RX_MSDU_END_INFO13_MSDU_LEN_ERR) 2127 2127 + *errmap |= HAL_RX_MPDU_ERR_MSDU_LEN; 2128 2128 + 2129 2129 + if (info & RX_MSDU_END_INFO13_MPDU_LEN_ERR) 2130 2130 + *errmap |= HAL_RX_MPDU_ERR_MPDU_LEN; 2131 2131 + } 2132 2132 + 2133 2133 + static int 2134 2134 + ath12k_dp_mon_parse_status_msdu_end(struct ath12k_mon_data *pmon, 2135 2135 + const struct hal_rx_msdu_end *msdu_end) 2136 2136 + { 2137 2137 + struct dp_mon_mpdu *mon_mpdu = pmon->mon_mpdu; 2138 2138 + 2139 2139 + ath12k_dp_mon_parse_rx_msdu_end_err(__le32_to_cpu(msdu_end->info2), 2140 2140 + &mon_mpdu->err_bitmap); 2141 2141 + 2142 2142 + mon_mpdu->decap_format = le32_get_bits(msdu_end->info1, 2143 2143 + RX_MSDU_END_INFO11_DECAP_FORMAT); 2144 2144 + 2145 2145 + return 0; 2146 2146 + } 2147 2147 + 2148 2148 + static int 2149 2149 + ath12k_dp_mon_parse_status_buf(struct ath12k *ar, 2150 2150 + struct ath12k_mon_data *pmon, 2151 2151 + const struct dp_mon_packet_info *packet_info) 2152 2152 + { 2153 2153 + struct ath12k_base *ab = ar->ab; 2154 2154 + struct dp_rxdma_mon_ring *buf_ring = &ab->dp.rxdma_mon_buf_ring; 2155 2155 + struct sk_buff *msdu; 2156 2156 + int buf_id; 2157 2157 + u32 offset; 2158 2158 + 2159 2159 + buf_id = u32_get_bits(packet_info->cookie, DP_RXDMA_BUF_COOKIE_BUF_ID); 2160 2160 + 2161 2161 + spin_lock_bh(&buf_ring->idr_lock); 2162 2162 + msdu = idr_remove(&buf_ring->bufs_idr, buf_id); 2163 2163 + spin_unlock_bh(&buf_ring->idr_lock); 2164 2164 + 2165 2165 + if (unlikely(!msdu)) { 2166 2166 + ath12k_warn(ab, "mon dest desc with inval buf_id %d\n", buf_id); 2167 2167 + return 0; 2168 2168 + } 2169 2169 + 2170 2170 + dma_unmap_single(ab->dev, ATH12K_SKB_RXCB(msdu)->paddr, 2171 2171 + msdu->len + skb_tailroom(msdu), 2172 2172 + DMA_FROM_DEVICE); 2173 2173 + 2174 2174 + offset = packet_info->dma_length + ATH12K_MON_RX_DOT11_OFFSET; 2175 2175 + if (ath12k_dp_pkt_set_pktlen(msdu, offset)) { 2176 2176 + dev_kfree_skb_any(msdu); 2177 2177 + goto dest_replenish; 2178 2178 + } 2179 2179 + 2180 2180 + if (!pmon->mon_mpdu->head) 2181 2181 + pmon->mon_mpdu->head = msdu; 2182 2182 + else 2183 2183 + pmon->mon_mpdu->tail->next = msdu; 2184 2184 + 2185 2185 + pmon->mon_mpdu->tail = msdu; 2186 2186 + 2187 2187 + dest_replenish: 2188 2188 + ath12k_dp_mon_buf_replenish(ab, buf_ring, 1); 2189 2189 + 2190 2190 + return 0; 2191 2191 + } 2192 2192 + 2193 2193 + static int 2194 2194 + ath12k_dp_mon_parse_rx_dest_tlv(struct ath12k *ar, 2195 2195 + struct ath12k_mon_data *pmon, 2196 2196 + enum hal_rx_mon_status hal_status, 2197 2197 + const void *tlv_data) 2198 2198 + { 2199 2199 + switch (hal_status) { 2200 2200 + case HAL_RX_MON_STATUS_MPDU_START: 2201 2201 + if (WARN_ON_ONCE(pmon->mon_mpdu)) 2202 2202 + break; 2203 2203 + 2204 2204 + pmon->mon_mpdu = kzalloc(sizeof(*pmon->mon_mpdu), GFP_ATOMIC); 2205 2205 + if (!pmon->mon_mpdu) 2206 2206 + return -ENOMEM; 2207 2207 + break; 2208 2208 + case HAL_RX_MON_STATUS_BUF_ADDR: 2209 2209 + return ath12k_dp_mon_parse_status_buf(ar, pmon, tlv_data); 2210 2210 + case HAL_RX_MON_STATUS_MPDU_END: 2211 2211 + /* If no MSDU then free empty MPDU */ 2212 2212 + if (pmon->mon_mpdu->tail) { 2213 2213 + pmon->mon_mpdu->tail->next = NULL; 2214 2214 + list_add_tail(&pmon->mon_mpdu->list, &pmon->dp_rx_mon_mpdu_list); 2215 2215 + } else { 2216 2216 + kfree(pmon->mon_mpdu); 2217 2217 + } 2218 2218 + pmon->mon_mpdu = NULL; 2219 2219 + break; 2220 2220 + case HAL_RX_MON_STATUS_MSDU_END: 2221 2221 + return ath12k_dp_mon_parse_status_msdu_end(pmon, tlv_data); 2222 2222 + default: 2223 2223 + break; 2224 2224 + } 2225 2225 + 2226 2226 + return 0; 2206 2227 } 2207 2228 2208 2229 static enum hal_rx_mon_status ··· 2369 2114 tlv_len = le64_get_bits(tlv->tl, HAL_TLV_64_HDR_LEN); 2370 2115 2371 2116 hal_status = ath12k_dp_mon_rx_parse_status_tlv(ar, pmon, tlv); 2117 2117 + 2118 2118 + if (ar->monitor_started && 2119 2119 + ath12k_dp_mon_parse_rx_dest_tlv(ar, pmon, hal_status, tlv->value)) 2120 2120 + return HAL_RX_MON_STATUS_PPDU_DONE; 2121 2121 + 2372 2122 ptr += sizeof(*tlv) + tlv_len; 2373 2123 ptr = PTR_ALIGN(ptr, HAL_TLV_64_ALIGN); 2374 2124 2375 2375 - if ((ptr - skb->data) >= DP_RX_BUFFER_SIZE) 2125 2125 + if ((ptr - skb->data) > skb->len) 2376 2126 break; 2377 2127 2378 2128 } while ((hal_status == HAL_RX_MON_STATUS_PPDU_NOT_DONE) || 2379 2129 (hal_status == HAL_RX_MON_STATUS_BUF_ADDR) || 2130 2130 + (hal_status == HAL_RX_MON_STATUS_MPDU_START) || 2380 2131 (hal_status == HAL_RX_MON_STATUS_MPDU_END) || 2381 2132 (hal_status == HAL_RX_MON_STATUS_MSDU_END)); 2382 2133 ··· 2402 2141 struct hal_rx_mon_ppdu_info *ppdu_info = &pmon->mon_ppdu_info; 2403 2142 struct dp_mon_mpdu *tmp; 2404 2143 struct dp_mon_mpdu *mon_mpdu = pmon->mon_mpdu; 2405 2405 - struct sk_buff *head_msdu, *tail_msdu; 2406 2406 - enum hal_rx_mon_status hal_status = HAL_RX_MON_STATUS_BUF_DONE; 2144 2144 + enum hal_rx_mon_status hal_status; 2407 2145 2408 2408 - ath12k_dp_mon_parse_rx_dest(ar, pmon, skb); 2146 2146 + hal_status = ath12k_dp_mon_parse_rx_dest(ar, pmon, skb); 2147 2147 + if (hal_status != HAL_RX_MON_STATUS_PPDU_DONE) 2148 2148 + return hal_status; 2409 2149 2410 2150 list_for_each_entry_safe(mon_mpdu, tmp, &pmon->dp_rx_mon_mpdu_list, list) { 2411 2151 list_del(&mon_mpdu->list); 2412 2412 - head_msdu = mon_mpdu->head; 2413 2413 - tail_msdu = mon_mpdu->tail; 2414 2152 2415 2415 - if (head_msdu && tail_msdu) { 2416 2416 - ath12k_dp_mon_rx_deliver(ar, head_msdu, 2417 2417 - tail_msdu, ppdu_info, napi); 2418 2418 - } 2153 2153 + if (mon_mpdu->head && mon_mpdu->tail) 2154 2154 + ath12k_dp_mon_rx_deliver(ar, mon_mpdu, ppdu_info, napi); 2419 2155 2420 2156 kfree(mon_mpdu); 2421 2157 } 2158 2158 + 2422 2159 return hal_status; 2423 2160 } 2424 2161 ··· 3097 2838 struct dp_mon_tx_ppdu_info *tx_ppdu_info) 3098 2839 { 3099 2840 struct dp_mon_mpdu *tmp, *mon_mpdu; 3100 3100 - struct sk_buff *head_msdu, *tail_msdu; 3101 2841 3102 2842 list_for_each_entry_safe(mon_mpdu, tmp, 3103 2843 &tx_ppdu_info->dp_tx_mon_mpdu_list, list) { 3104 2844 list_del(&mon_mpdu->list); 3105 3105 - head_msdu = mon_mpdu->head; 3106 3106 - tail_msdu = mon_mpdu->tail; 3107 2845 3108 3108 - if (head_msdu) 3109 3109 - ath12k_dp_mon_rx_deliver(ar, head_msdu, tail_msdu, 2846 2846 + if (mon_mpdu->head) 2847 2847 + ath12k_dp_mon_rx_deliver(ar, mon_mpdu, 3110 2848 &tx_ppdu_info->rx_status, napi); 3111 2849 3112 2850 kfree(mon_mpdu); ··· 3205 2949 struct ath12k_rx_peer_stats *rx_stats = arsta->rx_stats; 3206 2950 u32 num_msdu; 3207 2951 3208 3208 - if (!rx_stats) 3209 3209 - return; 3210 3210 - 3211 2952 arsta->rssi_comb = ppdu_info->rssi_comb; 3212 2953 ewma_avg_rssi_add(&arsta->avg_rssi, ppdu_info->rssi_comb); 2954 2954 + if (!rx_stats) 2955 2955 + return; 3213 2956 3214 2957 num_msdu = ppdu_info->tcp_msdu_count + ppdu_info->tcp_ack_msdu_count + 3215 2958 ppdu_info->udp_msdu_count + ppdu_info->other_msdu_count; ··· 3381 3126 3382 3127 ahsta = ath12k_sta_to_ahsta(peer->sta); 3383 3128 arsta = &ahsta->deflink; 3384 3384 - rx_stats = arsta->rx_stats; 3385 3385 - 3386 3386 - if (!rx_stats) 3387 3387 - return; 3388 3388 - 3389 3129 arsta->rssi_comb = ppdu_info->rssi_comb; 3390 3130 ewma_avg_rssi_add(&arsta->avg_rssi, ppdu_info->rssi_comb); 3131 3131 + rx_stats = arsta->rx_stats; 3132 3132 + if (!rx_stats) 3133 3133 + return; 3391 3134 3392 3135 num_msdu = user_stats->tcp_msdu_count + user_stats->tcp_ack_msdu_count + 3393 3136 user_stats->udp_msdu_count + user_stats->other_msdu_count; ··· 3599 3346 ath12k_dp_mon_rx_memset_ppdu_info(ppdu_info); 3600 3347 3601 3348 while ((skb = __skb_dequeue(&skb_list))) { 3602 3602 - hal_status = ath12k_dp_mon_parse_rx_dest(ar, pmon, skb); 3349 3349 + hal_status = ath12k_dp_mon_rx_parse_mon_status(ar, pmon, skb, napi); 3603 3350 if (hal_status != HAL_RX_MON_STATUS_PPDU_DONE) { 3604 3351 ppdu_info->ppdu_continuation = true; 3605 3352 dev_kfree_skb_any(skb);

+4 -1

drivers/net/wireless/ath/ath12k/dp_mon.h

reviewed

··· 1 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 2 /* 3 3 * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 7 7 #ifndef ATH12K_DP_MON_H 8 8 #define ATH12K_DP_MON_H 9 9 10 10 #include "core.h" 11 11 + 12 12 + #define ATH12K_MON_RX_DOT11_OFFSET 5 13 13 + #define ATH12K_MON_RX_PKT_OFFSET 8 11 14 12 15 enum dp_monitor_mode { 13 16 ATH12K_DP_TX_MONITOR_MODE,

+242 -182

drivers/net/wireless/ath/ath12k/dp_rx.c

reviewed

··· 228 228 ab->hal_rx_ops->rx_desc_get_crypto_header(desc, crypto_hdr, enctype); 229 229 } 230 230 231 231 - static u16 ath12k_dp_rxdesc_get_mpdu_frame_ctrl(struct ath12k_base *ab, 232 232 - struct hal_rx_desc *desc) 233 233 - { 234 234 - return ab->hal_rx_ops->rx_desc_get_mpdu_frame_ctl(desc); 235 235 - } 236 236 - 237 231 static inline u8 ath12k_dp_rx_get_msdu_src_link(struct ath12k_base *ab, 238 232 struct hal_rx_desc *desc) 239 233 { ··· 550 556 spin_lock_bh(&dp->reo_cmd_lock); 551 557 list_for_each_entry_safe(cmd, tmp, &dp->reo_cmd_list, list) { 552 558 list_del(&cmd->list); 553 553 - dma_unmap_single(ab->dev, cmd->data.paddr, 554 554 - cmd->data.size, DMA_BIDIRECTIONAL); 555 555 - kfree(cmd->data.vaddr); 559 559 + dma_unmap_single(ab->dev, cmd->data.qbuf.paddr_aligned, 560 560 + cmd->data.qbuf.size, DMA_BIDIRECTIONAL); 561 561 + kfree(cmd->data.qbuf.vaddr); 556 562 kfree(cmd); 557 563 } 558 564 ··· 560 566 &dp->reo_cmd_cache_flush_list, list) { 561 567 list_del(&cmd_cache->list); 562 568 dp->reo_cmd_cache_flush_count--; 563 563 - dma_unmap_single(ab->dev, cmd_cache->data.paddr, 564 564 - cmd_cache->data.size, DMA_BIDIRECTIONAL); 565 565 - kfree(cmd_cache->data.vaddr); 569 569 + dma_unmap_single(ab->dev, cmd_cache->data.qbuf.paddr_aligned, 570 570 + cmd_cache->data.qbuf.size, DMA_BIDIRECTIONAL); 571 571 + kfree(cmd_cache->data.qbuf.vaddr); 566 572 kfree(cmd_cache); 567 573 } 568 574 spin_unlock_bh(&dp->reo_cmd_lock); ··· 577 583 ath12k_warn(dp->ab, "failed to flush rx tid hw desc, tid %d status %d\n", 578 584 rx_tid->tid, status); 579 585 580 580 - dma_unmap_single(dp->ab->dev, rx_tid->paddr, rx_tid->size, 586 586 + dma_unmap_single(dp->ab->dev, rx_tid->qbuf.paddr_aligned, rx_tid->qbuf.size, 581 587 DMA_BIDIRECTIONAL); 582 582 - kfree(rx_tid->vaddr); 583 583 - rx_tid->vaddr = NULL; 588 588 + kfree(rx_tid->qbuf.vaddr); 589 589 + rx_tid->qbuf.vaddr = NULL; 584 590 } 585 591 586 592 static int ath12k_dp_reo_cmd_send(struct ath12k_base *ab, struct ath12k_dp_rx_tid *rx_tid, ··· 635 641 unsigned long tot_desc_sz, desc_sz; 636 642 int ret; 637 643 638 638 - tot_desc_sz = rx_tid->size; 644 644 + tot_desc_sz = rx_tid->qbuf.size; 639 645 desc_sz = ath12k_hal_reo_qdesc_size(0, HAL_DESC_REO_NON_QOS_TID); 640 646 641 647 while (tot_desc_sz > desc_sz) { 642 648 tot_desc_sz -= desc_sz; 643 643 - cmd.addr_lo = lower_32_bits(rx_tid->paddr + tot_desc_sz); 644 644 - cmd.addr_hi = upper_32_bits(rx_tid->paddr); 649 649 + cmd.addr_lo = lower_32_bits(rx_tid->qbuf.paddr_aligned + tot_desc_sz); 650 650 + cmd.addr_hi = upper_32_bits(rx_tid->qbuf.paddr_aligned); 645 651 ret = ath12k_dp_reo_cmd_send(ab, rx_tid, 646 652 HAL_REO_CMD_FLUSH_CACHE, &cmd, 647 653 NULL); ··· 652 658 } 653 659 654 660 memset(&cmd, 0, sizeof(cmd)); 655 655 - cmd.addr_lo = lower_32_bits(rx_tid->paddr); 656 656 - cmd.addr_hi = upper_32_bits(rx_tid->paddr); 661 661 + cmd.addr_lo = lower_32_bits(rx_tid->qbuf.paddr_aligned); 662 662 + cmd.addr_hi = upper_32_bits(rx_tid->qbuf.paddr_aligned); 657 663 cmd.flag = HAL_REO_CMD_FLG_NEED_STATUS; 658 664 ret = ath12k_dp_reo_cmd_send(ab, rx_tid, 659 665 HAL_REO_CMD_FLUSH_CACHE, ··· 661 667 if (ret) { 662 668 ath12k_err(ab, "failed to send HAL_REO_CMD_FLUSH_CACHE cmd, tid %d (%d)\n", 663 669 rx_tid->tid, ret); 664 664 - dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size, 670 670 + dma_unmap_single(ab->dev, rx_tid->qbuf.paddr_aligned, rx_tid->qbuf.size, 665 671 DMA_BIDIRECTIONAL); 666 666 - kfree(rx_tid->vaddr); 667 667 - rx_tid->vaddr = NULL; 672 672 + kfree(rx_tid->qbuf.vaddr); 673 673 + rx_tid->qbuf.vaddr = NULL; 668 674 } 669 675 } 670 676 ··· 723 729 724 730 return; 725 731 free_desc: 726 726 - dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size, 732 732 + dma_unmap_single(ab->dev, rx_tid->qbuf.paddr_aligned, rx_tid->qbuf.size, 727 733 DMA_BIDIRECTIONAL); 728 728 - kfree(rx_tid->vaddr); 729 729 - rx_tid->vaddr = NULL; 734 734 + kfree(rx_tid->qbuf.vaddr); 735 735 + rx_tid->qbuf.vaddr = NULL; 730 736 } 731 737 732 738 static void ath12k_peer_rx_tid_qref_setup(struct ath12k_base *ab, u16 peer_id, u16 tid, ··· 756 762 qref->info1 = u32_encode_bits(upper_32_bits(paddr), 757 763 BUFFER_ADDR_INFO1_ADDR) | 758 764 u32_encode_bits(tid, DP_REO_QREF_NUM); 765 765 + ath12k_hal_reo_shared_qaddr_cache_clear(ab); 759 766 } 760 767 761 768 static void ath12k_peer_rx_tid_qref_reset(struct ath12k_base *ab, u16 peer_id, u16 tid) ··· 796 801 return; 797 802 798 803 cmd.flag = HAL_REO_CMD_FLG_NEED_STATUS; 799 799 - cmd.addr_lo = lower_32_bits(rx_tid->paddr); 800 800 - cmd.addr_hi = upper_32_bits(rx_tid->paddr); 804 804 + cmd.addr_lo = lower_32_bits(rx_tid->qbuf.paddr_aligned); 805 805 + cmd.addr_hi = upper_32_bits(rx_tid->qbuf.paddr_aligned); 801 806 cmd.upd0 = HAL_REO_CMD_UPD0_VLD; 802 807 ret = ath12k_dp_reo_cmd_send(ar->ab, rx_tid, 803 808 HAL_REO_CMD_UPDATE_RX_QUEUE, &cmd, ··· 805 810 if (ret) { 806 811 ath12k_err(ar->ab, "failed to send HAL_REO_CMD_UPDATE_RX_QUEUE cmd, tid %d (%d)\n", 807 812 tid, ret); 808 808 - dma_unmap_single(ar->ab->dev, rx_tid->paddr, rx_tid->size, 809 809 - DMA_BIDIRECTIONAL); 810 810 - kfree(rx_tid->vaddr); 811 811 - rx_tid->vaddr = NULL; 813 813 + dma_unmap_single(ar->ab->dev, rx_tid->qbuf.paddr_aligned, 814 814 + rx_tid->qbuf.size, DMA_BIDIRECTIONAL); 815 815 + kfree(rx_tid->qbuf.vaddr); 816 816 + rx_tid->qbuf.vaddr = NULL; 812 817 } 813 818 814 819 if (peer->mlo) ··· 904 909 struct ath12k_hal_reo_cmd cmd = {0}; 905 910 int ret; 906 911 907 907 - cmd.addr_lo = lower_32_bits(rx_tid->paddr); 908 908 - cmd.addr_hi = upper_32_bits(rx_tid->paddr); 912 912 + cmd.addr_lo = lower_32_bits(rx_tid->qbuf.paddr_aligned); 913 913 + cmd.addr_hi = upper_32_bits(rx_tid->qbuf.paddr_aligned); 909 914 cmd.flag = HAL_REO_CMD_FLG_NEED_STATUS; 910 915 cmd.upd0 = HAL_REO_CMD_UPD0_BA_WINDOW_SIZE; 911 916 cmd.ba_window_size = ba_win_sz; ··· 929 934 return 0; 930 935 } 931 936 937 937 + static int ath12k_dp_rx_assign_reoq(struct ath12k_base *ab, 938 938 + struct ath12k_sta *ahsta, 939 939 + struct ath12k_dp_rx_tid *rx_tid, 940 940 + u16 ssn, enum hal_pn_type pn_type) 941 941 + { 942 942 + u32 ba_win_sz = rx_tid->ba_win_sz; 943 943 + struct ath12k_reoq_buf *buf; 944 944 + void *vaddr, *vaddr_aligned; 945 945 + dma_addr_t paddr_aligned; 946 946 + u8 tid = rx_tid->tid; 947 947 + u32 hw_desc_sz; 948 948 + int ret; 949 949 + 950 950 + buf = &ahsta->reoq_bufs[tid]; 951 951 + if (!buf->vaddr) { 952 952 + /* TODO: Optimize the memory allocation for qos tid based on 953 953 + * the actual BA window size in REO tid update path. 954 954 + */ 955 955 + if (tid == HAL_DESC_REO_NON_QOS_TID) 956 956 + hw_desc_sz = ath12k_hal_reo_qdesc_size(ba_win_sz, tid); 957 957 + else 958 958 + hw_desc_sz = ath12k_hal_reo_qdesc_size(DP_BA_WIN_SZ_MAX, tid); 959 959 + 960 960 + vaddr = kzalloc(hw_desc_sz + HAL_LINK_DESC_ALIGN - 1, GFP_ATOMIC); 961 961 + if (!vaddr) 962 962 + return -ENOMEM; 963 963 + 964 964 + vaddr_aligned = PTR_ALIGN(vaddr, HAL_LINK_DESC_ALIGN); 965 965 + 966 966 + ath12k_hal_reo_qdesc_setup(vaddr_aligned, tid, ba_win_sz, 967 967 + ssn, pn_type); 968 968 + 969 969 + paddr_aligned = dma_map_single(ab->dev, vaddr_aligned, hw_desc_sz, 970 970 + DMA_BIDIRECTIONAL); 971 971 + ret = dma_mapping_error(ab->dev, paddr_aligned); 972 972 + if (ret) { 973 973 + kfree(vaddr); 974 974 + return ret; 975 975 + } 976 976 + 977 977 + buf->vaddr = vaddr; 978 978 + buf->paddr_aligned = paddr_aligned; 979 979 + buf->size = hw_desc_sz; 980 980 + } 981 981 + 982 982 + rx_tid->qbuf = *buf; 983 983 + rx_tid->active = true; 984 984 + 985 985 + return 0; 986 986 + } 987 987 + 932 988 int ath12k_dp_rx_peer_tid_setup(struct ath12k *ar, const u8 *peer_mac, int vdev_id, 933 989 u8 tid, u32 ba_win_sz, u16 ssn, 934 990 enum hal_pn_type pn_type) 935 991 { 936 992 struct ath12k_base *ab = ar->ab; 937 993 struct ath12k_dp *dp = &ab->dp; 938 938 - struct hal_rx_reo_queue *addr_aligned; 939 994 struct ath12k_peer *peer; 995 995 + struct ath12k_sta *ahsta; 940 996 struct ath12k_dp_rx_tid *rx_tid; 941 941 - u32 hw_desc_sz; 942 942 - void *vaddr; 943 943 - dma_addr_t paddr; 997 997 + dma_addr_t paddr_aligned; 944 998 int ret; 945 999 946 1000 spin_lock_bh(&ab->base_lock); ··· 1001 957 return -ENOENT; 1002 958 } 1003 959 1004 1004 - if (!peer->primary_link) { 960 960 + if (ab->hw_params->dp_primary_link_only && 961 961 + !peer->primary_link) { 1005 962 spin_unlock_bh(&ab->base_lock); 1006 963 return 0; 1007 964 } ··· 1022 977 } 1023 978 1024 979 rx_tid = &peer->rx_tid[tid]; 980 980 + paddr_aligned = rx_tid->qbuf.paddr_aligned; 1025 981 /* Update the tid queue if it is already setup */ 1026 982 if (rx_tid->active) { 1027 1027 - paddr = rx_tid->paddr; 1028 983 ret = ath12k_peer_rx_tid_reo_update(ar, peer, rx_tid, 1029 984 ba_win_sz, ssn, true); 1030 985 spin_unlock_bh(&ab->base_lock); ··· 1036 991 if (!ab->hw_params->reoq_lut_support) { 1037 992 ret = ath12k_wmi_peer_rx_reorder_queue_setup(ar, vdev_id, 1038 993 peer_mac, 1039 1039 - paddr, tid, 1, 1040 1040 - ba_win_sz); 994 994 + paddr_aligned, tid, 995 995 + 1, ba_win_sz); 1041 996 if (ret) { 1042 997 ath12k_warn(ab, "failed to setup peer rx reorder queuefor tid %d: %d\n", 1043 998 tid, ret); ··· 1052 1007 1053 1008 rx_tid->ba_win_sz = ba_win_sz; 1054 1009 1055 1055 - /* TODO: Optimize the memory allocation for qos tid based on 1056 1056 - * the actual BA window size in REO tid update path. 1057 1057 - */ 1058 1058 - if (tid == HAL_DESC_REO_NON_QOS_TID) 1059 1059 - hw_desc_sz = ath12k_hal_reo_qdesc_size(ba_win_sz, tid); 1060 1060 - else 1061 1061 - hw_desc_sz = ath12k_hal_reo_qdesc_size(DP_BA_WIN_SZ_MAX, tid); 1062 1062 - 1063 1063 - vaddr = kzalloc(hw_desc_sz + HAL_LINK_DESC_ALIGN - 1, GFP_ATOMIC); 1064 1064 - if (!vaddr) { 1065 1065 - spin_unlock_bh(&ab->base_lock); 1066 1066 - return -ENOMEM; 1067 1067 - } 1068 1068 - 1069 1069 - addr_aligned = PTR_ALIGN(vaddr, HAL_LINK_DESC_ALIGN); 1070 1070 - 1071 1071 - ath12k_hal_reo_qdesc_setup(addr_aligned, tid, ba_win_sz, 1072 1072 - ssn, pn_type); 1073 1073 - 1074 1074 - paddr = dma_map_single(ab->dev, addr_aligned, hw_desc_sz, 1075 1075 - DMA_BIDIRECTIONAL); 1076 1076 - 1077 1077 - ret = dma_mapping_error(ab->dev, paddr); 1010 1010 + ahsta = ath12k_sta_to_ahsta(peer->sta); 1011 1011 + ret = ath12k_dp_rx_assign_reoq(ab, ahsta, rx_tid, ssn, pn_type); 1078 1012 if (ret) { 1079 1013 spin_unlock_bh(&ab->base_lock); 1080 1080 - goto err_mem_free; 1014 1014 + ath12k_warn(ab, "failed to assign reoq buf for rx tid %u\n", tid); 1015 1015 + return ret; 1081 1016 } 1082 1082 - 1083 1083 - rx_tid->vaddr = vaddr; 1084 1084 - rx_tid->paddr = paddr; 1085 1085 - rx_tid->size = hw_desc_sz; 1086 1086 - rx_tid->active = true; 1087 1017 1088 1018 if (ab->hw_params->reoq_lut_support) { 1089 1019 /* Update the REO queue LUT at the corresponding peer id 1090 1020 * and tid with qaddr. 1091 1021 */ 1092 1022 if (peer->mlo) 1093 1093 - ath12k_peer_rx_tid_qref_setup(ab, peer->ml_id, tid, paddr); 1023 1023 + ath12k_peer_rx_tid_qref_setup(ab, peer->ml_id, tid, 1024 1024 + paddr_aligned); 1094 1025 else 1095 1095 - ath12k_peer_rx_tid_qref_setup(ab, peer->peer_id, tid, paddr); 1026 1026 + ath12k_peer_rx_tid_qref_setup(ab, peer->peer_id, tid, 1027 1027 + paddr_aligned); 1096 1028 1097 1029 spin_unlock_bh(&ab->base_lock); 1098 1030 } else { 1099 1031 spin_unlock_bh(&ab->base_lock); 1100 1032 ret = ath12k_wmi_peer_rx_reorder_queue_setup(ar, vdev_id, peer_mac, 1101 1101 - paddr, tid, 1, ba_win_sz); 1033 1033 + paddr_aligned, tid, 1, 1034 1034 + ba_win_sz); 1102 1035 } 1103 1103 - 1104 1104 - return ret; 1105 1105 - 1106 1106 - err_mem_free: 1107 1107 - kfree(vaddr); 1108 1036 1109 1037 return ret; 1110 1038 } ··· 1214 1196 rx_tid = &peer->rx_tid[tid]; 1215 1197 if (!rx_tid->active) 1216 1198 continue; 1217 1217 - cmd.addr_lo = lower_32_bits(rx_tid->paddr); 1218 1218 - cmd.addr_hi = upper_32_bits(rx_tid->paddr); 1199 1199 + cmd.addr_lo = lower_32_bits(rx_tid->qbuf.paddr_aligned); 1200 1200 + cmd.addr_hi = upper_32_bits(rx_tid->qbuf.paddr_aligned); 1219 1201 ret = ath12k_dp_reo_cmd_send(ab, rx_tid, 1220 1202 HAL_REO_CMD_UPDATE_RX_QUEUE, 1221 1203 &cmd, NULL); ··· 1841 1823 struct hal_rx_desc *ldesc; 1842 1824 int space_extra, rem_len, buf_len; 1843 1825 u32 hal_rx_desc_sz = ar->ab->hal.hal_desc_sz; 1826 1826 + bool is_continuation; 1844 1827 1845 1828 /* As the msdu is spread across multiple rx buffers, 1846 1829 * find the offset to the start of msdu for computing ··· 1890 1871 rem_len = msdu_len - buf_first_len; 1891 1872 while ((skb = __skb_dequeue(msdu_list)) != NULL && rem_len > 0) { 1892 1873 rxcb = ATH12K_SKB_RXCB(skb); 1893 1893 - if (rxcb->is_continuation) 1874 1874 + is_continuation = rxcb->is_continuation; 1875 1875 + if (is_continuation) 1894 1876 buf_len = DP_RX_BUFFER_SIZE - hal_rx_desc_sz; 1895 1877 else 1896 1878 buf_len = rem_len; ··· 1909 1889 dev_kfree_skb_any(skb); 1910 1890 1911 1891 rem_len -= buf_len; 1912 1912 - if (!rxcb->is_continuation) 1892 1892 + if (!is_continuation) 1913 1893 break; 1914 1894 } 1915 1895 ··· 1934 1914 return NULL; 1935 1915 } 1936 1916 1937 1937 - static void ath12k_dp_rx_h_csum_offload(struct ath12k *ar, struct sk_buff *msdu) 1917 1917 + static void ath12k_dp_rx_h_csum_offload(struct sk_buff *msdu, 1918 1918 + struct ath12k_dp_rx_info *rx_info) 1938 1919 { 1939 1939 - struct ath12k_skb_rxcb *rxcb = ATH12K_SKB_RXCB(msdu); 1940 1940 - struct ath12k_base *ab = ar->ab; 1941 1941 - bool ip_csum_fail, l4_csum_fail; 1942 1942 - 1943 1943 - ip_csum_fail = ath12k_dp_rx_h_ip_cksum_fail(ab, rxcb->rx_desc); 1944 1944 - l4_csum_fail = ath12k_dp_rx_h_l4_cksum_fail(ab, rxcb->rx_desc); 1945 1945 - 1946 1946 - msdu->ip_summed = (ip_csum_fail || l4_csum_fail) ? 1947 1947 - CHECKSUM_NONE : CHECKSUM_UNNECESSARY; 1920 1920 + msdu->ip_summed = (rx_info->ip_csum_fail || rx_info->l4_csum_fail) ? 1921 1921 + CHECKSUM_NONE : CHECKSUM_UNNECESSARY; 1948 1922 } 1949 1923 1950 1950 - static int ath12k_dp_rx_crypto_mic_len(struct ath12k *ar, 1951 1951 - enum hal_encrypt_type enctype) 1924 1924 + int ath12k_dp_rx_crypto_mic_len(struct ath12k *ar, enum hal_encrypt_type enctype) 1952 1925 { 1953 1926 switch (enctype) { 1954 1927 case HAL_ENCRYPT_TYPE_OPEN: ··· 2135 2122 struct hal_rx_desc *rx_desc = rxcb->rx_desc; 2136 2123 struct ath12k_base *ab = ar->ab; 2137 2124 size_t hdr_len, crypto_len; 2138 2138 - struct ieee80211_hdr *hdr; 2139 2139 - u16 qos_ctl; 2140 2140 - __le16 fc; 2141 2141 - u8 *crypto_hdr; 2125 2125 + struct ieee80211_hdr hdr; 2126 2126 + __le16 qos_ctl; 2127 2127 + u8 *crypto_hdr, mesh_ctrl; 2128 2128 + 2129 2129 + ath12k_dp_rx_desc_get_dot11_hdr(ab, rx_desc, &hdr); 2130 2130 + hdr_len = ieee80211_hdrlen(hdr.frame_control); 2131 2131 + mesh_ctrl = ath12k_dp_rx_h_mesh_ctl_present(ab, rx_desc); 2142 2132 2143 2133 if (!(status->flag & RX_FLAG_IV_STRIPPED)) { 2144 2134 crypto_len = ath12k_dp_rx_crypto_param_len(ar, enctype); ··· 2149 2133 ath12k_dp_rx_desc_get_crypto_header(ab, rx_desc, crypto_hdr, enctype); 2150 2134 } 2151 2135 2152 2152 - fc = cpu_to_le16(ath12k_dp_rxdesc_get_mpdu_frame_ctrl(ab, rx_desc)); 2153 2153 - hdr_len = ieee80211_hdrlen(fc); 2154 2136 skb_push(msdu, hdr_len); 2155 2155 - hdr = (struct ieee80211_hdr *)msdu->data; 2156 2156 - hdr->frame_control = fc; 2157 2157 - 2158 2158 - /* Get wifi header from rx_desc */ 2159 2159 - ath12k_dp_rx_desc_get_dot11_hdr(ab, rx_desc, hdr); 2137 2137 + memcpy(msdu->data, &hdr, min(hdr_len, sizeof(hdr))); 2160 2138 2161 2139 if (rxcb->is_mcbc) 2162 2140 status->flag &= ~RX_FLAG_PN_VALIDATED; 2163 2141 2164 2142 /* Add QOS header */ 2165 2165 - if (ieee80211_is_data_qos(hdr->frame_control)) { 2166 2166 - qos_ctl = rxcb->tid; 2167 2167 - if (ath12k_dp_rx_h_mesh_ctl_present(ab, rx_desc)) 2168 2168 - qos_ctl |= IEEE80211_QOS_CTL_MESH_CONTROL_PRESENT; 2143 2143 + if (ieee80211_is_data_qos(hdr.frame_control)) { 2144 2144 + struct ieee80211_hdr *qos_ptr = (struct ieee80211_hdr *)msdu->data; 2169 2145 2170 2170 - /* TODO: Add other QoS ctl fields when required */ 2171 2171 - memcpy(msdu->data + (hdr_len - IEEE80211_QOS_CTL_LEN), 2172 2172 - &qos_ctl, IEEE80211_QOS_CTL_LEN); 2146 2146 + qos_ctl = cpu_to_le16(rxcb->tid & IEEE80211_QOS_CTL_TID_MASK); 2147 2147 + if (mesh_ctrl) 2148 2148 + qos_ctl |= cpu_to_le16(IEEE80211_QOS_CTL_MESH_CONTROL_PRESENT); 2149 2149 + 2150 2150 + memcpy(ieee80211_get_qos_ctl(qos_ptr), &qos_ctl, IEEE80211_QOS_CTL_LEN); 2173 2151 } 2174 2152 } 2175 2153 ··· 2239 2229 } 2240 2230 2241 2231 struct ath12k_peer * 2242 2242 - ath12k_dp_rx_h_find_peer(struct ath12k_base *ab, struct sk_buff *msdu) 2232 2232 + ath12k_dp_rx_h_find_peer(struct ath12k_base *ab, struct sk_buff *msdu, 2233 2233 + struct ath12k_dp_rx_info *rx_info) 2243 2234 { 2244 2235 struct ath12k_skb_rxcb *rxcb = ATH12K_SKB_RXCB(msdu); 2245 2245 - struct hal_rx_desc *rx_desc = rxcb->rx_desc; 2246 2236 struct ath12k_peer *peer = NULL; 2247 2237 2248 2238 lockdep_assert_held(&ab->base_lock); ··· 2253 2243 if (peer) 2254 2244 return peer; 2255 2245 2256 2256 - if (!rx_desc || !(ath12k_dp_rxdesc_mac_addr2_valid(ab, rx_desc))) 2257 2257 - return NULL; 2246 2246 + if (rx_info->addr2_present) 2247 2247 + peer = ath12k_peer_find_by_addr(ab, rx_info->addr2); 2258 2248 2259 2259 - peer = ath12k_peer_find_by_addr(ab, 2260 2260 - ath12k_dp_rxdesc_get_mpdu_start_addr2(ab, 2261 2261 - rx_desc)); 2262 2249 return peer; 2263 2250 } 2264 2251 2265 2252 static void ath12k_dp_rx_h_mpdu(struct ath12k *ar, 2266 2253 struct sk_buff *msdu, 2267 2254 struct hal_rx_desc *rx_desc, 2268 2268 - struct ieee80211_rx_status *rx_status) 2255 2255 + struct ath12k_dp_rx_info *rx_info) 2269 2256 { 2270 2270 - bool fill_crypto_hdr; 2271 2257 struct ath12k_base *ab = ar->ab; 2272 2258 struct ath12k_skb_rxcb *rxcb; 2273 2259 enum hal_encrypt_type enctype; 2274 2260 bool is_decrypted = false; 2275 2261 struct ieee80211_hdr *hdr; 2276 2262 struct ath12k_peer *peer; 2263 2263 + struct ieee80211_rx_status *rx_status = rx_info->rx_status; 2277 2264 u32 err_bitmap; 2278 2265 2279 2266 /* PN for multicast packets will be checked in mac80211 */ 2280 2267 rxcb = ATH12K_SKB_RXCB(msdu); 2281 2281 - fill_crypto_hdr = ath12k_dp_rx_h_is_da_mcbc(ar->ab, rx_desc); 2282 2282 - rxcb->is_mcbc = fill_crypto_hdr; 2268 2268 + rxcb->is_mcbc = rx_info->is_mcbc; 2283 2269 2284 2270 if (rxcb->is_mcbc) 2285 2285 - rxcb->peer_id = ath12k_dp_rx_h_peer_id(ar->ab, rx_desc); 2271 2271 + rxcb->peer_id = rx_info->peer_id; 2286 2272 2287 2273 spin_lock_bh(&ar->ab->base_lock); 2288 2288 - peer = ath12k_dp_rx_h_find_peer(ar->ab, msdu); 2274 2274 + peer = ath12k_dp_rx_h_find_peer(ar->ab, msdu, rx_info); 2289 2275 if (peer) { 2276 2276 + /* resetting mcbc bit because mcbc packets are unicast 2277 2277 + * packets only for AP as STA sends unicast packets. 2278 2278 + */ 2279 2279 + rxcb->is_mcbc = rxcb->is_mcbc && !peer->ucast_ra_only; 2280 2280 + 2290 2281 if (rxcb->is_mcbc) 2291 2282 enctype = peer->sec_type_grp; 2292 2283 else ··· 2316 2305 if (is_decrypted) { 2317 2306 rx_status->flag |= RX_FLAG_DECRYPTED | RX_FLAG_MMIC_STRIPPED; 2318 2307 2319 2319 - if (fill_crypto_hdr) 2308 2308 + if (rx_info->is_mcbc) 2320 2309 rx_status->flag |= RX_FLAG_MIC_STRIPPED | 2321 2310 RX_FLAG_ICV_STRIPPED; 2322 2311 else ··· 2324 2313 RX_FLAG_PN_VALIDATED; 2325 2314 } 2326 2315 2327 2327 - ath12k_dp_rx_h_csum_offload(ar, msdu); 2316 2316 + ath12k_dp_rx_h_csum_offload(msdu, rx_info); 2328 2317 ath12k_dp_rx_h_undecap(ar, msdu, rx_desc, 2329 2318 enctype, rx_status, is_decrypted); 2330 2319 2331 2331 - if (!is_decrypted || fill_crypto_hdr) 2320 2320 + if (!is_decrypted || rx_info->is_mcbc) 2332 2321 return; 2333 2322 2334 2334 - if (ath12k_dp_rx_h_decap_type(ar->ab, rx_desc) != 2335 2335 - DP_RX_DECAP_TYPE_ETHERNET2_DIX) { 2323 2323 + if (rx_info->decap_type != DP_RX_DECAP_TYPE_ETHERNET2_DIX) { 2336 2324 hdr = (void *)msdu->data; 2337 2325 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); 2338 2326 } 2339 2327 } 2340 2328 2341 2341 - static void ath12k_dp_rx_h_rate(struct ath12k *ar, struct hal_rx_desc *rx_desc, 2342 2342 - struct ieee80211_rx_status *rx_status) 2329 2329 + static void ath12k_dp_rx_h_rate(struct ath12k *ar, struct ath12k_dp_rx_info *rx_info) 2343 2330 { 2344 2344 - struct ath12k_base *ab = ar->ab; 2345 2331 struct ieee80211_supported_band *sband; 2346 2346 - enum rx_msdu_start_pkt_type pkt_type; 2347 2347 - u8 bw; 2348 2348 - u8 rate_mcs, nss; 2349 2349 - u8 sgi; 2332 2332 + struct ieee80211_rx_status *rx_status = rx_info->rx_status; 2333 2333 + enum rx_msdu_start_pkt_type pkt_type = rx_info->pkt_type; 2334 2334 + u8 bw = rx_info->bw, sgi = rx_info->sgi; 2335 2335 + u8 rate_mcs = rx_info->rate_mcs, nss = rx_info->nss; 2350 2336 bool is_cck; 2351 2351 - 2352 2352 - pkt_type = ath12k_dp_rx_h_pkt_type(ab, rx_desc); 2353 2353 - bw = ath12k_dp_rx_h_rx_bw(ab, rx_desc); 2354 2354 - rate_mcs = ath12k_dp_rx_h_rate_mcs(ab, rx_desc); 2355 2355 - nss = ath12k_dp_rx_h_nss(ab, rx_desc); 2356 2356 - sgi = ath12k_dp_rx_h_sgi(ab, rx_desc); 2357 2337 2358 2338 switch (pkt_type) { 2359 2339 case RX_MSDU_START_PKT_TYPE_11A: ··· 2414 2412 } 2415 2413 } 2416 2414 2417 2417 - void ath12k_dp_rx_h_ppdu(struct ath12k *ar, struct hal_rx_desc *rx_desc, 2418 2418 - struct ieee80211_rx_status *rx_status) 2415 2415 + void ath12k_dp_rx_h_fetch_info(struct ath12k_base *ab, struct hal_rx_desc *rx_desc, 2416 2416 + struct ath12k_dp_rx_info *rx_info) 2419 2417 { 2420 2420 - struct ath12k_base *ab = ar->ab; 2418 2418 + rx_info->ip_csum_fail = ath12k_dp_rx_h_ip_cksum_fail(ab, rx_desc); 2419 2419 + rx_info->l4_csum_fail = ath12k_dp_rx_h_l4_cksum_fail(ab, rx_desc); 2420 2420 + rx_info->is_mcbc = ath12k_dp_rx_h_is_da_mcbc(ab, rx_desc); 2421 2421 + rx_info->decap_type = ath12k_dp_rx_h_decap_type(ab, rx_desc); 2422 2422 + rx_info->pkt_type = ath12k_dp_rx_h_pkt_type(ab, rx_desc); 2423 2423 + rx_info->sgi = ath12k_dp_rx_h_sgi(ab, rx_desc); 2424 2424 + rx_info->rate_mcs = ath12k_dp_rx_h_rate_mcs(ab, rx_desc); 2425 2425 + rx_info->bw = ath12k_dp_rx_h_rx_bw(ab, rx_desc); 2426 2426 + rx_info->nss = ath12k_dp_rx_h_nss(ab, rx_desc); 2427 2427 + rx_info->tid = ath12k_dp_rx_h_tid(ab, rx_desc); 2428 2428 + rx_info->peer_id = ath12k_dp_rx_h_peer_id(ab, rx_desc); 2429 2429 + rx_info->phy_meta_data = ath12k_dp_rx_h_freq(ab, rx_desc); 2430 2430 + 2431 2431 + if (ath12k_dp_rxdesc_mac_addr2_valid(ab, rx_desc)) { 2432 2432 + ether_addr_copy(rx_info->addr2, 2433 2433 + ath12k_dp_rxdesc_get_mpdu_start_addr2(ab, rx_desc)); 2434 2434 + rx_info->addr2_present = true; 2435 2435 + } 2436 2436 + 2437 2437 + ath12k_dbg_dump(ab, ATH12K_DBG_DATA, NULL, "rx_desc: ", 2438 2438 + rx_desc, sizeof(*rx_desc)); 2439 2439 + } 2440 2440 + 2441 2441 + void ath12k_dp_rx_h_ppdu(struct ath12k *ar, struct ath12k_dp_rx_info *rx_info) 2442 2442 + { 2443 2443 + struct ieee80211_rx_status *rx_status = rx_info->rx_status; 2421 2444 u8 channel_num; 2422 2445 u32 center_freq, meta_data; 2423 2446 struct ieee80211_channel *channel; ··· 2456 2429 2457 2430 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL; 2458 2431 2459 2459 - meta_data = ath12k_dp_rx_h_freq(ab, rx_desc); 2432 2432 + meta_data = rx_info->phy_meta_data; 2460 2433 channel_num = meta_data; 2461 2434 center_freq = meta_data >> 16; 2462 2435 2463 2463 - if (center_freq >= ATH12K_MIN_6G_FREQ && 2464 2464 - center_freq <= ATH12K_MAX_6G_FREQ) { 2436 2436 + if (center_freq >= ATH12K_MIN_6GHZ_FREQ && 2437 2437 + center_freq <= ATH12K_MAX_6GHZ_FREQ) { 2465 2438 rx_status->band = NL80211_BAND_6GHZ; 2466 2439 rx_status->freq = center_freq; 2467 2440 } else if (channel_num >= 1 && channel_num <= 14) { ··· 2477 2450 ieee80211_frequency_to_channel(channel->center_freq); 2478 2451 } 2479 2452 spin_unlock_bh(&ar->data_lock); 2480 2480 - ath12k_dbg_dump(ar->ab, ATH12K_DBG_DATA, NULL, "rx_desc: ", 2481 2481 - rx_desc, sizeof(*rx_desc)); 2482 2453 } 2483 2454 2484 2455 if (rx_status->band != NL80211_BAND_6GHZ) 2485 2456 rx_status->freq = ieee80211_channel_to_frequency(channel_num, 2486 2457 rx_status->band); 2487 2458 2488 2488 - ath12k_dp_rx_h_rate(ar, rx_desc, rx_status); 2459 2459 + ath12k_dp_rx_h_rate(ar, rx_info); 2489 2460 } 2490 2461 2491 2462 static void ath12k_dp_rx_deliver_msdu(struct ath12k *ar, struct napi_struct *napi, 2492 2463 struct sk_buff *msdu, 2493 2493 - struct ieee80211_rx_status *status) 2464 2464 + struct ath12k_dp_rx_info *rx_info) 2494 2465 { 2495 2466 struct ath12k_base *ab = ar->ab; 2496 2467 static const struct ieee80211_radiotap_he known = { ··· 2501 2476 struct ieee80211_sta *pubsta; 2502 2477 struct ath12k_peer *peer; 2503 2478 struct ath12k_skb_rxcb *rxcb = ATH12K_SKB_RXCB(msdu); 2479 2479 + struct ieee80211_rx_status *status = rx_info->rx_status; 2504 2480 u8 decap = DP_RX_DECAP_TYPE_RAW; 2505 2481 bool is_mcbc = rxcb->is_mcbc; 2506 2482 bool is_eapol = rxcb->is_eapol; ··· 2514 2488 } 2515 2489 2516 2490 if (!(status->flag & RX_FLAG_ONLY_MONITOR)) 2517 2517 - decap = ath12k_dp_rx_h_decap_type(ab, rxcb->rx_desc); 2491 2491 + decap = rx_info->decap_type; 2518 2492 2519 2493 spin_lock_bh(&ab->base_lock); 2520 2520 - peer = ath12k_dp_rx_h_find_peer(ab, msdu); 2494 2494 + peer = ath12k_dp_rx_h_find_peer(ab, msdu, rx_info); 2521 2495 2522 2496 pubsta = peer ? peer->sta : NULL; 2523 2497 ··· 2600 2574 static int ath12k_dp_rx_process_msdu(struct ath12k *ar, 2601 2575 struct sk_buff *msdu, 2602 2576 struct sk_buff_head *msdu_list, 2603 2603 - struct ieee80211_rx_status *rx_status) 2577 2577 + struct ath12k_dp_rx_info *rx_info) 2604 2578 { 2605 2579 struct ath12k_base *ab = ar->ab; 2606 2580 struct hal_rx_desc *rx_desc, *lrx_desc; ··· 2660 2634 goto free_out; 2661 2635 } 2662 2636 2663 2663 - ath12k_dp_rx_h_ppdu(ar, rx_desc, rx_status); 2664 2664 - ath12k_dp_rx_h_mpdu(ar, msdu, rx_desc, rx_status); 2637 2637 + ath12k_dp_rx_h_fetch_info(ab, rx_desc, rx_info); 2638 2638 + ath12k_dp_rx_h_ppdu(ar, rx_info); 2639 2639 + ath12k_dp_rx_h_mpdu(ar, msdu, rx_desc, rx_info); 2665 2640 2666 2666 - rx_status->flag |= RX_FLAG_SKIP_MONITOR | RX_FLAG_DUP_VALIDATED; 2641 2641 + rx_info->rx_status->flag |= RX_FLAG_SKIP_MONITOR | RX_FLAG_DUP_VALIDATED; 2667 2642 2668 2643 return 0; 2669 2644 ··· 2684 2657 struct ath12k *ar; 2685 2658 struct ath12k_hw_link *hw_links = ag->hw_links; 2686 2659 struct ath12k_base *partner_ab; 2660 2660 + struct ath12k_dp_rx_info rx_info; 2687 2661 u8 hw_link_id, pdev_id; 2688 2662 int ret; 2689 2663 2690 2664 if (skb_queue_empty(msdu_list)) 2691 2665 return; 2666 2666 + 2667 2667 + rx_info.addr2_present = false; 2668 2668 + rx_info.rx_status = &rx_status; 2692 2669 2693 2670 rcu_read_lock(); 2694 2671 ··· 2714 2683 continue; 2715 2684 } 2716 2685 2717 2717 - ret = ath12k_dp_rx_process_msdu(ar, msdu, msdu_list, &rx_status); 2686 2686 + ret = ath12k_dp_rx_process_msdu(ar, msdu, msdu_list, &rx_info); 2718 2687 if (ret) { 2719 2688 ath12k_dbg(ab, ATH12K_DBG_DATA, 2720 2689 "Unable to process msdu %d", ret); ··· 2722 2691 continue; 2723 2692 } 2724 2693 2725 2725 - ath12k_dp_rx_deliver_msdu(ar, napi, msdu, &rx_status); 2694 2694 + ath12k_dp_rx_deliver_msdu(ar, napi, msdu, &rx_info); 2726 2695 } 2727 2696 2728 2697 rcu_read_unlock(); ··· 3015 2984 struct ieee80211_rx_status *rxs = IEEE80211_SKB_RXCB(msdu); 3016 2985 struct ieee80211_key_conf *key_conf; 3017 2986 struct ieee80211_hdr *hdr; 2987 2987 + struct ath12k_dp_rx_info rx_info; 3018 2988 u8 mic[IEEE80211_CCMP_MIC_LEN]; 3019 2989 int head_len, tail_len, ret; 3020 2990 size_t data_len; ··· 3025 2993 3026 2994 if (ath12k_dp_rx_h_enctype(ab, rx_desc) != HAL_ENCRYPT_TYPE_TKIP_MIC) 3027 2995 return 0; 2996 2996 + 2997 2997 + rx_info.addr2_present = false; 2998 2998 + rx_info.rx_status = rxs; 3028 2999 3029 3000 hdr = (struct ieee80211_hdr *)(msdu->data + hal_rx_desc_sz); 3030 3001 hdr_len = ieee80211_hdrlen(hdr->frame_control); ··· 3055 3020 (ATH12K_SKB_RXCB(msdu))->is_first_msdu = true; 3056 3021 (ATH12K_SKB_RXCB(msdu))->is_last_msdu = true; 3057 3022 3023 3023 + ath12k_dp_rx_h_fetch_info(ab, rx_desc, &rx_info); 3024 3024 + 3058 3025 rxs->flag |= RX_FLAG_MMIC_ERROR | RX_FLAG_MMIC_STRIPPED | 3059 3026 RX_FLAG_IV_STRIPPED | RX_FLAG_DECRYPTED; 3060 3027 skb_pull(msdu, hal_rx_desc_sz); ··· 3064 3027 if (unlikely(!ath12k_dp_rx_check_nwifi_hdr_len_valid(ab, rx_desc, msdu))) 3065 3028 return -EINVAL; 3066 3029 3067 3067 - ath12k_dp_rx_h_ppdu(ar, rx_desc, rxs); 3030 3030 + ath12k_dp_rx_h_ppdu(ar, &rx_info); 3068 3031 ath12k_dp_rx_h_undecap(ar, msdu, rx_desc, 3069 3032 HAL_ENCRYPT_TYPE_TKIP_MIC, rxs, true); 3070 3033 ieee80211_rx(ath12k_ar_to_hw(ar), msdu); ··· 3279 3242 reo_ent_ring->rx_mpdu_info.peer_meta_data = 3280 3243 reo_dest_ring->rx_mpdu_info.peer_meta_data; 3281 3244 3282 3282 - reo_ent_ring->queue_addr_lo = cpu_to_le32(lower_32_bits(rx_tid->paddr)); 3283 3283 - queue_addr_hi = upper_32_bits(rx_tid->paddr); 3245 3245 + if (ab->hw_params->reoq_lut_support) { 3246 3246 + reo_ent_ring->queue_addr_lo = reo_dest_ring->rx_mpdu_info.peer_meta_data; 3247 3247 + queue_addr_hi = 0; 3248 3248 + } else { 3249 3249 + reo_ent_ring->queue_addr_lo = 3250 3250 + cpu_to_le32(lower_32_bits(rx_tid->qbuf.paddr_aligned)); 3251 3251 + queue_addr_hi = upper_32_bits(rx_tid->qbuf.paddr_aligned); 3252 3252 + } 3253 3253 + 3284 3254 reo_ent_ring->info0 = le32_encode_bits(queue_addr_hi, 3285 3255 HAL_REO_ENTR_RING_INFO0_QUEUE_ADDR_HI) | 3286 3256 le32_encode_bits(dst_ind, ··· 3760 3716 } 3761 3717 3762 3718 static int ath12k_dp_rx_h_null_q_desc(struct ath12k *ar, struct sk_buff *msdu, 3763 3763 - struct ieee80211_rx_status *status, 3719 3719 + struct ath12k_dp_rx_info *rx_info, 3764 3720 struct sk_buff_head *msdu_list) 3765 3721 { 3766 3722 struct ath12k_base *ab = ar->ab; ··· 3816 3772 if (unlikely(!ath12k_dp_rx_check_nwifi_hdr_len_valid(ab, desc, msdu))) 3817 3773 return -EINVAL; 3818 3774 3819 3819 - ath12k_dp_rx_h_ppdu(ar, desc, status); 3775 3775 + ath12k_dp_rx_h_fetch_info(ab, desc, rx_info); 3776 3776 + ath12k_dp_rx_h_ppdu(ar, rx_info); 3777 3777 + ath12k_dp_rx_h_mpdu(ar, msdu, desc, rx_info); 3820 3778 3821 3821 - ath12k_dp_rx_h_mpdu(ar, msdu, desc, status); 3822 3822 - 3823 3823 - rxcb->tid = ath12k_dp_rx_h_tid(ab, desc); 3779 3779 + rxcb->tid = rx_info->tid; 3824 3780 3825 3781 /* Please note that caller will having the access to msdu and completing 3826 3782 * rx with mac80211. Need not worry about cleaning up amsdu_list. ··· 3830 3786 } 3831 3787 3832 3788 static bool ath12k_dp_rx_h_reo_err(struct ath12k *ar, struct sk_buff *msdu, 3833 3833 - struct ieee80211_rx_status *status, 3789 3789 + struct ath12k_dp_rx_info *rx_info, 3834 3790 struct sk_buff_head *msdu_list) 3835 3791 { 3836 3792 struct ath12k_skb_rxcb *rxcb = ATH12K_SKB_RXCB(msdu); ··· 3840 3796 3841 3797 switch (rxcb->err_code) { 3842 3798 case HAL_REO_DEST_RING_ERROR_CODE_DESC_ADDR_ZERO: 3843 3843 - if (ath12k_dp_rx_h_null_q_desc(ar, msdu, status, msdu_list)) 3799 3799 + if (ath12k_dp_rx_h_null_q_desc(ar, msdu, rx_info, msdu_list)) 3844 3800 drop = true; 3845 3801 break; 3846 3802 case HAL_REO_DEST_RING_ERROR_CODE_PN_CHECK_FAILED: ··· 3861 3817 } 3862 3818 3863 3819 static bool ath12k_dp_rx_h_tkip_mic_err(struct ath12k *ar, struct sk_buff *msdu, 3864 3864 - struct ieee80211_rx_status *status) 3820 3820 + struct ath12k_dp_rx_info *rx_info) 3865 3821 { 3866 3822 struct ath12k_base *ab = ar->ab; 3867 3823 u16 msdu_len; ··· 3875 3831 3876 3832 l3pad_bytes = ath12k_dp_rx_h_l3pad(ab, desc); 3877 3833 msdu_len = ath12k_dp_rx_h_msdu_len(ab, desc); 3834 3834 + 3835 3835 + if ((hal_rx_desc_sz + l3pad_bytes + msdu_len) > DP_RX_BUFFER_SIZE) { 3836 3836 + ath12k_dbg(ab, ATH12K_DBG_DATA, 3837 3837 + "invalid msdu len in tkip mic err %u\n", msdu_len); 3838 3838 + ath12k_dbg_dump(ab, ATH12K_DBG_DATA, NULL, "", desc, 3839 3839 + sizeof(*desc)); 3840 3840 + return true; 3841 3841 + } 3842 3842 + 3878 3843 skb_put(msdu, hal_rx_desc_sz + l3pad_bytes + msdu_len); 3879 3844 skb_pull(msdu, hal_rx_desc_sz + l3pad_bytes); 3880 3845 3881 3846 if (unlikely(!ath12k_dp_rx_check_nwifi_hdr_len_valid(ab, desc, msdu))) 3882 3847 return true; 3883 3848 3884 3884 - ath12k_dp_rx_h_ppdu(ar, desc, status); 3849 3849 + ath12k_dp_rx_h_ppdu(ar, rx_info); 3885 3850 3886 3886 - status->flag |= (RX_FLAG_MMIC_STRIPPED | RX_FLAG_MMIC_ERROR | 3887 3887 - RX_FLAG_DECRYPTED); 3851 3851 + rx_info->rx_status->flag |= (RX_FLAG_MMIC_STRIPPED | RX_FLAG_MMIC_ERROR | 3852 3852 + RX_FLAG_DECRYPTED); 3888 3853 3889 3854 ath12k_dp_rx_h_undecap(ar, msdu, desc, 3890 3890 - HAL_ENCRYPT_TYPE_TKIP_MIC, status, false); 3855 3855 + HAL_ENCRYPT_TYPE_TKIP_MIC, rx_info->rx_status, false); 3891 3856 return false; 3892 3857 } 3893 3858 3894 3859 static bool ath12k_dp_rx_h_rxdma_err(struct ath12k *ar, struct sk_buff *msdu, 3895 3895 - struct ieee80211_rx_status *status) 3860 3860 + struct ath12k_dp_rx_info *rx_info) 3896 3861 { 3897 3862 struct ath12k_base *ab = ar->ab; 3898 3863 struct ath12k_skb_rxcb *rxcb = ATH12K_SKB_RXCB(msdu); ··· 3916 3863 case HAL_REO_ENTR_RING_RXDMA_ECODE_TKIP_MIC_ERR: 3917 3864 err_bitmap = ath12k_dp_rx_h_mpdu_err(ab, rx_desc); 3918 3865 if (err_bitmap & HAL_RX_MPDU_ERR_TKIP_MIC) { 3919 3919 - drop = ath12k_dp_rx_h_tkip_mic_err(ar, msdu, status); 3866 3866 + ath12k_dp_rx_h_fetch_info(ab, rx_desc, rx_info); 3867 3867 + drop = ath12k_dp_rx_h_tkip_mic_err(ar, msdu, rx_info); 3920 3868 break; 3921 3869 } 3922 3870 fallthrough; ··· 3939 3885 { 3940 3886 struct ath12k_skb_rxcb *rxcb = ATH12K_SKB_RXCB(msdu); 3941 3887 struct ieee80211_rx_status rxs = {0}; 3888 3888 + struct ath12k_dp_rx_info rx_info; 3942 3889 bool drop = true; 3890 3890 + 3891 3891 + rx_info.addr2_present = false; 3892 3892 + rx_info.rx_status = &rxs; 3943 3893 3944 3894 switch (rxcb->err_rel_src) { 3945 3895 case HAL_WBM_REL_SRC_MODULE_REO: 3946 3946 - drop = ath12k_dp_rx_h_reo_err(ar, msdu, &rxs, msdu_list); 3896 3896 + drop = ath12k_dp_rx_h_reo_err(ar, msdu, &rx_info, msdu_list); 3947 3897 break; 3948 3898 case HAL_WBM_REL_SRC_MODULE_RXDMA: 3949 3949 - drop = ath12k_dp_rx_h_rxdma_err(ar, msdu, &rxs); 3899 3899 + drop = ath12k_dp_rx_h_rxdma_err(ar, msdu, &rx_info); 3950 3900 break; 3951 3901 default: 3952 3902 /* msdu will get freed */ ··· 3962 3904 return; 3963 3905 } 3964 3906 3965 3965 - ath12k_dp_rx_deliver_msdu(ar, napi, msdu, &rxs); 3907 3907 + ath12k_dp_rx_deliver_msdu(ar, napi, msdu, &rx_info); 3966 3908 } 3967 3909 3968 3910 int ath12k_dp_rx_process_wbm_err(struct ath12k_base *ab, ··· 4538 4480 4539 4481 pmon->mon_last_linkdesc_paddr = 0; 4540 4482 pmon->mon_last_buf_cookie = DP_RX_DESC_COOKIE_MAX + 1; 4483 4483 + INIT_LIST_HEAD(&pmon->dp_rx_mon_mpdu_list); 4484 4484 + pmon->mon_mpdu = NULL; 4541 4485 spin_lock_init(&pmon->mon_lock); 4542 4486 4543 4487 return 0;

+27 -6

drivers/net/wireless/ath/ath12k/dp_rx.h

reviewed

··· 14 14 15 15 struct ath12k_dp_rx_tid { 16 16 u8 tid; 17 17 - u32 *vaddr; 18 18 - dma_addr_t paddr; 19 19 - u32 size; 20 17 u32 ba_win_sz; 21 18 bool active; 19 19 + struct ath12k_reoq_buf qbuf; 22 20 23 21 /* Info related to rx fragments */ 24 22 u32 cur_sn; ··· 62 64 u8 snap_oui[3]; 63 65 __be16 snap_type; 64 66 } __packed; 67 67 + 68 68 + struct ath12k_dp_rx_info { 69 69 + struct ieee80211_rx_status *rx_status; 70 70 + u32 phy_meta_data; 71 71 + u16 peer_id; 72 72 + u8 decap_type; 73 73 + u8 pkt_type; 74 74 + u8 sgi; 75 75 + u8 rate_mcs; 76 76 + u8 bw; 77 77 + u8 nss; 78 78 + u8 addr2[ETH_ALEN]; 79 79 + u8 tid; 80 80 + bool ip_csum_fail; 81 81 + bool l4_csum_fail; 82 82 + bool is_mcbc; 83 83 + bool addr2_present; 84 84 + }; 65 85 66 86 static inline u32 ath12k_he_gi_to_nl80211_he_gi(u8 sgi) 67 87 { ··· 147 131 u8 ath12k_dp_rx_h_l3pad(struct ath12k_base *ab, 148 132 struct hal_rx_desc *desc); 149 133 struct ath12k_peer * 150 150 - ath12k_dp_rx_h_find_peer(struct ath12k_base *ab, struct sk_buff *msdu); 134 134 + ath12k_dp_rx_h_find_peer(struct ath12k_base *ab, struct sk_buff *msdu, 135 135 + struct ath12k_dp_rx_info *rx_info); 151 136 u8 ath12k_dp_rx_h_decap_type(struct ath12k_base *ab, 152 137 struct hal_rx_desc *desc); 153 138 u32 ath12k_dp_rx_h_mpdu_err(struct ath12k_base *ab, 154 139 struct hal_rx_desc *desc); 155 155 - void ath12k_dp_rx_h_ppdu(struct ath12k *ar, struct hal_rx_desc *rx_desc, 156 156 - struct ieee80211_rx_status *rx_status); 140 140 + void ath12k_dp_rx_h_ppdu(struct ath12k *ar, struct ath12k_dp_rx_info *rx_info); 157 141 int ath12k_dp_rxdma_ring_sel_config_qcn9274(struct ath12k_base *ab); 158 142 int ath12k_dp_rxdma_ring_sel_config_wcn7850(struct ath12k_base *ab); 159 143 ··· 161 145 int (*iter)(struct ath12k_base *ar, u16 tag, u16 len, 162 146 const void *ptr, void *data), 163 147 void *data); 148 148 + void ath12k_dp_rx_h_fetch_info(struct ath12k_base *ab, struct hal_rx_desc *rx_desc, 149 149 + struct ath12k_dp_rx_info *rx_info); 150 150 + 151 151 + int ath12k_dp_rx_crypto_mic_len(struct ath12k *ar, enum hal_encrypt_type enctype); 152 152 + 164 153 #endif /* ATH12K_DP_RX_H */

+105 -42

drivers/net/wireless/ath/ath12k/dp_tx.c

reviewed

··· 7 7 #include "core.h" 8 8 #include "dp_tx.h" 9 9 #include "debug.h" 10 10 + #include "debugfs.h" 10 11 #include "hw.h" 11 12 #include "peer.h" 12 13 #include "mac.h" ··· 84 83 u8 pool_id) 85 84 { 86 85 spin_lock_bh(&dp->tx_desc_lock[pool_id]); 86 86 + tx_desc->skb_ext_desc = NULL; 87 87 list_move_tail(&tx_desc->list, &dp->tx_desc_free_list[pool_id]); 88 88 spin_unlock_bh(&dp->tx_desc_lock[pool_id]); 89 89 } ··· 221 219 } 222 220 223 221 int ath12k_dp_tx(struct ath12k *ar, struct ath12k_link_vif *arvif, 224 224 - struct sk_buff *skb, bool gsn_valid, int mcbc_gsn) 222 222 + struct sk_buff *skb, bool gsn_valid, int mcbc_gsn, 223 223 + bool is_mcast) 225 224 { 226 225 struct ath12k_base *ab = ar->ab; 227 226 struct ath12k_dp *dp = &ab->dp; ··· 232 229 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb); 233 230 struct hal_tcl_data_cmd *hal_tcl_desc; 234 231 struct hal_tx_msdu_ext_desc *msg; 235 235 - struct sk_buff *skb_ext_desc; 232 232 + struct sk_buff *skb_ext_desc = NULL; 236 233 struct hal_srng *tcl_ring; 237 234 struct ieee80211_hdr *hdr = (void *)skb->data; 238 235 struct ath12k_vif *ahvif = arvif->ahvif; ··· 418 415 if (ret < 0) { 419 416 ath12k_dbg(ab, ATH12K_DBG_DP_TX, 420 417 "Failed to add HTT meta data, dropping packet\n"); 421 421 - kfree_skb(skb_ext_desc); 422 422 - goto fail_unmap_dma; 418 418 + goto fail_free_ext_skb; 423 419 } 424 420 } 425 421 426 422 ti.paddr = dma_map_single(ab->dev, skb_ext_desc->data, 427 423 skb_ext_desc->len, DMA_TO_DEVICE); 428 424 ret = dma_mapping_error(ab->dev, ti.paddr); 429 429 - if (ret) { 430 430 - kfree_skb(skb_ext_desc); 431 431 - goto fail_unmap_dma; 432 432 - } 425 425 + if (ret) 426 426 + goto fail_free_ext_skb; 433 427 434 428 ti.data_len = skb_ext_desc->len; 435 429 ti.type = HAL_TCL_DESC_TYPE_EXT_DESC; 436 430 437 431 skb_cb->paddr_ext_desc = ti.paddr; 432 432 + tx_desc->skb_ext_desc = skb_ext_desc; 438 433 } 439 434 440 435 hal_ring_id = tx_ring->tcl_data_ring.ring_id; ··· 463 462 ring_selector++; 464 463 } 465 464 466 466 - goto fail_unmap_dma; 465 465 + goto fail_unmap_dma_ext; 467 466 } 467 467 + 468 468 + spin_lock_bh(&arvif->link_stats_lock); 469 469 + arvif->link_stats.tx_encap_type[ti.encap_type]++; 470 470 + arvif->link_stats.tx_encrypt_type[ti.encrypt_type]++; 471 471 + arvif->link_stats.tx_desc_type[ti.type]++; 472 472 + 473 473 + if (is_mcast) 474 474 + arvif->link_stats.tx_bcast_mcast++; 475 475 + else 476 476 + arvif->link_stats.tx_enqueued++; 477 477 + spin_unlock_bh(&arvif->link_stats_lock); 468 478 469 479 ath12k_hal_tx_cmd_desc_setup(ab, hal_tcl_desc, &ti); 470 480 ··· 490 478 491 479 return 0; 492 480 481 481 + fail_unmap_dma_ext: 482 482 + if (skb_cb->paddr_ext_desc) 483 483 + dma_unmap_single(ab->dev, skb_cb->paddr_ext_desc, 484 484 + skb_ext_desc->len, 485 485 + DMA_TO_DEVICE); 486 486 + fail_free_ext_skb: 487 487 + kfree_skb(skb_ext_desc); 488 488 + 493 489 fail_unmap_dma: 494 490 dma_unmap_single(ab->dev, ti.paddr, ti.data_len, DMA_TO_DEVICE); 495 491 496 496 - if (skb_cb->paddr_ext_desc) 497 497 - dma_unmap_single(ab->dev, skb_cb->paddr_ext_desc, 498 498 - sizeof(struct hal_tx_msdu_ext_desc), 499 499 - DMA_TO_DEVICE); 500 500 - 501 492 fail_remove_tx_buf: 502 493 ath12k_dp_tx_release_txbuf(dp, tx_desc, pool_id); 494 494 + 495 495 + spin_lock_bh(&arvif->link_stats_lock); 496 496 + arvif->link_stats.tx_dropped++; 497 497 + spin_unlock_bh(&arvif->link_stats_lock); 498 498 + 503 499 if (tcl_ring_retry) 504 500 goto tcl_ring_sel; 505 501 ··· 515 495 } 516 496 517 497 static void ath12k_dp_tx_free_txbuf(struct ath12k_base *ab, 518 518 - struct sk_buff *msdu, u8 mac_id, 519 519 - struct dp_tx_ring *tx_ring) 498 498 + struct dp_tx_ring *tx_ring, 499 499 + struct ath12k_tx_desc_params *desc_params) 520 500 { 521 501 struct ath12k *ar; 502 502 + struct sk_buff *msdu = desc_params->skb; 522 503 struct ath12k_skb_cb *skb_cb; 523 523 - u8 pdev_id = ath12k_hw_mac_id_to_pdev_id(ab->hw_params, mac_id); 504 504 + u8 pdev_id = ath12k_hw_mac_id_to_pdev_id(ab->hw_params, desc_params->mac_id); 524 505 525 506 skb_cb = ATH12K_SKB_CB(msdu); 526 507 ar = ab->pdevs[pdev_id].ar; 527 508 528 509 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 529 529 - if (skb_cb->paddr_ext_desc) 510 510 + if (skb_cb->paddr_ext_desc) { 530 511 dma_unmap_single(ab->dev, skb_cb->paddr_ext_desc, 531 531 - sizeof(struct hal_tx_msdu_ext_desc), DMA_TO_DEVICE); 512 512 + desc_params->skb_ext_desc->len, DMA_TO_DEVICE); 513 513 + dev_kfree_skb_any(desc_params->skb_ext_desc); 514 514 + } 532 515 533 516 ieee80211_free_txskb(ar->ah->hw, msdu); 534 517 ··· 541 518 542 519 static void 543 520 ath12k_dp_tx_htt_tx_complete_buf(struct ath12k_base *ab, 544 544 - struct sk_buff *msdu, 521 521 + struct ath12k_tx_desc_params *desc_params, 545 522 struct dp_tx_ring *tx_ring, 546 523 struct ath12k_dp_htt_wbm_tx_status *ts) 547 524 { 548 525 struct ieee80211_tx_info *info; 526 526 + struct ath12k_link_vif *arvif; 549 527 struct ath12k_skb_cb *skb_cb; 528 528 + struct ieee80211_vif *vif; 529 529 + struct ath12k_vif *ahvif; 550 530 struct ath12k *ar; 531 531 + struct sk_buff *msdu = desc_params->skb; 551 532 552 533 skb_cb = ATH12K_SKB_CB(msdu); 553 534 info = IEEE80211_SKB_CB(msdu); ··· 562 535 wake_up(&ar->dp.tx_empty_waitq); 563 536 564 537 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 565 565 - if (skb_cb->paddr_ext_desc) 538 538 + if (skb_cb->paddr_ext_desc) { 566 539 dma_unmap_single(ab->dev, skb_cb->paddr_ext_desc, 567 567 - sizeof(struct hal_tx_msdu_ext_desc), DMA_TO_DEVICE); 540 540 + desc_params->skb_ext_desc->len, DMA_TO_DEVICE); 541 541 + dev_kfree_skb_any(desc_params->skb_ext_desc); 542 542 + } 543 543 + 544 544 + vif = skb_cb->vif; 545 545 + if (vif) { 546 546 + ahvif = ath12k_vif_to_ahvif(vif); 547 547 + rcu_read_lock(); 548 548 + arvif = rcu_dereference(ahvif->link[skb_cb->link_id]); 549 549 + if (arvif) { 550 550 + spin_lock_bh(&arvif->link_stats_lock); 551 551 + arvif->link_stats.tx_completed++; 552 552 + spin_unlock_bh(&arvif->link_stats_lock); 553 553 + } 554 554 + rcu_read_unlock(); 555 555 + } 568 556 569 557 memset(&info->status, 0, sizeof(info->status)); 570 558 ··· 602 560 } 603 561 604 562 static void 605 605 - ath12k_dp_tx_process_htt_tx_complete(struct ath12k_base *ab, 606 606 - void *desc, u8 mac_id, 607 607 - struct sk_buff *msdu, 608 608 - struct dp_tx_ring *tx_ring) 563 563 + ath12k_dp_tx_process_htt_tx_complete(struct ath12k_base *ab, void *desc, 564 564 + struct dp_tx_ring *tx_ring, 565 565 + struct ath12k_tx_desc_params *desc_params) 609 566 { 610 567 struct htt_tx_wbm_completion *status_desc; 611 568 struct ath12k_dp_htt_wbm_tx_status ts = {0}; ··· 620 579 ts.acked = (wbm_status == HAL_WBM_REL_HTT_TX_COMP_STATUS_OK); 621 580 ts.ack_rssi = le32_get_bits(status_desc->info2, 622 581 HTT_TX_WBM_COMP_INFO2_ACK_RSSI); 623 623 - ath12k_dp_tx_htt_tx_complete_buf(ab, msdu, tx_ring, &ts); 582 582 + ath12k_dp_tx_htt_tx_complete_buf(ab, desc_params, tx_ring, &ts); 624 583 break; 625 584 case HAL_WBM_REL_HTT_TX_COMP_STATUS_DROP: 626 585 case HAL_WBM_REL_HTT_TX_COMP_STATUS_TTL: 627 586 case HAL_WBM_REL_HTT_TX_COMP_STATUS_REINJ: 628 587 case HAL_WBM_REL_HTT_TX_COMP_STATUS_INSPECT: 629 629 - ath12k_dp_tx_free_txbuf(ab, msdu, mac_id, tx_ring); 588 588 + case HAL_WBM_REL_HTT_TX_COMP_STATUS_VDEVID_MISMATCH: 589 589 + ath12k_dp_tx_free_txbuf(ab, tx_ring, desc_params); 630 590 break; 631 591 case HAL_WBM_REL_HTT_TX_COMP_STATUS_MEC_NOTIFY: 632 592 /* This event is to be handled only when the driver decides to ··· 635 593 */ 636 594 break; 637 595 default: 638 638 - ath12k_warn(ab, "Unknown htt tx status %d\n", wbm_status); 596 596 + ath12k_warn(ab, "Unknown htt wbm tx status %d\n", wbm_status); 639 597 break; 640 598 } 641 599 } ··· 759 717 } 760 718 761 719 static void ath12k_dp_tx_complete_msdu(struct ath12k *ar, 762 762 - struct sk_buff *msdu, 720 720 + struct ath12k_tx_desc_params *desc_params, 763 721 struct hal_tx_status *ts) 764 722 { 765 723 struct ath12k_base *ab = ar->ab; 766 724 struct ath12k_hw *ah = ar->ah; 767 725 struct ieee80211_tx_info *info; 726 726 + struct ath12k_link_vif *arvif; 768 727 struct ath12k_skb_cb *skb_cb; 728 728 + struct ieee80211_vif *vif; 729 729 + struct ath12k_vif *ahvif; 730 730 + struct sk_buff *msdu = desc_params->skb; 769 731 770 732 if (WARN_ON_ONCE(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM)) { 771 733 /* Must not happen */ ··· 779 733 skb_cb = ATH12K_SKB_CB(msdu); 780 734 781 735 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 782 782 - if (skb_cb->paddr_ext_desc) 736 736 + if (skb_cb->paddr_ext_desc) { 783 737 dma_unmap_single(ab->dev, skb_cb->paddr_ext_desc, 784 784 - sizeof(struct hal_tx_msdu_ext_desc), DMA_TO_DEVICE); 738 738 + desc_params->skb_ext_desc->len, DMA_TO_DEVICE); 739 739 + dev_kfree_skb_any(desc_params->skb_ext_desc); 740 740 + } 785 741 786 742 rcu_read_lock(); 787 743 ··· 795 747 if (!skb_cb->vif) { 796 748 ieee80211_free_txskb(ah->hw, msdu); 797 749 goto exit; 750 750 + } 751 751 + 752 752 + vif = skb_cb->vif; 753 753 + if (vif) { 754 754 + ahvif = ath12k_vif_to_ahvif(vif); 755 755 + arvif = rcu_dereference(ahvif->link[skb_cb->link_id]); 756 756 + if (arvif) { 757 757 + spin_lock_bh(&arvif->link_stats_lock); 758 758 + arvif->link_stats.tx_completed++; 759 759 + spin_unlock_bh(&arvif->link_stats_lock); 760 760 + } 798 761 } 799 762 800 763 info = IEEE80211_SKB_CB(msdu); ··· 901 842 int hal_ring_id = dp->tx_ring[ring_id].tcl_comp_ring.ring_id; 902 843 struct hal_srng *status_ring = &ab->hal.srng_list[hal_ring_id]; 903 844 struct ath12k_tx_desc_info *tx_desc = NULL; 904 904 - struct sk_buff *msdu; 905 845 struct hal_tx_status ts = { 0 }; 846 846 + struct ath12k_tx_desc_params desc_params; 906 847 struct dp_tx_ring *tx_ring = &dp->tx_ring[ring_id]; 907 848 struct hal_wbm_release_ring *desc; 908 908 - u8 mac_id, pdev_id; 849 849 + u8 pdev_id; 909 850 u64 desc_va; 910 851 911 852 spin_lock_bh(&status_ring->lock); ··· 959 900 continue; 960 901 } 961 902 962 962 - msdu = tx_desc->skb; 963 963 - mac_id = tx_desc->mac_id; 903 903 + desc_params.mac_id = tx_desc->mac_id; 904 904 + desc_params.skb = tx_desc->skb; 905 905 + desc_params.skb_ext_desc = tx_desc->skb_ext_desc; 964 906 965 907 /* Release descriptor as soon as extracting necessary info 966 908 * to reduce contention 967 909 */ 968 910 ath12k_dp_tx_release_txbuf(dp, tx_desc, tx_desc->pool_id); 969 911 if (ts.buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW) { 970 970 - ath12k_dp_tx_process_htt_tx_complete(ab, 971 971 - (void *)tx_status, 972 972 - mac_id, msdu, 973 973 - tx_ring); 912 912 + ath12k_dp_tx_process_htt_tx_complete(ab, (void *)tx_status, 913 913 + tx_ring, &desc_params); 974 914 continue; 975 915 } 976 916 977 977 - pdev_id = ath12k_hw_mac_id_to_pdev_id(ab->hw_params, mac_id); 917 917 + pdev_id = ath12k_hw_mac_id_to_pdev_id(ab->hw_params, desc_params.mac_id); 978 918 ar = ab->pdevs[pdev_id].ar; 979 919 980 920 if (atomic_dec_and_test(&ar->dp.num_tx_pending)) 981 921 wake_up(&ar->dp.tx_empty_waitq); 982 922 983 983 - ath12k_dp_tx_complete_msdu(ar, msdu, &ts); 923 923 + ath12k_dp_tx_complete_msdu(ar, &desc_params, &ts); 984 924 } 985 925 } 986 926 ··· 1489 1431 HTT_RX_MON_MO_CTRL_FILTER_FLASG3 | 1490 1432 HTT_RX_MON_FP_DATA_FILTER_FLASG3 | 1491 1433 HTT_RX_MON_MO_DATA_FILTER_FLASG3; 1434 1434 + } else { 1435 1435 + tlv_filter = ath12k_mac_mon_status_filter_default; 1436 1436 + 1437 1437 + if (ath12k_debugfs_is_extd_rx_stats_enabled(ar)) 1438 1438 + tlv_filter.rx_filter = ath12k_debugfs_rx_filter(ar); 1492 1439 } 1493 1440 1494 1441 if (ab->hw_params->rxdma1_enable) {

+2 -1

drivers/net/wireless/ath/ath12k/dp_tx.h

reviewed

··· 17 17 18 18 int ath12k_dp_tx_htt_h2t_ver_req_msg(struct ath12k_base *ab); 19 19 int ath12k_dp_tx(struct ath12k *ar, struct ath12k_link_vif *arvif, 20 20 - struct sk_buff *skb, bool gsn_valid, int mcbc_gsn); 20 20 + struct sk_buff *skb, bool gsn_valid, int mcbc_gsn, 21 21 + bool is_mcast); 21 22 void ath12k_dp_tx_completion_handler(struct ath12k_base *ab, int ring_id); 22 23 23 24 int ath12k_dp_tx_htt_h2t_ppdu_stats_req(struct ath12k *ar, u32 mask);

+8 -1

drivers/net/wireless/ath/ath12k/fw.c

reviewed

··· 1 1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 2 /* 3 3 - * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. 3 3 + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 */ 5 5 6 6 #include "core.h" ··· 99 99 __set_bit(i, ab->fw.fw_features); 100 100 } 101 101 102 102 + ab->fw.fw_features_valid = true; 103 103 + 102 104 ath12k_dbg_dump(ab, ATH12K_DBG_BOOT, "features", "", 103 105 ab->fw.fw_features, 104 106 sizeof(ab->fw.fw_features)); ··· 170 168 { 171 169 release_firmware(ab->fw.fw); 172 170 memset(&ab->fw, 0, sizeof(ab->fw)); 171 171 + } 172 172 + 173 173 + bool ath12k_fw_feature_supported(struct ath12k_base *ab, enum ath12k_fw_features feat) 174 174 + { 175 175 + return ab->fw.fw_features_valid && test_bit(feat, ab->fw.fw_features); 173 176 }

+2 -1

drivers/net/wireless/ath/ath12k/fw.h

reviewed

··· 1 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 2 /* 3 3 - * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. 3 3 + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 */ 5 5 6 6 #ifndef ATH12K_FW_H ··· 32 32 33 33 void ath12k_fw_map(struct ath12k_base *ab); 34 34 void ath12k_fw_unmap(struct ath12k_base *ab); 35 35 + bool ath12k_fw_feature_supported(struct ath12k_base *ab, enum ath12k_fw_features feat); 35 36 36 37 #endif /* ATH12K_FW_H */

+46 -65

drivers/net/wireless/ath/ath12k/hal.c

reviewed

··· 1 1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 2 /* 3 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 #include <linux/dma-mapping.h> 7 7 #include "hal_tx.h" ··· 449 449 450 450 static bool ath12k_hw_qcn9274_rx_desc_is_da_mcbc(struct hal_rx_desc *desc) 451 451 { 452 452 - return __le32_to_cpu(desc->u.qcn9274.mpdu_start.info6) & 453 453 - RX_MPDU_START_INFO6_MCAST_BCAST; 452 452 + return __le16_to_cpu(desc->u.qcn9274.msdu_end.info5) & 453 453 + RX_MSDU_END_INFO5_DA_IS_MCBC; 454 454 } 455 455 456 456 static void ath12k_hw_qcn9274_rx_desc_get_dot11_hdr(struct hal_rx_desc *desc, ··· 511 511 crypto_hdr[7] = HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.qcn9274.mpdu_start.pn[1]); 512 512 } 513 513 514 514 - static u16 ath12k_hw_qcn9274_rx_desc_get_mpdu_frame_ctl(struct hal_rx_desc *desc) 515 515 - { 516 516 - return __le16_to_cpu(desc->u.qcn9274.mpdu_start.frame_ctrl); 517 517 - } 518 518 - 519 514 static int ath12k_hal_srng_create_config_qcn9274(struct ath12k_base *ab) 520 515 { 521 516 struct ath12k_hal *hal = &ab->hal; ··· 547 552 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_HP; 548 553 549 554 s = &hal->srng_config[HAL_TCL_DATA]; 550 550 - s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB; 555 555 + s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB(ab); 551 556 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_HP; 552 552 - s->reg_size[0] = HAL_TCL2_RING_BASE_LSB - HAL_TCL1_RING_BASE_LSB; 557 557 + s->reg_size[0] = HAL_TCL2_RING_BASE_LSB(ab) - HAL_TCL1_RING_BASE_LSB(ab); 553 558 s->reg_size[1] = HAL_TCL2_RING_HP - HAL_TCL1_RING_HP; 554 559 555 560 s = &hal->srng_config[HAL_TCL_CMD]; ··· 561 566 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_HP; 562 567 563 568 s = &hal->srng_config[HAL_CE_SRC]; 564 564 - s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_BASE_LSB; 565 565 - s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_HP; 566 566 - s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG - 567 567 - HAL_SEQ_WCSS_UMAC_CE0_SRC_REG; 568 568 - s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG - 569 569 - HAL_SEQ_WCSS_UMAC_CE0_SRC_REG; 569 569 + s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB; 570 570 + s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP; 571 571 + s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) - 572 572 + HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab); 573 573 + s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) - 574 574 + HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab); 570 575 571 576 s = &hal->srng_config[HAL_CE_DST]; 572 572 - s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_BASE_LSB; 573 573 - s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_HP; 574 574 - s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - 575 575 - HAL_SEQ_WCSS_UMAC_CE0_DST_REG; 576 576 - s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - 577 577 - HAL_SEQ_WCSS_UMAC_CE0_DST_REG; 577 577 + s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB; 578 578 + s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP; 579 579 + s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) - 580 580 + HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab); 581 581 + s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) - 582 582 + HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab); 578 583 579 584 s = &hal->srng_config[HAL_CE_DST_STATUS]; 580 580 - s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + 585 585 + s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + 581 586 HAL_CE_DST_STATUS_RING_BASE_LSB; 582 582 - s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_STATUS_RING_HP; 583 583 - s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - 584 584 - HAL_SEQ_WCSS_UMAC_CE0_DST_REG; 585 585 - s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - 586 586 - HAL_SEQ_WCSS_UMAC_CE0_DST_REG; 587 587 + s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP; 588 588 + s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) - 589 589 + HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab); 590 590 + s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) - 591 591 + HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab); 587 592 588 593 s = &hal->srng_config[HAL_WBM_IDLE_LINK]; 589 594 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_BASE_LSB(ab); ··· 731 736 .rx_desc_is_da_mcbc = ath12k_hw_qcn9274_rx_desc_is_da_mcbc, 732 737 .rx_desc_get_dot11_hdr = ath12k_hw_qcn9274_rx_desc_get_dot11_hdr, 733 738 .rx_desc_get_crypto_header = ath12k_hw_qcn9274_rx_desc_get_crypto_hdr, 734 734 - .rx_desc_get_mpdu_frame_ctl = ath12k_hw_qcn9274_rx_desc_get_mpdu_frame_ctl, 735 739 .dp_rx_h_msdu_done = ath12k_hw_qcn9274_dp_rx_h_msdu_done, 736 740 .dp_rx_h_l4_cksum_fail = ath12k_hw_qcn9274_dp_rx_h_l4_cksum_fail, 737 741 .dp_rx_h_ip_cksum_fail = ath12k_hw_qcn9274_dp_rx_h_ip_cksum_fail, ··· 902 908 903 909 static bool ath12k_hw_qcn9274_compact_rx_desc_is_da_mcbc(struct hal_rx_desc *desc) 904 910 { 905 905 - return __le32_to_cpu(desc->u.qcn9274_compact.mpdu_start.info6) & 906 906 - RX_MPDU_START_INFO6_MCAST_BCAST; 911 911 + return __le16_to_cpu(desc->u.qcn9274_compact.msdu_end.info5) & 912 912 + RX_MSDU_END_INFO5_DA_IS_MCBC; 907 913 } 908 914 909 915 static void ath12k_hw_qcn9274_compact_rx_desc_get_dot11_hdr(struct hal_rx_desc *desc, ··· 967 973 HAL_RX_MPDU_INFO_PN_GET_BYTE1(desc->u.qcn9274_compact.mpdu_start.pn[1]); 968 974 crypto_hdr[7] = 969 975 HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.qcn9274_compact.mpdu_start.pn[1]); 970 970 - } 971 971 - 972 972 - static u16 ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_frame_ctl(struct hal_rx_desc *desc) 973 973 - { 974 974 - return __le16_to_cpu(desc->u.qcn9274_compact.mpdu_start.frame_ctrl); 975 976 } 976 977 977 978 static bool ath12k_hw_qcn9274_compact_dp_rx_h_msdu_done(struct hal_rx_desc *desc) ··· 1069 1080 .rx_desc_is_da_mcbc = ath12k_hw_qcn9274_compact_rx_desc_is_da_mcbc, 1070 1081 .rx_desc_get_dot11_hdr = ath12k_hw_qcn9274_compact_rx_desc_get_dot11_hdr, 1071 1082 .rx_desc_get_crypto_header = ath12k_hw_qcn9274_compact_rx_desc_get_crypto_hdr, 1072 1072 - .rx_desc_get_mpdu_frame_ctl = 1073 1073 - ath12k_hw_qcn9274_compact_rx_desc_get_mpdu_frame_ctl, 1074 1083 .dp_rx_h_msdu_done = ath12k_hw_qcn9274_compact_dp_rx_h_msdu_done, 1075 1084 .dp_rx_h_l4_cksum_fail = ath12k_hw_qcn9274_compact_dp_rx_h_l4_cksum_fail, 1076 1085 .dp_rx_h_ip_cksum_fail = ath12k_hw_qcn9274_compact_dp_rx_h_ip_cksum_fail, ··· 1317 1330 crypto_hdr[7] = HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.wcn7850.mpdu_start.pn[1]); 1318 1331 } 1319 1332 1320 1320 - static u16 ath12k_hw_wcn7850_rx_desc_get_mpdu_frame_ctl(struct hal_rx_desc *desc) 1321 1321 - { 1322 1322 - return __le16_to_cpu(desc->u.wcn7850.mpdu_start.frame_ctrl); 1323 1323 - } 1324 1324 - 1325 1333 static int ath12k_hal_srng_create_config_wcn7850(struct ath12k_base *ab) 1326 1334 { 1327 1335 struct ath12k_hal *hal = &ab->hal; ··· 1353 1371 1354 1372 s = &hal->srng_config[HAL_TCL_DATA]; 1355 1373 s->max_rings = 5; 1356 1356 - s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB; 1374 1374 + s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB(ab); 1357 1375 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_HP; 1358 1358 - s->reg_size[0] = HAL_TCL2_RING_BASE_LSB - HAL_TCL1_RING_BASE_LSB; 1376 1376 + s->reg_size[0] = HAL_TCL2_RING_BASE_LSB(ab) - HAL_TCL1_RING_BASE_LSB(ab); 1359 1377 s->reg_size[1] = HAL_TCL2_RING_HP - HAL_TCL1_RING_HP; 1360 1378 1361 1379 s = &hal->srng_config[HAL_TCL_CMD]; ··· 1368 1386 1369 1387 s = &hal->srng_config[HAL_CE_SRC]; 1370 1388 s->max_rings = 12; 1371 1371 - s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_BASE_LSB; 1372 1372 - s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_HP; 1373 1373 - s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG - 1374 1374 - HAL_SEQ_WCSS_UMAC_CE0_SRC_REG; 1375 1375 - s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG - 1376 1376 - HAL_SEQ_WCSS_UMAC_CE0_SRC_REG; 1389 1389 + s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB; 1390 1390 + s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP; 1391 1391 + s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) - 1392 1392 + HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab); 1393 1393 + s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) - 1394 1394 + HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab); 1377 1395 1378 1396 s = &hal->srng_config[HAL_CE_DST]; 1379 1397 s->max_rings = 12; 1380 1380 - s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_BASE_LSB; 1381 1381 - s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_HP; 1382 1382 - s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - 1383 1383 - HAL_SEQ_WCSS_UMAC_CE0_DST_REG; 1384 1384 - s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - 1385 1385 - HAL_SEQ_WCSS_UMAC_CE0_DST_REG; 1398 1398 + s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB; 1399 1399 + s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP; 1400 1400 + s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) - 1401 1401 + HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab); 1402 1402 + s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) - 1403 1403 + HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab); 1386 1404 1387 1405 s = &hal->srng_config[HAL_CE_DST_STATUS]; 1388 1406 s->max_rings = 12; 1389 1389 - s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + 1407 1407 + s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + 1390 1408 HAL_CE_DST_STATUS_RING_BASE_LSB; 1391 1391 - s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_STATUS_RING_HP; 1392 1392 - s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - 1393 1393 - HAL_SEQ_WCSS_UMAC_CE0_DST_REG; 1394 1394 - s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - 1395 1395 - HAL_SEQ_WCSS_UMAC_CE0_DST_REG; 1409 1409 + s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP; 1410 1410 + s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) - 1411 1411 + HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab); 1412 1412 + s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) - 1413 1413 + HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab); 1396 1414 1397 1415 s = &hal->srng_config[HAL_WBM_IDLE_LINK]; 1398 1416 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_BASE_LSB(ab); ··· 1537 1555 .rx_desc_is_da_mcbc = ath12k_hw_wcn7850_rx_desc_is_da_mcbc, 1538 1556 .rx_desc_get_dot11_hdr = ath12k_hw_wcn7850_rx_desc_get_dot11_hdr, 1539 1557 .rx_desc_get_crypto_header = ath12k_hw_wcn7850_rx_desc_get_crypto_hdr, 1540 1540 - .rx_desc_get_mpdu_frame_ctl = ath12k_hw_wcn7850_rx_desc_get_mpdu_frame_ctl, 1541 1558 .dp_rx_h_msdu_done = ath12k_hw_wcn7850_dp_rx_h_msdu_done, 1542 1559 .dp_rx_h_l4_cksum_fail = ath12k_hw_wcn7850_dp_rx_h_l4_cksum_fail, 1543 1560 .dp_rx_h_ip_cksum_fail = ath12k_hw_wcn7850_dp_rx_h_ip_cksum_fail, ··· 1737 1756 HAL_TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB) | 1738 1757 u32_encode_bits((srng->entry_size * srng->num_entries), 1739 1758 HAL_TCL1_RING_BASE_MSB_RING_SIZE); 1740 1740 - ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_BASE_MSB_OFFSET, val); 1759 1759 + ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_BASE_MSB_OFFSET(ab), val); 1741 1760 1742 1761 val = u32_encode_bits(srng->entry_size, HAL_REO1_RING_ID_ENTRY_SIZE); 1743 1762 ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_ID_OFFSET(ab), val);

+47 -29

drivers/net/wireless/ath/ath12k/hal.h

reviewed

··· 1 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 2 /* 3 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 7 7 #ifndef ATH12K_HAL_H ··· 11 11 #include "rx_desc.h" 12 12 13 13 struct ath12k_base; 14 14 + #define HAL_CE_REMAP_REG_BASE (ab->ce_remap_base_addr) 14 15 15 16 #define HAL_LINK_DESC_SIZE (32 << 2) 16 17 #define HAL_LINK_DESC_ALIGN 128 ··· 22 21 #define HAL_MAX_AVAIL_BLK_RES 3 23 22 24 23 #define HAL_RING_BASE_ALIGN 8 24 24 + #define HAL_REO_QLUT_ADDR_ALIGN 256 25 25 26 26 #define HAL_WBM_IDLE_SCATTER_BUF_SIZE_MAX 32704 27 27 /* TODO: Check with hw team on the supported scatter buf size */ ··· 41 39 #define HAL_OFFSET_FROM_HP_TO_TP 4 42 40 43 41 #define HAL_SHADOW_REG(x) (HAL_SHADOW_BASE_ADDR + (4 * (x))) 42 42 + #define HAL_REO_QDESC_MAX_PEERID 8191 44 43 45 44 /* WCSS Relative address */ 45 45 + #define HAL_SEQ_WCSS_CMEM_OFFSET 0x00100000 46 46 #define HAL_SEQ_WCSS_UMAC_OFFSET 0x00a00000 47 47 #define HAL_SEQ_WCSS_UMAC_REO_REG 0x00a38000 48 48 #define HAL_SEQ_WCSS_UMAC_TCL_REG 0x00a44000 49 49 - #define HAL_SEQ_WCSS_UMAC_CE0_SRC_REG 0x01b80000 50 50 - #define HAL_SEQ_WCSS_UMAC_CE0_DST_REG 0x01b81000 51 51 - #define HAL_SEQ_WCSS_UMAC_CE1_SRC_REG 0x01b82000 52 52 - #define HAL_SEQ_WCSS_UMAC_CE1_DST_REG 0x01b83000 49 49 + #define HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) \ 50 50 + ((ab)->hw_params->regs->hal_umac_ce0_src_reg_base) 51 51 + #define HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) \ 52 52 + ((ab)->hw_params->regs->hal_umac_ce0_dest_reg_base) 53 53 + #define HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) \ 54 54 + ((ab)->hw_params->regs->hal_umac_ce1_src_reg_base) 55 55 + #define HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) \ 56 56 + ((ab)->hw_params->regs->hal_umac_ce1_dest_reg_base) 53 57 #define HAL_SEQ_WCSS_UMAC_WBM_REG 0x00a34000 54 58 55 59 #define HAL_CE_WFSS_CE_REG_BASE 0x01b80000 ··· 65 57 /* SW2TCL(x) R0 ring configuration address */ 66 58 #define HAL_TCL1_RING_CMN_CTRL_REG 0x00000020 67 59 #define HAL_TCL1_RING_DSCP_TID_MAP 0x00000240 68 68 - #define HAL_TCL1_RING_BASE_LSB 0x00000900 69 69 - #define HAL_TCL1_RING_BASE_MSB 0x00000904 60 60 + #define HAL_TCL1_RING_BASE_LSB(ab) \ 61 61 + ((ab)->hw_params->regs->hal_tcl1_ring_base_lsb) 62 62 + #define HAL_TCL1_RING_BASE_MSB(ab) \ 63 63 + ((ab)->hw_params->regs->hal_tcl1_ring_base_msb) 70 64 #define HAL_TCL1_RING_ID(ab) ((ab)->hw_params->regs->hal_tcl1_ring_id) 71 65 #define HAL_TCL1_RING_MISC(ab) \ 72 66 ((ab)->hw_params->regs->hal_tcl1_ring_misc) ··· 86 76 ((ab)->hw_params->regs->hal_tcl1_ring_msi1_base_msb) 87 77 #define HAL_TCL1_RING_MSI1_DATA(ab) \ 88 78 ((ab)->hw_params->regs->hal_tcl1_ring_msi1_data) 89 89 - #define HAL_TCL2_RING_BASE_LSB 0x00000978 79 79 + #define HAL_TCL2_RING_BASE_LSB(ab) \ 80 80 + ((ab)->hw_params->regs->hal_tcl2_ring_base_lsb) 90 81 #define HAL_TCL_RING_BASE_LSB(ab) \ 91 82 ((ab)->hw_params->regs->hal_tcl_ring_base_lsb) 92 83 93 93 - #define HAL_TCL1_RING_MSI1_BASE_LSB_OFFSET(ab) \ 94 94 - (HAL_TCL1_RING_MSI1_BASE_LSB(ab) - HAL_TCL1_RING_BASE_LSB) 95 95 - #define HAL_TCL1_RING_MSI1_BASE_MSB_OFFSET(ab) \ 96 96 - (HAL_TCL1_RING_MSI1_BASE_MSB(ab) - HAL_TCL1_RING_BASE_LSB) 97 97 - #define HAL_TCL1_RING_MSI1_DATA_OFFSET(ab) \ 98 98 - (HAL_TCL1_RING_MSI1_DATA(ab) - HAL_TCL1_RING_BASE_LSB) 99 99 - #define HAL_TCL1_RING_BASE_MSB_OFFSET \ 100 100 - (HAL_TCL1_RING_BASE_MSB - HAL_TCL1_RING_BASE_LSB) 101 101 - #define HAL_TCL1_RING_ID_OFFSET(ab) \ 102 102 - (HAL_TCL1_RING_ID(ab) - HAL_TCL1_RING_BASE_LSB) 103 103 - #define HAL_TCL1_RING_CONSR_INT_SETUP_IX0_OFFSET(ab) \ 104 104 - (HAL_TCL1_RING_CONSUMER_INT_SETUP_IX0(ab) - HAL_TCL1_RING_BASE_LSB) 105 105 - #define HAL_TCL1_RING_CONSR_INT_SETUP_IX1_OFFSET(ab) \ 106 106 - (HAL_TCL1_RING_CONSUMER_INT_SETUP_IX1(ab) - HAL_TCL1_RING_BASE_LSB) 107 107 - #define HAL_TCL1_RING_TP_ADDR_LSB_OFFSET(ab) \ 108 108 - (HAL_TCL1_RING_TP_ADDR_LSB(ab) - HAL_TCL1_RING_BASE_LSB) 109 109 - #define HAL_TCL1_RING_TP_ADDR_MSB_OFFSET(ab) \ 110 110 - (HAL_TCL1_RING_TP_ADDR_MSB(ab) - HAL_TCL1_RING_BASE_LSB) 111 111 - #define HAL_TCL1_RING_MISC_OFFSET(ab) \ 112 112 - (HAL_TCL1_RING_MISC(ab) - HAL_TCL1_RING_BASE_LSB) 84 84 + #define HAL_TCL1_RING_MSI1_BASE_LSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \ 85 85 + (HAL_TCL1_RING_MSI1_BASE_LSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); }) 86 86 + #define HAL_TCL1_RING_MSI1_BASE_MSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \ 87 87 + (HAL_TCL1_RING_MSI1_BASE_MSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); }) 88 88 + #define HAL_TCL1_RING_MSI1_DATA_OFFSET(ab) ({ typeof(ab) _ab = (ab); \ 89 89 + (HAL_TCL1_RING_MSI1_DATA(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); }) 90 90 + #define HAL_TCL1_RING_BASE_MSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \ 91 91 + (HAL_TCL1_RING_BASE_MSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); }) 92 92 + #define HAL_TCL1_RING_ID_OFFSET(ab) ({ typeof(ab) _ab = (ab); \ 93 93 + (HAL_TCL1_RING_ID(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); }) 94 94 + #define HAL_TCL1_RING_CONSR_INT_SETUP_IX0_OFFSET(ab) ({ typeof(ab) _ab = (ab); \ 95 95 + (HAL_TCL1_RING_CONSUMER_INT_SETUP_IX0(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); }) 96 96 + #define HAL_TCL1_RING_CONSR_INT_SETUP_IX1_OFFSET(ab) ({ typeof(ab) _ab = (ab); \ 97 97 + (HAL_TCL1_RING_CONSUMER_INT_SETUP_IX1(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); }) 98 98 + #define HAL_TCL1_RING_TP_ADDR_LSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \ 99 99 + (HAL_TCL1_RING_TP_ADDR_LSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); }) 100 100 + #define HAL_TCL1_RING_TP_ADDR_MSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \ 101 101 + (HAL_TCL1_RING_TP_ADDR_MSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); }) 102 102 + #define HAL_TCL1_RING_MISC_OFFSET(ab) ({ typeof(ab) _ab = (ab); \ 103 103 + (HAL_TCL1_RING_MISC(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); }) 113 104 114 105 /* SW2TCL(x) R2 ring pointers (head/tail) address */ 115 106 #define HAL_TCL1_RING_HP 0x00002000 ··· 143 132 #define HAL_REO1_DEST_RING_CTRL_IX_1 0x00000008 144 133 #define HAL_REO1_DEST_RING_CTRL_IX_2 0x0000000c 145 134 #define HAL_REO1_DEST_RING_CTRL_IX_3 0x00000010 135 135 + #define HAL_REO1_QDESC_ADDR(ab) ((ab)->hw_params->regs->hal_reo1_qdesc_addr) 136 136 + #define HAL_REO1_QDESC_MAX_PEERID(ab) ((ab)->hw_params->regs->hal_reo1_qdesc_max_peerid) 146 137 #define HAL_REO1_SW_COOKIE_CFG0(ab) ((ab)->hw_params->regs->hal_reo1_sw_cookie_cfg0) 147 138 #define HAL_REO1_SW_COOKIE_CFG1(ab) ((ab)->hw_params->regs->hal_reo1_sw_cookie_cfg1) 148 139 #define HAL_REO1_QDESC_LUT_BASE0(ab) ((ab)->hw_params->regs->hal_reo1_qdesc_lut_base0) ··· 332 319 #define HAL_REO1_SW_COOKIE_CFG_ALIGN BIT(18) 333 320 #define HAL_REO1_SW_COOKIE_CFG_ENABLE BIT(19) 334 321 #define HAL_REO1_SW_COOKIE_CFG_GLOBAL_ENABLE BIT(20) 322 322 + #define HAL_REO_QDESC_ADDR_READ_LUT_ENABLE BIT(7) 323 323 + #define HAL_REO_QDESC_ADDR_READ_CLEAR_QDESC_ARRAY BIT(6) 335 324 336 325 /* CE ring bit field mask and shift */ 337 326 #define HAL_CE_DST_R0_DEST_CTRL_MAX_LEN GENMASK(15, 0) ··· 379 364 /* Add any other errors here and return them in 380 365 * ath12k_hal_rx_desc_get_err(). 381 366 */ 367 367 + 368 368 + #define HAL_IPQ5332_CE_WFSS_REG_BASE 0x740000 369 369 + #define HAL_IPQ5332_CE_SIZE 0x100000 382 370 383 371 enum hal_srng_ring_id { 384 372 HAL_SRNG_RING_ID_REO2SW0 = 0, ··· 1086 1068 bool (*rx_desc_is_da_mcbc)(struct hal_rx_desc *desc); 1087 1069 void (*rx_desc_get_dot11_hdr)(struct hal_rx_desc *desc, 1088 1070 struct ieee80211_hdr *hdr); 1089 1089 - u16 (*rx_desc_get_mpdu_frame_ctl)(struct hal_rx_desc *desc); 1090 1071 void (*rx_desc_get_crypto_header)(struct hal_rx_desc *desc, 1091 1072 u8 *crypto_hdr, 1092 1073 enum hal_encrypt_type enctype); ··· 1171 1154 void ath12k_hal_srng_shadow_config(struct ath12k_base *ab); 1172 1155 void ath12k_hal_srng_shadow_update_hp_tp(struct ath12k_base *ab, 1173 1156 struct hal_srng *srng); 1157 1157 + void ath12k_hal_reo_shared_qaddr_cache_clear(struct ath12k_base *ab); 1174 1158 #endif

+5 -1

drivers/net/wireless/ath/ath12k/hal_desc.h

reviewed

··· 1 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 2 /* 3 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2022, 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 #include "core.h" 7 7 ··· 1284 1284 HAL_TCL_ENCAP_TYPE_NATIVE_WIFI, 1285 1285 HAL_TCL_ENCAP_TYPE_ETHERNET, 1286 1286 HAL_TCL_ENCAP_TYPE_802_3 = 3, 1287 1287 + HAL_TCL_ENCAP_TYPE_MAX 1287 1288 }; 1288 1289 1289 1290 enum hal_tcl_desc_type { 1290 1291 HAL_TCL_DESC_TYPE_BUFFER, 1291 1292 HAL_TCL_DESC_TYPE_EXT_DESC, 1293 1293 + HAL_TCL_DESC_TYPE_MAX, 1292 1294 }; 1293 1295 1294 1296 enum hal_wbm_htt_tx_comp_status { ··· 1300 1298 HAL_WBM_REL_HTT_TX_COMP_STATUS_REINJ, 1301 1299 HAL_WBM_REL_HTT_TX_COMP_STATUS_INSPECT, 1302 1300 HAL_WBM_REL_HTT_TX_COMP_STATUS_MEC_NOTIFY, 1301 1301 + HAL_WBM_REL_HTT_TX_COMP_STATUS_VDEVID_MISMATCH, 1303 1302 HAL_WBM_REL_HTT_TX_COMP_STATUS_MAX, 1304 1303 }; 1305 1304 ··· 2001 1998 #define HAL_WBM_RELEASE_INFO3_CONTINUATION BIT(2) 2002 1999 2003 2000 #define HAL_WBM_RELEASE_INFO5_LOOPING_COUNT GENMASK(31, 28) 2001 2001 + #define HAL_ENCRYPT_TYPE_MAX 12 2004 2002 2005 2003 struct hal_wbm_release_ring { 2006 2004 struct ath12k_buffer_addr buf_addr_info;

+18 -1

drivers/net/wireless/ath/ath12k/hal_rx.c

reviewed

··· 1 1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 2 /* 3 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 7 7 #include "debug.h" ··· 850 850 ring_hash_map); 851 851 ath12k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_3, 852 852 ring_hash_map); 853 853 + } 854 854 + 855 855 + void ath12k_hal_reo_shared_qaddr_cache_clear(struct ath12k_base *ab) 856 856 + { 857 857 + u32 val; 858 858 + 859 859 + lockdep_assert_held(&ab->base_lock); 860 860 + val = ath12k_hif_read32(ab, HAL_SEQ_WCSS_UMAC_REO_REG + 861 861 + HAL_REO1_QDESC_ADDR(ab)); 862 862 + 863 863 + val |= u32_encode_bits(1, HAL_REO_QDESC_ADDR_READ_CLEAR_QDESC_ARRAY); 864 864 + ath12k_hif_write32(ab, HAL_SEQ_WCSS_UMAC_REO_REG + 865 865 + HAL_REO1_QDESC_ADDR(ab), val); 866 866 + 867 867 + val &= ~HAL_REO_QDESC_ADDR_READ_CLEAR_QDESC_ARRAY; 868 868 + ath12k_hif_write32(ab, HAL_SEQ_WCSS_UMAC_REO_REG + 869 869 + HAL_REO1_QDESC_ADDR(ab), val); 853 870 }

+14 -1

drivers/net/wireless/ath/ath12k/hal_rx.h

reviewed

··· 108 108 HAL_RX_MON_STATUS_PPDU_DONE, 109 109 HAL_RX_MON_STATUS_BUF_DONE, 110 110 HAL_RX_MON_STATUS_BUF_ADDR, 111 111 + HAL_RX_MON_STATUS_MPDU_START, 111 112 HAL_RX_MON_STATUS_MPDU_END, 112 113 HAL_RX_MON_STATUS_MSDU_END, 113 114 }; 114 115 115 115 - #define HAL_RX_MAX_MPDU 256 116 116 + #define HAL_RX_MAX_MPDU 1024 116 117 #define HAL_RX_NUM_WORDS_PER_PPDU_BITMAP (HAL_RX_MAX_MPDU >> 5) 117 118 118 119 struct hal_rx_user_status { ··· 505 504 __le32 rsvd1[2]; 506 505 __le32 info2; 507 506 __le32 rsvd2[16]; 507 507 + } __packed; 508 508 + 509 509 + struct hal_rx_msdu_end { 510 510 + __le32 info0; 511 511 + __le32 rsvd0[9]; 512 512 + __le16 info00; 513 513 + __le16 info01; 514 514 + __le32 rsvd00[8]; 515 515 + __le32 info1; 516 516 + __le32 rsvd1[10]; 517 517 + __le32 info2; 518 518 + __le32 rsvd2; 508 519 } __packed; 509 520 510 521 #define HAL_RX_PPDU_END_DURATION GENMASK(23, 0)

+496 -3

drivers/net/wireless/ath/ath12k/hw.c

reviewed

··· 1 1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 2 /* 3 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 7 7 #include <linux/types.h> ··· 535 535 }, 536 536 }; 537 537 538 538 + static const struct ce_pipe_config ath12k_target_ce_config_wlan_ipq5332[] = { 539 539 + /* host->target HTC control and raw streams */ 540 540 + { 541 541 + .pipenum = __cpu_to_le32(0), 542 542 + .pipedir = __cpu_to_le32(PIPEDIR_OUT), 543 543 + .nentries = __cpu_to_le32(32), 544 544 + .nbytes_max = __cpu_to_le32(2048), 545 545 + .flags = __cpu_to_le32(CE_ATTR_FLAGS), 546 546 + .reserved = __cpu_to_le32(0), 547 547 + }, 548 548 + /* target->host HTT */ 549 549 + { 550 550 + .pipenum = __cpu_to_le32(1), 551 551 + .pipedir = __cpu_to_le32(PIPEDIR_IN), 552 552 + .nentries = __cpu_to_le32(32), 553 553 + .nbytes_max = __cpu_to_le32(2048), 554 554 + .flags = __cpu_to_le32(CE_ATTR_FLAGS), 555 555 + .reserved = __cpu_to_le32(0), 556 556 + }, 557 557 + /* target->host WMI + HTC control */ 558 558 + { 559 559 + .pipenum = __cpu_to_le32(2), 560 560 + .pipedir = __cpu_to_le32(PIPEDIR_IN), 561 561 + .nentries = __cpu_to_le32(32), 562 562 + .nbytes_max = __cpu_to_le32(2048), 563 563 + .flags = __cpu_to_le32(CE_ATTR_FLAGS), 564 564 + .reserved = __cpu_to_le32(0), 565 565 + }, 566 566 + /* host->target WMI */ 567 567 + { 568 568 + .pipenum = __cpu_to_le32(3), 569 569 + .pipedir = __cpu_to_le32(PIPEDIR_OUT), 570 570 + .nentries = __cpu_to_le32(32), 571 571 + .nbytes_max = __cpu_to_le32(2048), 572 572 + .flags = __cpu_to_le32(CE_ATTR_FLAGS), 573 573 + .reserved = __cpu_to_le32(0), 574 574 + }, 575 575 + /* host->target HTT */ 576 576 + { 577 577 + .pipenum = __cpu_to_le32(4), 578 578 + .pipedir = __cpu_to_le32(PIPEDIR_OUT), 579 579 + .nentries = __cpu_to_le32(256), 580 580 + .nbytes_max = __cpu_to_le32(256), 581 581 + .flags = __cpu_to_le32(CE_ATTR_FLAGS | CE_ATTR_DIS_INTR), 582 582 + .reserved = __cpu_to_le32(0), 583 583 + }, 584 584 + /* Target -> host PKTLOG */ 585 585 + { 586 586 + .pipenum = __cpu_to_le32(5), 587 587 + .pipedir = __cpu_to_le32(PIPEDIR_IN), 588 588 + .nentries = __cpu_to_le32(32), 589 589 + .nbytes_max = __cpu_to_le32(2048), 590 590 + .flags = __cpu_to_le32(CE_ATTR_FLAGS), 591 591 + .reserved = __cpu_to_le32(0), 592 592 + }, 593 593 + /* Reserved for target autonomous HIF_memcpy */ 594 594 + { 595 595 + .pipenum = __cpu_to_le32(6), 596 596 + .pipedir = __cpu_to_le32(PIPEDIR_INOUT), 597 597 + .nentries = __cpu_to_le32(32), 598 598 + .nbytes_max = __cpu_to_le32(16384), 599 599 + .flags = __cpu_to_le32(CE_ATTR_FLAGS), 600 600 + .reserved = __cpu_to_le32(0), 601 601 + }, 602 602 + /* CE7 Reserved for CV Prefetch */ 603 603 + { 604 604 + .pipenum = __cpu_to_le32(7), 605 605 + .pipedir = __cpu_to_le32(PIPEDIR_OUT), 606 606 + .nentries = __cpu_to_le32(32), 607 607 + .nbytes_max = __cpu_to_le32(2048), 608 608 + .flags = __cpu_to_le32(CE_ATTR_FLAGS), 609 609 + .reserved = __cpu_to_le32(0), 610 610 + }, 611 611 + /* CE8 Reserved for target generic HIF memcpy */ 612 612 + { 613 613 + .pipenum = __cpu_to_le32(8), 614 614 + .pipedir = __cpu_to_le32(PIPEDIR_INOUT), 615 615 + .nentries = __cpu_to_le32(32), 616 616 + .nbytes_max = __cpu_to_le32(16384), 617 617 + .flags = __cpu_to_le32(CE_ATTR_FLAGS), 618 618 + .reserved = __cpu_to_le32(0), 619 619 + }, 620 620 + /* CE9 WMI logging/CFR/Spectral/Radar/ */ 621 621 + { 622 622 + .pipenum = __cpu_to_le32(9), 623 623 + .pipedir = __cpu_to_le32(PIPEDIR_IN), 624 624 + .nentries = __cpu_to_le32(32), 625 625 + .nbytes_max = __cpu_to_le32(2048), 626 626 + .flags = __cpu_to_le32(CE_ATTR_FLAGS), 627 627 + .reserved = __cpu_to_le32(0), 628 628 + }, 629 629 + /* Unused TBD */ 630 630 + { 631 631 + .pipenum = __cpu_to_le32(10), 632 632 + .pipedir = __cpu_to_le32(PIPEDIR_NONE), 633 633 + .nentries = __cpu_to_le32(0), 634 634 + .nbytes_max = __cpu_to_le32(0), 635 635 + .flags = __cpu_to_le32(0), 636 636 + .reserved = __cpu_to_le32(0), 637 637 + }, 638 638 + /* Unused TBD */ 639 639 + { 640 640 + .pipenum = __cpu_to_le32(11), 641 641 + .pipedir = __cpu_to_le32(PIPEDIR_NONE), 642 642 + .nentries = __cpu_to_le32(0), 643 643 + .nbytes_max = __cpu_to_le32(0), 644 644 + .flags = __cpu_to_le32(0), 645 645 + .reserved = __cpu_to_le32(0), 646 646 + }, 647 647 + }; 648 648 + 649 649 + static const struct service_to_pipe ath12k_target_service_to_ce_map_wlan_ipq5332[] = { 650 650 + { 651 651 + __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VO), 652 652 + __cpu_to_le32(PIPEDIR_OUT), 653 653 + __cpu_to_le32(3), 654 654 + }, 655 655 + { 656 656 + __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VO), 657 657 + __cpu_to_le32(PIPEDIR_IN), 658 658 + __cpu_to_le32(2), 659 659 + }, 660 660 + { 661 661 + __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BK), 662 662 + __cpu_to_le32(PIPEDIR_OUT), 663 663 + __cpu_to_le32(3), 664 664 + }, 665 665 + { 666 666 + __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BK), 667 667 + __cpu_to_le32(PIPEDIR_IN), 668 668 + __cpu_to_le32(2), 669 669 + }, 670 670 + { 671 671 + __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BE), 672 672 + __cpu_to_le32(PIPEDIR_OUT), 673 673 + __cpu_to_le32(3), 674 674 + }, 675 675 + { 676 676 + __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BE), 677 677 + __cpu_to_le32(PIPEDIR_IN), 678 678 + __cpu_to_le32(2), 679 679 + }, 680 680 + { 681 681 + __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VI), 682 682 + __cpu_to_le32(PIPEDIR_OUT), 683 683 + __cpu_to_le32(3), 684 684 + }, 685 685 + { 686 686 + __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VI), 687 687 + __cpu_to_le32(PIPEDIR_IN), 688 688 + __cpu_to_le32(2), 689 689 + }, 690 690 + { 691 691 + __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_CONTROL), 692 692 + __cpu_to_le32(PIPEDIR_OUT), 693 693 + __cpu_to_le32(3), 694 694 + }, 695 695 + { 696 696 + __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_CONTROL), 697 697 + __cpu_to_le32(PIPEDIR_IN), 698 698 + __cpu_to_le32(2), 699 699 + }, 700 700 + { 701 701 + __cpu_to_le32(ATH12K_HTC_SVC_ID_RSVD_CTRL), 702 702 + __cpu_to_le32(PIPEDIR_OUT), 703 703 + __cpu_to_le32(0), 704 704 + }, 705 705 + { 706 706 + __cpu_to_le32(ATH12K_HTC_SVC_ID_RSVD_CTRL), 707 707 + __cpu_to_le32(PIPEDIR_IN), 708 708 + __cpu_to_le32(1), 709 709 + }, 710 710 + { 711 711 + __cpu_to_le32(ATH12K_HTC_SVC_ID_TEST_RAW_STREAMS), 712 712 + __cpu_to_le32(PIPEDIR_OUT), 713 713 + __cpu_to_le32(0), 714 714 + }, 715 715 + { 716 716 + __cpu_to_le32(ATH12K_HTC_SVC_ID_TEST_RAW_STREAMS), 717 717 + __cpu_to_le32(PIPEDIR_IN), 718 718 + __cpu_to_le32(1), 719 719 + }, 720 720 + { 721 721 + __cpu_to_le32(ATH12K_HTC_SVC_ID_HTT_DATA_MSG), 722 722 + __cpu_to_le32(PIPEDIR_OUT), 723 723 + __cpu_to_le32(4), 724 724 + }, 725 725 + { 726 726 + __cpu_to_le32(ATH12K_HTC_SVC_ID_HTT_DATA_MSG), 727 727 + __cpu_to_le32(PIPEDIR_IN), 728 728 + __cpu_to_le32(1), 729 729 + }, 730 730 + { 731 731 + __cpu_to_le32(ATH12K_HTC_SVC_ID_PKT_LOG), 732 732 + __cpu_to_le32(PIPEDIR_IN), 733 733 + __cpu_to_le32(5), 734 734 + }, 735 735 + { 736 736 + __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_CONTROL_DIAG), 737 737 + __cpu_to_le32(PIPEDIR_IN), 738 738 + __cpu_to_le32(9), 739 739 + }, 740 740 + /* (Additions here) */ 741 741 + 742 742 + { /* must be last */ 743 743 + __cpu_to_le32(0), 744 744 + __cpu_to_le32(0), 745 745 + __cpu_to_le32(0), 746 746 + }, 747 747 + }; 748 748 + 538 749 static const struct ath12k_hw_ring_mask ath12k_hw_ring_mask_qcn9274 = { 539 750 .tx = { 540 751 ATH12K_TX_RING_MASK_0, ··· 785 574 }, 786 575 .tx_mon_dest = { 787 576 0, 0, 0, 577 577 + }, 578 578 + }; 579 579 + 580 580 + static const struct ath12k_hw_ring_mask ath12k_hw_ring_mask_ipq5332 = { 581 581 + .tx = { 582 582 + ATH12K_TX_RING_MASK_0, 583 583 + ATH12K_TX_RING_MASK_1, 584 584 + ATH12K_TX_RING_MASK_2, 585 585 + ATH12K_TX_RING_MASK_3, 586 586 + }, 587 587 + .rx_mon_dest = { 588 588 + 0, 0, 0, 0, 0, 0, 0, 0, 589 589 + ATH12K_RX_MON_RING_MASK_0, 590 590 + }, 591 591 + .rx = { 592 592 + 0, 0, 0, 0, 593 593 + ATH12K_RX_RING_MASK_0, 594 594 + ATH12K_RX_RING_MASK_1, 595 595 + ATH12K_RX_RING_MASK_2, 596 596 + ATH12K_RX_RING_MASK_3, 597 597 + }, 598 598 + .rx_err = { 599 599 + 0, 0, 0, 600 600 + ATH12K_RX_ERR_RING_MASK_0, 601 601 + }, 602 602 + .rx_wbm_rel = { 603 603 + 0, 0, 0, 604 604 + ATH12K_RX_WBM_REL_RING_MASK_0, 605 605 + }, 606 606 + .reo_status = { 607 607 + 0, 0, 0, 608 608 + ATH12K_REO_STATUS_RING_MASK_0, 609 609 + }, 610 610 + .host2rxdma = { 611 611 + 0, 0, 0, 612 612 + ATH12K_HOST2RXDMA_RING_MASK_0, 613 613 + }, 614 614 + .tx_mon_dest = { 615 615 + ATH12K_TX_MON_RING_MASK_0, 616 616 + ATH12K_TX_MON_RING_MASK_1, 788 617 }, 789 618 }; 790 619 ··· 870 619 .hal_tcl1_ring_msi1_base_msb = 0x0000094c, 871 620 .hal_tcl1_ring_msi1_data = 0x00000950, 872 621 .hal_tcl_ring_base_lsb = 0x00000b58, 622 622 + .hal_tcl1_ring_base_lsb = 0x00000900, 623 623 + .hal_tcl1_ring_base_msb = 0x00000904, 624 624 + .hal_tcl2_ring_base_lsb = 0x00000978, 873 625 874 626 /* TCL STATUS ring address */ 875 627 .hal_tcl_status_ring_base_lsb = 0x00000d38, ··· 935 681 936 682 /* REO status ring address */ 937 683 .hal_reo_status_ring_base = 0x00000a84, 684 684 + 685 685 + /* CE base address */ 686 686 + .hal_umac_ce0_src_reg_base = 0x01b80000, 687 687 + .hal_umac_ce0_dest_reg_base = 0x01b81000, 688 688 + .hal_umac_ce1_src_reg_base = 0x01b82000, 689 689 + .hal_umac_ce1_dest_reg_base = 0x01b83000, 938 690 }; 939 691 940 692 static const struct ath12k_hw_regs qcn9274_v2_regs = { ··· 955 695 .hal_tcl1_ring_msi1_base_msb = 0x0000094c, 956 696 .hal_tcl1_ring_msi1_data = 0x00000950, 957 697 .hal_tcl_ring_base_lsb = 0x00000b58, 698 698 + .hal_tcl1_ring_base_lsb = 0x00000900, 699 699 + .hal_tcl1_ring_base_msb = 0x00000904, 700 700 + .hal_tcl2_ring_base_lsb = 0x00000978, 958 701 959 702 /* TCL STATUS ring address */ 960 703 .hal_tcl_status_ring_base_lsb = 0x00000d38, ··· 997 734 .hal_reo1_sw_cookie_cfg1 = 0x00000070, 998 735 .hal_reo1_qdesc_lut_base0 = 0x00000074, 999 736 .hal_reo1_qdesc_lut_base1 = 0x00000078, 737 737 + .hal_reo1_qdesc_addr = 0x0000007c, 738 738 + .hal_reo1_qdesc_max_peerid = 0x00000088, 1000 739 .hal_reo1_ring_base_lsb = 0x00000500, 1001 740 .hal_reo1_ring_base_msb = 0x00000504, 1002 741 .hal_reo1_ring_id = 0x00000508, ··· 1026 761 1027 762 /* REO status ring address */ 1028 763 .hal_reo_status_ring_base = 0x00000aa0, 764 764 + 765 765 + /* CE base address */ 766 766 + .hal_umac_ce0_src_reg_base = 0x01b80000, 767 767 + .hal_umac_ce0_dest_reg_base = 0x01b81000, 768 768 + .hal_umac_ce1_src_reg_base = 0x01b82000, 769 769 + .hal_umac_ce1_dest_reg_base = 0x01b83000, 770 770 + }; 771 771 + 772 772 + static const struct ath12k_hw_regs ipq5332_regs = { 773 773 + /* SW2TCL(x) R0 ring configuration address */ 774 774 + .hal_tcl1_ring_id = 0x00000918, 775 775 + .hal_tcl1_ring_misc = 0x00000920, 776 776 + .hal_tcl1_ring_tp_addr_lsb = 0x0000092c, 777 777 + .hal_tcl1_ring_tp_addr_msb = 0x00000930, 778 778 + .hal_tcl1_ring_consumer_int_setup_ix0 = 0x00000940, 779 779 + .hal_tcl1_ring_consumer_int_setup_ix1 = 0x00000944, 780 780 + .hal_tcl1_ring_msi1_base_lsb = 0x00000958, 781 781 + .hal_tcl1_ring_msi1_base_msb = 0x0000095c, 782 782 + .hal_tcl1_ring_base_lsb = 0x00000910, 783 783 + .hal_tcl1_ring_base_msb = 0x00000914, 784 784 + .hal_tcl1_ring_msi1_data = 0x00000960, 785 785 + .hal_tcl2_ring_base_lsb = 0x00000988, 786 786 + .hal_tcl_ring_base_lsb = 0x00000b68, 787 787 + 788 788 + /* TCL STATUS ring address */ 789 789 + .hal_tcl_status_ring_base_lsb = 0x00000d48, 790 790 + 791 791 + /* REO DEST ring address */ 792 792 + .hal_reo2_ring_base = 0x00000578, 793 793 + .hal_reo1_misc_ctrl_addr = 0x00000b9c, 794 794 + .hal_reo1_sw_cookie_cfg0 = 0x0000006c, 795 795 + .hal_reo1_sw_cookie_cfg1 = 0x00000070, 796 796 + .hal_reo1_qdesc_lut_base0 = 0x00000074, 797 797 + .hal_reo1_qdesc_lut_base1 = 0x00000078, 798 798 + .hal_reo1_ring_base_lsb = 0x00000500, 799 799 + .hal_reo1_ring_base_msb = 0x00000504, 800 800 + .hal_reo1_ring_id = 0x00000508, 801 801 + .hal_reo1_ring_misc = 0x00000510, 802 802 + .hal_reo1_ring_hp_addr_lsb = 0x00000514, 803 803 + .hal_reo1_ring_hp_addr_msb = 0x00000518, 804 804 + .hal_reo1_ring_producer_int_setup = 0x00000524, 805 805 + .hal_reo1_ring_msi1_base_lsb = 0x00000548, 806 806 + .hal_reo1_ring_msi1_base_msb = 0x0000054C, 807 807 + .hal_reo1_ring_msi1_data = 0x00000550, 808 808 + .hal_reo1_aging_thres_ix0 = 0x00000B28, 809 809 + .hal_reo1_aging_thres_ix1 = 0x00000B2C, 810 810 + .hal_reo1_aging_thres_ix2 = 0x00000B30, 811 811 + .hal_reo1_aging_thres_ix3 = 0x00000B34, 812 812 + 813 813 + /* REO Exception ring address */ 814 814 + .hal_reo2_sw0_ring_base = 0x000008c0, 815 815 + 816 816 + /* REO Reinject ring address */ 817 817 + .hal_sw2reo_ring_base = 0x00000320, 818 818 + .hal_sw2reo1_ring_base = 0x00000398, 819 819 + 820 820 + /* REO cmd ring address */ 821 821 + .hal_reo_cmd_ring_base = 0x000002A8, 822 822 + 823 823 + /* REO status ring address */ 824 824 + .hal_reo_status_ring_base = 0x00000aa0, 825 825 + 826 826 + /* WBM idle link ring address */ 827 827 + .hal_wbm_idle_ring_base_lsb = 0x00000d3c, 828 828 + .hal_wbm_idle_ring_misc_addr = 0x00000d4c, 829 829 + .hal_wbm_r0_idle_list_cntl_addr = 0x00000240, 830 830 + .hal_wbm_r0_idle_list_size_addr = 0x00000244, 831 831 + .hal_wbm_scattered_ring_base_lsb = 0x00000250, 832 832 + .hal_wbm_scattered_ring_base_msb = 0x00000254, 833 833 + .hal_wbm_scattered_desc_head_info_ix0 = 0x00000260, 834 834 + .hal_wbm_scattered_desc_head_info_ix1 = 0x00000264, 835 835 + .hal_wbm_scattered_desc_tail_info_ix0 = 0x00000270, 836 836 + .hal_wbm_scattered_desc_tail_info_ix1 = 0x00000274, 837 837 + .hal_wbm_scattered_desc_ptr_hp_addr = 0x0000027c, 838 838 + 839 839 + /* SW2WBM release ring address */ 840 840 + .hal_wbm_sw_release_ring_base_lsb = 0x0000037c, 841 841 + 842 842 + /* WBM2SW release ring address */ 843 843 + .hal_wbm0_release_ring_base_lsb = 0x00000e08, 844 844 + .hal_wbm1_release_ring_base_lsb = 0x00000e80, 845 845 + 846 846 + /* PPE release ring address */ 847 847 + .hal_ppe_rel_ring_base = 0x0000046c, 848 848 + 849 849 + /* CE address */ 850 850 + .hal_umac_ce0_src_reg_base = 0x00740000 - 851 851 + HAL_IPQ5332_CE_WFSS_REG_BASE, 852 852 + .hal_umac_ce0_dest_reg_base = 0x00741000 - 853 853 + HAL_IPQ5332_CE_WFSS_REG_BASE, 854 854 + .hal_umac_ce1_src_reg_base = 0x00742000 - 855 855 + HAL_IPQ5332_CE_WFSS_REG_BASE, 856 856 + .hal_umac_ce1_dest_reg_base = 0x00743000 - 857 857 + HAL_IPQ5332_CE_WFSS_REG_BASE, 1029 858 }; 1030 859 1031 860 static const struct ath12k_hw_regs wcn7850_regs = { ··· 1134 775 .hal_tcl1_ring_msi1_base_msb = 0x0000094c, 1135 776 .hal_tcl1_ring_msi1_data = 0x00000950, 1136 777 .hal_tcl_ring_base_lsb = 0x00000b58, 778 778 + .hal_tcl1_ring_base_lsb = 0x00000900, 779 779 + .hal_tcl1_ring_base_msb = 0x00000904, 780 780 + .hal_tcl2_ring_base_lsb = 0x00000978, 1137 781 1138 782 /* TCL STATUS ring address */ 1139 783 .hal_tcl_status_ring_base_lsb = 0x00000d38, ··· 1199 837 1200 838 /* REO status ring address */ 1201 839 .hal_reo_status_ring_base = 0x00000a84, 840 840 + 841 841 + /* CE base address */ 842 842 + .hal_umac_ce0_src_reg_base = 0x01b80000, 843 843 + .hal_umac_ce0_dest_reg_base = 0x01b81000, 844 844 + .hal_umac_ce1_src_reg_base = 0x01b82000, 845 845 + .hal_umac_ce1_dest_reg_base = 0x01b83000, 1202 846 }; 1203 847 1204 848 static const struct ath12k_hw_hal_params ath12k_hw_hal_params_qcn9274 = { ··· 1224 856 HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW4_EN, 1225 857 }; 1226 858 859 859 + static const struct ath12k_hw_hal_params ath12k_hw_hal_params_ipq5332 = { 860 860 + .rx_buf_rbm = HAL_RX_BUF_RBM_SW3_BM, 861 861 + .wbm2sw_cc_enable = HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW0_EN | 862 862 + HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW1_EN | 863 863 + HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW2_EN | 864 864 + HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW3_EN | 865 865 + HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW4_EN, 866 866 + }; 867 867 + 868 868 + static const struct ce_ie_addr ath12k_ce_ie_addr_ipq5332 = { 869 869 + .ie1_reg_addr = CE_HOST_IE_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE, 870 870 + .ie2_reg_addr = CE_HOST_IE_2_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE, 871 871 + .ie3_reg_addr = CE_HOST_IE_3_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE, 872 872 + }; 873 873 + 874 874 + static const struct ce_remap ath12k_ce_remap_ipq5332 = { 875 875 + .base = HAL_IPQ5332_CE_WFSS_REG_BASE, 876 876 + .size = HAL_IPQ5332_CE_SIZE, 877 877 + }; 878 878 + 1227 879 static const struct ath12k_hw_params ath12k_hw_params[] = { 1228 880 { 1229 881 .name = "qcn9274 hw1.0", ··· 1252 864 .dir = "QCN9274/hw1.0", 1253 865 .board_size = 256 * 1024, 1254 866 .cal_offset = 128 * 1024, 867 867 + .m3_loader = ath12k_m3_fw_loader_driver, 1255 868 }, 1256 869 .max_radios = 1, 1257 870 .single_pdev_only = false, ··· 1288 899 .download_calib = true, 1289 900 .supports_suspend = false, 1290 901 .tcl_ring_retry = true, 1291 1291 - .reoq_lut_support = false, 902 902 + .reoq_lut_support = true, 1292 903 .supports_shadow_regs = false, 1293 904 1294 905 .num_tcl_banks = 48, ··· 1321 932 .iova_mask = 0, 1322 933 1323 934 .supports_aspm = false, 935 935 + 936 936 + .ce_ie_addr = NULL, 937 937 + .ce_remap = NULL, 938 938 + .bdf_addr_offset = 0, 939 939 + 940 940 + .current_cc_support = false, 941 941 + 942 942 + .dp_primary_link_only = true, 1324 943 }, 1325 944 { 1326 945 .name = "wcn7850 hw2.0", ··· 1338 941 .dir = "WCN7850/hw2.0", 1339 942 .board_size = 256 * 1024, 1340 943 .cal_offset = 256 * 1024, 944 944 + .m3_loader = ath12k_m3_fw_loader_driver, 1341 945 }, 1342 946 1343 947 .max_radios = 1, ··· 1410 1012 .iova_mask = ATH12K_PCIE_MAX_PAYLOAD_SIZE - 1, 1411 1013 1412 1014 .supports_aspm = true, 1015 1015 + 1016 1016 + .ce_ie_addr = NULL, 1017 1017 + .ce_remap = NULL, 1018 1018 + .bdf_addr_offset = 0, 1019 1019 + 1020 1020 + .current_cc_support = true, 1021 1021 + 1022 1022 + .dp_primary_link_only = false, 1413 1023 }, 1414 1024 { 1415 1025 .name = "qcn9274 hw2.0", ··· 1426 1020 .dir = "QCN9274/hw2.0", 1427 1021 .board_size = 256 * 1024, 1428 1022 .cal_offset = 128 * 1024, 1023 1023 + .m3_loader = ath12k_m3_fw_loader_driver, 1429 1024 }, 1430 1025 .max_radios = 2, 1431 1026 .single_pdev_only = false, ··· 1456 1049 BIT(NL80211_IFTYPE_AP) | 1457 1050 BIT(NL80211_IFTYPE_MESH_POINT) | 1458 1051 BIT(NL80211_IFTYPE_AP_VLAN), 1459 1459 - .supports_monitor = false, 1052 1052 + .supports_monitor = true, 1460 1053 1461 1054 .idle_ps = false, 1462 1055 .download_calib = true, ··· 1495 1088 .iova_mask = 0, 1496 1089 1497 1090 .supports_aspm = false, 1091 1091 + 1092 1092 + .ce_ie_addr = NULL, 1093 1093 + .ce_remap = NULL, 1094 1094 + .bdf_addr_offset = 0, 1095 1095 + 1096 1096 + .current_cc_support = false, 1097 1097 + 1098 1098 + .dp_primary_link_only = true, 1099 1099 + }, 1100 1100 + { 1101 1101 + .name = "ipq5332 hw1.0", 1102 1102 + .hw_rev = ATH12K_HW_IPQ5332_HW10, 1103 1103 + .fw = { 1104 1104 + .dir = "IPQ5332/hw1.0", 1105 1105 + .board_size = 256 * 1024, 1106 1106 + .cal_offset = 128 * 1024, 1107 1107 + .m3_loader = ath12k_m3_fw_loader_remoteproc, 1108 1108 + }, 1109 1109 + .max_radios = 1, 1110 1110 + .single_pdev_only = false, 1111 1111 + .qmi_service_ins_id = ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ5332, 1112 1112 + .internal_sleep_clock = false, 1113 1113 + 1114 1114 + .hw_ops = &qcn9274_ops, 1115 1115 + .regs = &ipq5332_regs, 1116 1116 + .ring_mask = &ath12k_hw_ring_mask_ipq5332, 1117 1117 + 1118 1118 + .host_ce_config = ath12k_host_ce_config_ipq5332, 1119 1119 + .ce_count = 12, 1120 1120 + .target_ce_config = ath12k_target_ce_config_wlan_ipq5332, 1121 1121 + .target_ce_count = 12, 1122 1122 + .svc_to_ce_map = ath12k_target_service_to_ce_map_wlan_ipq5332, 1123 1123 + .svc_to_ce_map_len = 18, 1124 1124 + 1125 1125 + .hal_params = &ath12k_hw_hal_params_ipq5332, 1126 1126 + 1127 1127 + .rxdma1_enable = false, 1128 1128 + .num_rxdma_per_pdev = 1, 1129 1129 + .num_rxdma_dst_ring = 0, 1130 1130 + .rx_mac_buf_ring = false, 1131 1131 + .vdev_start_delay = false, 1132 1132 + 1133 1133 + .interface_modes = BIT(NL80211_IFTYPE_STATION) | 1134 1134 + BIT(NL80211_IFTYPE_AP) | 1135 1135 + BIT(NL80211_IFTYPE_MESH_POINT), 1136 1136 + .supports_monitor = false, 1137 1137 + 1138 1138 + .idle_ps = false, 1139 1139 + .download_calib = true, 1140 1140 + .supports_suspend = false, 1141 1141 + .tcl_ring_retry = true, 1142 1142 + .reoq_lut_support = false, 1143 1143 + .supports_shadow_regs = false, 1144 1144 + 1145 1145 + .num_tcl_banks = 48, 1146 1146 + .max_tx_ring = 4, 1147 1147 + 1148 1148 + .wmi_init = &ath12k_wmi_init_qcn9274, 1149 1149 + 1150 1150 + .hal_ops = &hal_qcn9274_ops, 1151 1151 + 1152 1152 + .qmi_cnss_feature_bitmap = BIT(CNSS_QDSS_CFG_MISS_V01), 1153 1153 + 1154 1154 + .rfkill_pin = 0, 1155 1155 + .rfkill_cfg = 0, 1156 1156 + .rfkill_on_level = 0, 1157 1157 + 1158 1158 + .rddm_size = 0, 1159 1159 + 1160 1160 + .def_num_link = 0, 1161 1161 + .max_mlo_peer = 256, 1162 1162 + 1163 1163 + .otp_board_id_register = 0, 1164 1164 + 1165 1165 + .supports_sta_ps = false, 1166 1166 + 1167 1167 + .acpi_guid = NULL, 1168 1168 + .supports_dynamic_smps_6ghz = false, 1169 1169 + .iova_mask = 0, 1170 1170 + .supports_aspm = false, 1171 1171 + 1172 1172 + .ce_ie_addr = &ath12k_ce_ie_addr_ipq5332, 1173 1173 + .ce_remap = &ath12k_ce_remap_ipq5332, 1174 1174 + .bdf_addr_offset = 0xC00000, 1175 1175 + 1176 1176 + .dp_primary_link_only = true, 1498 1177 }, 1499 1178 }; 1500 1179

+28 -1

drivers/net/wireless/ath/ath12k/hw.h

reviewed

··· 1 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 2 /* 3 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 7 7 #ifndef ATH12K_HW_H ··· 97 97 #define ATH12K_REGDB_FILE_NAME "regdb.bin" 98 98 99 99 #define ATH12K_PCIE_MAX_PAYLOAD_SIZE 128 100 100 + #define ATH12K_IPQ5332_USERPD_ID 1 100 101 101 102 enum ath12k_hw_rate_cck { 102 103 ATH12K_HW_RATE_CCK_LP_11M = 0, ··· 122 121 123 122 enum ath12k_bus { 124 123 ATH12K_BUS_PCI, 124 124 + ATH12K_BUS_AHB, 125 125 }; 126 126 127 127 #define ATH12K_EXT_IRQ_GRP_NUM_MAX 11 ··· 148 146 u32 wbm2sw_cc_enable; 149 147 }; 150 148 149 149 + enum ath12k_m3_fw_loaders { 150 150 + ath12k_m3_fw_loader_driver, 151 151 + ath12k_m3_fw_loader_remoteproc, 152 152 + }; 153 153 + 151 154 struct ath12k_hw_params { 152 155 const char *name; 153 156 u16 hw_rev; ··· 161 154 const char *dir; 162 155 size_t board_size; 163 156 size_t cal_offset; 157 157 + enum ath12k_m3_fw_loaders m3_loader; 164 158 } fw; 165 159 166 160 u8 max_radios; ··· 198 190 bool reoq_lut_support:1; 199 191 bool supports_shadow_regs:1; 200 192 bool supports_aspm:1; 193 193 + bool current_cc_support:1; 201 194 202 195 u32 num_tcl_banks; 203 196 u32 max_tx_ring; ··· 229 220 bool supports_dynamic_smps_6ghz; 230 221 231 222 u32 iova_mask; 223 223 + 224 224 + const struct ce_ie_addr *ce_ie_addr; 225 225 + const struct ce_remap *ce_remap; 226 226 + u32 bdf_addr_offset; 227 227 + 228 228 + /* setup REO queue, frag etc only for primary link peer */ 229 229 + bool dp_primary_link_only:1; 232 230 }; 233 231 234 232 struct ath12k_hw_ops { ··· 309 293 u32 hal_tcl1_ring_msi1_base_msb; 310 294 u32 hal_tcl1_ring_msi1_data; 311 295 u32 hal_tcl_ring_base_lsb; 296 296 + u32 hal_tcl1_ring_base_lsb; 297 297 + u32 hal_tcl1_ring_base_msb; 298 298 + u32 hal_tcl2_ring_base_lsb; 312 299 313 300 u32 hal_tcl_status_ring_base_lsb; 301 301 + 302 302 + u32 hal_reo1_qdesc_addr; 303 303 + u32 hal_reo1_qdesc_max_peerid; 314 304 315 305 u32 hal_wbm_idle_ring_base_lsb; 316 306 u32 hal_wbm_idle_ring_misc_addr; ··· 337 315 338 316 u32 pcie_qserdes_sysclk_en_sel; 339 317 u32 pcie_pcs_osc_dtct_config_base; 318 318 + 319 319 + u32 hal_umac_ce0_src_reg_base; 320 320 + u32 hal_umac_ce0_dest_reg_base; 321 321 + u32 hal_umac_ce1_src_reg_base; 322 322 + u32 hal_umac_ce1_dest_reg_base; 340 323 341 324 u32 hal_ppe_rel_ring_base; 342 325

+560 -257

drivers/net/wireless/ath/ath12k/mac.c

reviewed

··· 582 582 583 583 static struct ath12k_link_vif *ath12k_mac_get_tx_arvif(struct ath12k_link_vif *arvif) 584 584 { 585 585 + struct ieee80211_bss_conf *link_conf, *tx_bss_conf; 586 586 + struct ath12k *ar = arvif->ar; 585 587 struct ath12k_vif *tx_ahvif; 586 588 587 587 - if (arvif->ahvif->vif->mbssid_tx_vif) { 588 588 - tx_ahvif = ath12k_vif_to_ahvif(arvif->ahvif->vif->mbssid_tx_vif); 589 589 - if (tx_ahvif) 590 590 - return &tx_ahvif->deflink; 589 589 + lockdep_assert_wiphy(ath12k_ar_to_hw(ar)->wiphy); 590 590 + 591 591 + link_conf = ath12k_mac_get_link_bss_conf(arvif); 592 592 + if (!link_conf) { 593 593 + ath12k_warn(ar->ab, 594 594 + "unable to access bss link conf for link %u required to retrieve transmitting link conf\n", 595 595 + arvif->link_id); 596 596 + return NULL; 597 597 + } 598 598 + 599 599 + tx_bss_conf = wiphy_dereference(ath12k_ar_to_hw(ar)->wiphy, 600 600 + link_conf->tx_bss_conf); 601 601 + if (tx_bss_conf) { 602 602 + tx_ahvif = ath12k_vif_to_ahvif(tx_bss_conf->vif); 603 603 + return wiphy_dereference(tx_ahvif->ah->hw->wiphy, 604 604 + tx_ahvif->link[tx_bss_conf->link_id]); 591 605 } 592 606 593 607 return NULL; ··· 888 874 { 889 875 switch (band1) { 890 876 case NL80211_BAND_2GHZ: 891 891 - if (band2 & WMI_HOST_WLAN_2G_CAP) 877 877 + if (band2 & WMI_HOST_WLAN_2GHZ_CAP) 892 878 return true; 893 879 break; 894 880 case NL80211_BAND_5GHZ: 895 881 case NL80211_BAND_6GHZ: 896 896 - if (band2 & WMI_HOST_WLAN_5G_CAP) 882 882 + if (band2 & WMI_HOST_WLAN_5GHZ_CAP) 897 883 return true; 898 884 break; 899 885 default: ··· 994 980 ath12k_dbg(ar->ab, ATH12K_DBG_MAC, "txpower to set in hw %d\n", 995 981 txpower / 2); 996 982 997 997 - if ((pdev->cap.supported_bands & WMI_HOST_WLAN_2G_CAP) && 983 983 + if ((pdev->cap.supported_bands & WMI_HOST_WLAN_2GHZ_CAP) && 998 984 ar->txpower_limit_2g != txpower) { 999 985 param = WMI_PDEV_PARAM_TXPOWER_LIMIT2G; 1000 986 ret = ath12k_wmi_pdev_set_param(ar, param, ··· 1004 990 ar->txpower_limit_2g = txpower; 1005 991 } 1006 992 1007 1007 - if ((pdev->cap.supported_bands & WMI_HOST_WLAN_5G_CAP) && 993 993 + if ((pdev->cap.supported_bands & WMI_HOST_WLAN_5GHZ_CAP) && 1008 994 ar->txpower_limit_5g != txpower) { 1009 995 param = WMI_PDEV_PARAM_TXPOWER_LIMIT5G; 1010 996 ret = ath12k_wmi_pdev_set_param(ar, param, ··· 1259 1245 return ret; 1260 1246 } 1261 1247 1262 1262 - static int ath12k_mac_monitor_vdev_create(struct ath12k *ar) 1263 1263 - { 1264 1264 - struct ath12k_pdev *pdev = ar->pdev; 1265 1265 - struct ath12k_wmi_vdev_create_arg arg = {}; 1266 1266 - int bit, ret; 1267 1267 - u8 tmp_addr[6]; 1268 1268 - 1269 1269 - lockdep_assert_wiphy(ath12k_ar_to_hw(ar)->wiphy); 1270 1270 - 1271 1271 - if (ar->monitor_vdev_created) 1272 1272 - return 0; 1273 1273 - 1274 1274 - if (ar->ab->free_vdev_map == 0) { 1275 1275 - ath12k_warn(ar->ab, "failed to find free vdev id for monitor vdev\n"); 1276 1276 - return -ENOMEM; 1277 1277 - } 1278 1278 - 1279 1279 - bit = __ffs64(ar->ab->free_vdev_map); 1280 1280 - 1281 1281 - ar->monitor_vdev_id = bit; 1282 1282 - 1283 1283 - arg.if_id = ar->monitor_vdev_id; 1284 1284 - arg.type = WMI_VDEV_TYPE_MONITOR; 1285 1285 - arg.subtype = WMI_VDEV_SUBTYPE_NONE; 1286 1286 - arg.pdev_id = pdev->pdev_id; 1287 1287 - arg.if_stats_id = ATH12K_INVAL_VDEV_STATS_ID; 1288 1288 - 1289 1289 - if (pdev->cap.supported_bands & WMI_HOST_WLAN_2G_CAP) { 1290 1290 - arg.chains[NL80211_BAND_2GHZ].tx = ar->num_tx_chains; 1291 1291 - arg.chains[NL80211_BAND_2GHZ].rx = ar->num_rx_chains; 1292 1292 - } 1293 1293 - 1294 1294 - if (pdev->cap.supported_bands & WMI_HOST_WLAN_5G_CAP) { 1295 1295 - arg.chains[NL80211_BAND_5GHZ].tx = ar->num_tx_chains; 1296 1296 - arg.chains[NL80211_BAND_5GHZ].rx = ar->num_rx_chains; 1297 1297 - } 1298 1298 - 1299 1299 - ret = ath12k_wmi_vdev_create(ar, tmp_addr, &arg); 1300 1300 - if (ret) { 1301 1301 - ath12k_warn(ar->ab, "failed to request monitor vdev %i creation: %d\n", 1302 1302 - ar->monitor_vdev_id, ret); 1303 1303 - ar->monitor_vdev_id = -1; 1304 1304 - return ret; 1305 1305 - } 1306 1306 - 1307 1307 - ar->allocated_vdev_map |= 1LL << ar->monitor_vdev_id; 1308 1308 - ar->ab->free_vdev_map &= ~(1LL << ar->monitor_vdev_id); 1309 1309 - ar->num_created_vdevs++; 1310 1310 - ar->monitor_vdev_created = true; 1311 1311 - ath12k_dbg(ar->ab, ATH12K_DBG_MAC, "mac monitor vdev %d created\n", 1312 1312 - ar->monitor_vdev_id); 1313 1313 - 1314 1314 - return 0; 1315 1315 - } 1316 1316 - 1317 1248 static int ath12k_mac_monitor_vdev_delete(struct ath12k *ar) 1318 1249 { 1319 1250 int ret; ··· 1295 1336 return ret; 1296 1337 } 1297 1338 1298 1298 - static void 1299 1299 - ath12k_mac_get_any_chandef_iter(struct ieee80211_hw *hw, 1300 1300 - struct ieee80211_chanctx_conf *conf, 1301 1301 - void *data) 1302 1302 - { 1303 1303 - struct cfg80211_chan_def **def = data; 1304 1304 - 1305 1305 - *def = &conf->def; 1306 1306 - } 1307 1307 - 1308 1339 static int ath12k_mac_monitor_start(struct ath12k *ar) 1309 1340 { 1310 1310 - struct cfg80211_chan_def *chandef = NULL; 1341 1341 + struct ath12k_mac_get_any_chanctx_conf_arg arg; 1311 1342 int ret; 1312 1343 1313 1344 lockdep_assert_wiphy(ath12k_ar_to_hw(ar)->wiphy); ··· 1305 1356 if (ar->monitor_started) 1306 1357 return 0; 1307 1358 1359 1359 + arg.ar = ar; 1360 1360 + arg.chanctx_conf = NULL; 1308 1361 ieee80211_iter_chan_contexts_atomic(ath12k_ar_to_hw(ar), 1309 1309 - ath12k_mac_get_any_chandef_iter, 1310 1310 - &chandef); 1311 1311 - if (!chandef) 1362 1362 + ath12k_mac_get_any_chanctx_conf_iter, 1363 1363 + &arg); 1364 1364 + if (!arg.chanctx_conf) 1312 1365 return 0; 1313 1366 1314 1314 - ret = ath12k_mac_monitor_vdev_start(ar, ar->monitor_vdev_id, chandef); 1367 1367 + ret = ath12k_mac_monitor_vdev_start(ar, ar->monitor_vdev_id, 1368 1368 + &arg.chanctx_conf->def); 1315 1369 if (ret) { 1316 1370 ath12k_warn(ar->ab, "failed to start monitor vdev: %d\n", ret); 1317 1317 - ath12k_mac_monitor_vdev_delete(ar); 1371 1371 + return ret; 1372 1372 + } 1373 1373 + 1374 1374 + ret = ath12k_dp_tx_htt_monitor_mode_ring_config(ar, false); 1375 1375 + if (ret) { 1376 1376 + ath12k_warn(ar->ab, "fail to set monitor filter: %d\n", ret); 1318 1377 return ret; 1319 1378 } 1320 1379 1321 1380 ar->monitor_started = true; 1322 1381 ar->num_started_vdevs++; 1323 1323 - ret = ath12k_dp_tx_htt_monitor_mode_ring_config(ar, false); 1324 1324 - ath12k_dbg(ar->ab, ATH12K_DBG_MAC, "mac monitor started ret %d\n", ret); 1325 1382 1326 1326 - return ret; 1383 1383 + ath12k_dbg(ar->ab, ATH12K_DBG_MAC, "mac monitor started\n"); 1384 1384 + 1385 1385 + return 0; 1327 1386 } 1328 1387 1329 1388 static int ath12k_mac_monitor_stop(struct ath12k *ar) ··· 1397 1440 return ret; 1398 1441 } 1399 1442 1400 1400 - static int ath12k_mac_config(struct ath12k *ar, u32 changed) 1401 1401 - { 1402 1402 - struct ieee80211_hw *hw = ath12k_ar_to_hw(ar); 1403 1403 - struct ieee80211_conf *conf = &hw->conf; 1404 1404 - int ret = 0; 1405 1405 - 1406 1406 - lockdep_assert_wiphy(hw->wiphy); 1407 1407 - 1408 1408 - if (changed & IEEE80211_CONF_CHANGE_MONITOR) { 1409 1409 - ar->monitor_conf_enabled = conf->flags & IEEE80211_CONF_MONITOR; 1410 1410 - if (ar->monitor_conf_enabled) { 1411 1411 - if (ar->monitor_vdev_created) 1412 1412 - return ret; 1413 1413 - ret = ath12k_mac_monitor_vdev_create(ar); 1414 1414 - if (ret) 1415 1415 - return ret; 1416 1416 - ret = ath12k_mac_monitor_start(ar); 1417 1417 - if (ret) 1418 1418 - goto err_mon_del; 1419 1419 - } else { 1420 1420 - if (!ar->monitor_vdev_created) 1421 1421 - return ret; 1422 1422 - ret = ath12k_mac_monitor_stop(ar); 1423 1423 - if (ret) 1424 1424 - return ret; 1425 1425 - ath12k_mac_monitor_vdev_delete(ar); 1426 1426 - } 1427 1427 - } 1428 1428 - 1429 1429 - return ret; 1430 1430 - 1431 1431 - err_mon_del: 1432 1432 - ath12k_mac_monitor_vdev_delete(ar); 1433 1433 - return ret; 1434 1434 - } 1435 1435 - 1436 1443 static int ath12k_mac_op_config(struct ieee80211_hw *hw, u32 changed) 1437 1444 { 1438 1438 - struct ath12k_hw *ah = ath12k_hw_to_ah(hw); 1439 1439 - struct ath12k *ar; 1440 1440 - int ret; 1441 1441 - 1442 1442 - lockdep_assert_wiphy(hw->wiphy); 1443 1443 - 1444 1444 - ar = ath12k_ah_to_ar(ah, 0); 1445 1445 - 1446 1446 - ret = ath12k_mac_config(ar, changed); 1447 1447 - if (ret) 1448 1448 - ath12k_warn(ar->ab, "failed to update config pdev idx %d: %d\n", 1449 1449 - ar->pdev_idx, ret); 1450 1450 - 1451 1451 - return ret; 1445 1445 + return 0; 1452 1446 } 1453 1447 1454 1448 static int ath12k_mac_setup_bcn_p2p_ie(struct ath12k_link_vif *arvif, ··· 3285 3377 if (ret) 3286 3378 ath12k_warn(ar->ab, "failed to set vdev %i OBSS PD parameters: %d\n", 3287 3379 arvif->vdev_id, ret); 3380 3380 + 3381 3381 + if (test_bit(WMI_TLV_SERVICE_11D_OFFLOAD, ar->ab->wmi_ab.svc_map) && 3382 3382 + ahvif->vdev_type == WMI_VDEV_TYPE_STA && 3383 3383 + ahvif->vdev_subtype == WMI_VDEV_SUBTYPE_NONE) 3384 3384 + ath12k_mac_11d_scan_stop_all(ar->ab); 3288 3385 } 3289 3386 3290 3387 static void ath12k_bss_disassoc(struct ath12k *ar, ··· 3363 3450 } 3364 3451 3365 3452 sband = hw->wiphy->bands[def->chan->band]; 3366 3366 - basic_rate_idx = ffs(bss_conf->basic_rates) - 1; 3453 3453 + if (bss_conf->basic_rates) 3454 3454 + basic_rate_idx = __ffs(bss_conf->basic_rates); 3455 3455 + else 3456 3456 + basic_rate_idx = 0; 3367 3457 bitrate = sband->bitrates[basic_rate_idx].bitrate; 3368 3458 3369 3459 hw_rate_code = ath12k_mac_get_rate_hw_value(bitrate); ··· 3411 3495 arvif->ahvif = ahvif; 3412 3496 arvif->link_id = _link_id; 3413 3497 3498 3498 + /* Protects the datapath stats update on a per link basis */ 3499 3499 + spin_lock_init(&arvif->link_stats_lock); 3500 3500 + 3414 3501 INIT_LIST_HEAD(&arvif->list); 3415 3502 INIT_DELAYED_WORK(&arvif->connection_loss_work, 3416 3503 ath12k_mac_vif_sta_connection_loss_work); ··· 3453 3534 ath12k_dbg(ar->ab, ATH12K_DBG_MAC, "mac remove link interface (vdev %d link id %d)", 3454 3535 arvif->vdev_id, arvif->link_id); 3455 3536 3537 3537 + if (test_bit(WMI_TLV_SERVICE_11D_OFFLOAD, ar->ab->wmi_ab.svc_map) && 3538 3538 + ahvif->vdev_type == WMI_VDEV_TYPE_STA && 3539 3539 + ahvif->vdev_subtype == WMI_VDEV_SUBTYPE_NONE) 3540 3540 + ath12k_mac_11d_scan_stop(ar); 3541 3541 + 3456 3542 if (ahvif->vdev_type == WMI_VDEV_TYPE_AP) { 3457 3543 ret = ath12k_peer_delete(ar, arvif->vdev_id, arvif->bssid); 3458 3544 if (ret) ··· 3491 3567 */ 3492 3568 if (!ahvif->links_map && link_id != ATH12K_DEFAULT_SCAN_LINK) { 3493 3569 arvif = &ahvif->deflink; 3570 3570 + if (vif->type == NL80211_IFTYPE_STATION) 3571 3571 + arvif->is_sta_assoc_link = true; 3494 3572 } else { 3495 3573 arvif = (struct ath12k_link_vif *) 3496 3574 kzalloc(sizeof(struct ath12k_link_vif), GFP_KERNEL); ··· 3628 3702 unsigned long links = ahvif->links_map; 3629 3703 struct ieee80211_bss_conf *info; 3630 3704 struct ath12k_link_vif *arvif; 3705 3705 + struct ieee80211_sta *sta; 3706 3706 + struct ath12k_sta *ahsta; 3631 3707 struct ath12k *ar; 3632 3708 u8 link_id; 3633 3709 ··· 3642 3714 } 3643 3715 3644 3716 if (changed & BSS_CHANGED_ASSOC) { 3717 3717 + if (vif->cfg.assoc) { 3718 3718 + /* only in station mode we can get here, so it's safe 3719 3719 + * to use ap_addr 3720 3720 + */ 3721 3721 + rcu_read_lock(); 3722 3722 + sta = ieee80211_find_sta(vif, vif->cfg.ap_addr); 3723 3723 + if (!sta) { 3724 3724 + rcu_read_unlock(); 3725 3725 + WARN_ONCE(1, "failed to find sta with addr %pM\n", 3726 3726 + vif->cfg.ap_addr); 3727 3727 + return; 3728 3728 + } 3729 3729 + 3730 3730 + ahsta = ath12k_sta_to_ahsta(sta); 3731 3731 + arvif = wiphy_dereference(hw->wiphy, 3732 3732 + ahvif->link[ahsta->assoc_link_id]); 3733 3733 + rcu_read_unlock(); 3734 3734 + 3735 3735 + ar = arvif->ar; 3736 3736 + /* there is no reason for which an assoc link's 3737 3737 + * bss info does not exist 3738 3738 + */ 3739 3739 + info = ath12k_mac_get_link_bss_conf(arvif); 3740 3740 + ath12k_bss_assoc(ar, arvif, info); 3741 3741 + 3742 3742 + /* exclude assoc link as it is done above */ 3743 3743 + links &= ~BIT(ahsta->assoc_link_id); 3744 3744 + } 3745 3745 + 3645 3746 for_each_set_bit(link_id, &links, IEEE80211_MLD_MAX_NUM_LINKS) { 3646 3747 arvif = wiphy_dereference(hw->wiphy, ahvif->link[link_id]); 3647 3748 if (!arvif || !arvif->ar) ··· 3940 3983 band = def.chan->band; 3941 3984 mcast_rate = info->mcast_rate[band]; 3942 3985 3943 3943 - if (mcast_rate > 0) 3986 3986 + if (mcast_rate > 0) { 3944 3987 rateidx = mcast_rate - 1; 3945 3945 - else 3946 3946 - rateidx = ffs(info->basic_rates) - 1; 3988 3988 + } else { 3989 3989 + if (info->basic_rates) 3990 3990 + rateidx = __ffs(info->basic_rates); 3991 3991 + else 3992 3992 + rateidx = 0; 3993 3993 + } 3947 3994 3948 3948 - if (ar->pdev->cap.supported_bands & WMI_HOST_WLAN_5G_CAP) 3995 3995 + if (ar->pdev->cap.supported_bands & WMI_HOST_WLAN_5GHZ_CAP) 3949 3996 rateidx += ATH12K_MAC_FIRST_OFDM_RATE_IDX; 3950 3997 3951 3998 bitrate = ath12k_legacy_rates[rateidx].bitrate; ··· 4123 4162 * split the hw request and perform multiple scans 4124 4163 */ 4125 4164 4126 4126 - if (center_freq < ATH12K_MIN_5G_FREQ) 4165 4165 + if (center_freq < ATH12K_MIN_5GHZ_FREQ) 4127 4166 band = NL80211_BAND_2GHZ; 4128 4128 - else if (center_freq < ATH12K_MIN_6G_FREQ) 4167 4167 + else if (center_freq < ATH12K_MIN_6GHZ_FREQ) 4129 4168 band = NL80211_BAND_5GHZ; 4130 4169 else 4131 4170 band = NL80211_BAND_6GHZ; ··· 4155 4194 fallthrough; 4156 4195 case ATH12K_SCAN_STARTING: 4157 4196 cancel_delayed_work(&ar->scan.timeout); 4158 4158 - complete(&ar->scan.completed); 4197 4197 + complete_all(&ar->scan.completed); 4159 4198 wiphy_work_queue(ar->ah->hw->wiphy, &ar->scan.vdev_clean_wk); 4160 4199 break; 4161 4200 } ··· 4337 4376 return 0; 4338 4377 } 4339 4378 4379 4379 + int ath12k_mac_get_fw_stats(struct ath12k *ar, 4380 4380 + struct ath12k_fw_stats_req_params *param) 4381 4381 + { 4382 4382 + struct ath12k_base *ab = ar->ab; 4383 4383 + struct ath12k_hw *ah = ath12k_ar_to_ah(ar); 4384 4384 + unsigned long timeout, time_left; 4385 4385 + int ret; 4386 4386 + 4387 4387 + guard(mutex)(&ah->hw_mutex); 4388 4388 + 4389 4389 + if (ah->state != ATH12K_HW_STATE_ON) 4390 4390 + return -ENETDOWN; 4391 4391 + 4392 4392 + /* FW stats can get split when exceeding the stats data buffer limit. 4393 4393 + * In that case, since there is no end marking for the back-to-back 4394 4394 + * received 'update stats' event, we keep a 3 seconds timeout in case, 4395 4395 + * fw_stats_done is not marked yet 4396 4396 + */ 4397 4397 + timeout = jiffies + msecs_to_jiffies(3 * 1000); 4398 4398 + ath12k_fw_stats_reset(ar); 4399 4399 + 4400 4400 + reinit_completion(&ar->fw_stats_complete); 4401 4401 + 4402 4402 + ret = ath12k_wmi_send_stats_request_cmd(ar, param->stats_id, 4403 4403 + param->vdev_id, param->pdev_id); 4404 4404 + 4405 4405 + if (ret) { 4406 4406 + ath12k_warn(ab, "failed to request fw stats: %d\n", ret); 4407 4407 + return ret; 4408 4408 + } 4409 4409 + 4410 4410 + ath12k_dbg(ab, ATH12K_DBG_WMI, 4411 4411 + "get fw stat pdev id %d vdev id %d stats id 0x%x\n", 4412 4412 + param->pdev_id, param->vdev_id, param->stats_id); 4413 4413 + 4414 4414 + time_left = wait_for_completion_timeout(&ar->fw_stats_complete, 1 * HZ); 4415 4415 + 4416 4416 + if (!time_left) { 4417 4417 + ath12k_warn(ab, "time out while waiting for get fw stats\n"); 4418 4418 + return -ETIMEDOUT; 4419 4419 + } 4420 4420 + 4421 4421 + /* Firmware sends WMI_UPDATE_STATS_EVENTID back-to-back 4422 4422 + * when stats data buffer limit is reached. fw_stats_complete 4423 4423 + * is completed once host receives first event from firmware, but 4424 4424 + * still end might not be marked in the TLV. 4425 4425 + * Below loop is to confirm that firmware completed sending all the event 4426 4426 + * and fw_stats_done is marked true when end is marked in the TLV. 4427 4427 + */ 4428 4428 + for (;;) { 4429 4429 + if (time_after(jiffies, timeout)) 4430 4430 + break; 4431 4431 + spin_lock_bh(&ar->data_lock); 4432 4432 + if (ar->fw_stats.fw_stats_done) { 4433 4433 + spin_unlock_bh(&ar->data_lock); 4434 4434 + break; 4435 4435 + } 4436 4436 + spin_unlock_bh(&ar->data_lock); 4437 4437 + } 4438 4438 + return 0; 4439 4439 + } 4440 4440 + 4441 4441 + static int ath12k_mac_op_get_txpower(struct ieee80211_hw *hw, 4442 4442 + struct ieee80211_vif *vif, 4443 4443 + unsigned int link_id, 4444 4444 + int *dbm) 4445 4445 + { 4446 4446 + struct ath12k_vif *ahvif = ath12k_vif_to_ahvif(vif); 4447 4447 + struct ath12k_fw_stats_req_params params = {}; 4448 4448 + struct ath12k_fw_stats_pdev *pdev; 4449 4449 + struct ath12k_hw *ah = hw->priv; 4450 4450 + struct ath12k_link_vif *arvif; 4451 4451 + struct ath12k_base *ab; 4452 4452 + struct ath12k *ar; 4453 4453 + int ret; 4454 4454 + 4455 4455 + /* Final Tx power is minimum of Target Power, CTL power, Regulatory 4456 4456 + * Power, PSD EIRP Power. We just know the Regulatory power from the 4457 4457 + * regulatory rules obtained. FW knows all these power and sets the min 4458 4458 + * of these. Hence, we request the FW pdev stats in which FW reports 4459 4459 + * the minimum of all vdev's channel Tx power. 4460 4460 + */ 4461 4461 + lockdep_assert_wiphy(hw->wiphy); 4462 4462 + 4463 4463 + arvif = wiphy_dereference(ah->hw->wiphy, ahvif->link[link_id]); 4464 4464 + if (!arvif || !arvif->ar) 4465 4465 + return -EINVAL; 4466 4466 + 4467 4467 + ar = arvif->ar; 4468 4468 + ab = ar->ab; 4469 4469 + if (ah->state != ATH12K_HW_STATE_ON) 4470 4470 + goto err_fallback; 4471 4471 + 4472 4472 + if (test_bit(ATH12K_FLAG_CAC_RUNNING, &ar->dev_flags)) 4473 4473 + return -EAGAIN; 4474 4474 + 4475 4475 + /* Limit the requests to Firmware for fetching the tx power */ 4476 4476 + if (ar->chan_tx_pwr != ATH12K_PDEV_TX_POWER_INVALID && 4477 4477 + time_before(jiffies, 4478 4478 + msecs_to_jiffies(ATH12K_PDEV_TX_POWER_REFRESH_TIME_MSECS) + 4479 4479 + ar->last_tx_power_update)) 4480 4480 + goto send_tx_power; 4481 4481 + 4482 4482 + params.pdev_id = ar->pdev->pdev_id; 4483 4483 + params.vdev_id = arvif->vdev_id; 4484 4484 + params.stats_id = WMI_REQUEST_PDEV_STAT; 4485 4485 + ret = ath12k_mac_get_fw_stats(ar, &params); 4486 4486 + if (ret) { 4487 4487 + ath12k_warn(ab, "failed to request fw pdev stats: %d\n", ret); 4488 4488 + goto err_fallback; 4489 4489 + } 4490 4490 + 4491 4491 + spin_lock_bh(&ar->data_lock); 4492 4492 + pdev = list_first_entry_or_null(&ar->fw_stats.pdevs, 4493 4493 + struct ath12k_fw_stats_pdev, list); 4494 4494 + if (!pdev) { 4495 4495 + spin_unlock_bh(&ar->data_lock); 4496 4496 + goto err_fallback; 4497 4497 + } 4498 4498 + 4499 4499 + /* tx power reported by firmware is in units of 0.5 dBm */ 4500 4500 + ar->chan_tx_pwr = pdev->chan_tx_power / 2; 4501 4501 + spin_unlock_bh(&ar->data_lock); 4502 4502 + ar->last_tx_power_update = jiffies; 4503 4503 + 4504 4504 + send_tx_power: 4505 4505 + *dbm = ar->chan_tx_pwr; 4506 4506 + ath12k_dbg(ar->ab, ATH12K_DBG_MAC, "txpower fetched from firmware %d dBm\n", 4507 4507 + *dbm); 4508 4508 + return 0; 4509 4509 + 4510 4510 + err_fallback: 4511 4511 + /* We didn't get txpower from FW. Hence, relying on vif->bss_conf.txpower */ 4512 4512 + *dbm = vif->bss_conf.txpower; 4513 4513 + ath12k_dbg(ar->ab, ATH12K_DBG_MAC, "txpower from firmware NaN, reported %d dBm\n", 4514 4514 + *dbm); 4515 4515 + return 0; 4516 4516 + } 4517 4517 + 4340 4518 static u8 4341 4519 ath12k_mac_find_link_id_by_ar(struct ath12k_vif *ahvif, struct ath12k *ar) 4342 4520 { ··· 4529 4429 return -EINVAL; 4530 4430 4531 4431 /* check if any of the links of ML VIF is already started on 4532 4532 - * radio(ar) correpsondig to given scan frequency and use it, 4432 4432 + * radio(ar) corresponding to given scan frequency and use it, 4533 4433 * if not use scan link (link 15) for scan purpose. 4534 4434 */ 4535 4435 link_id = ath12k_mac_find_link_id_by_ar(ahvif, ar); ··· 4638 4538 4639 4539 ret = ath12k_start_scan(ar, arg); 4640 4540 if (ret) { 4641 4641 - ath12k_warn(ar->ab, "failed to start hw scan: %d\n", ret); 4541 4541 + if (ret == -EBUSY) 4542 4542 + ath12k_dbg(ar->ab, ATH12K_DBG_MAC, 4543 4543 + "scan engine is busy 11d state %d\n", ar->state_11d); 4544 4544 + else 4545 4545 + ath12k_warn(ar->ab, "failed to start hw scan: %d\n", ret); 4546 4546 + 4642 4547 spin_lock_bh(&ar->data_lock); 4643 4548 ar->scan.state = ATH12K_SCAN_IDLE; 4644 4549 spin_unlock_bh(&ar->data_lock); ··· 4669 4564 kfree(arg->extraie.ptr); 4670 4565 kfree(arg); 4671 4566 } 4567 4567 + 4568 4568 + if (ar->state_11d == ATH12K_11D_PREPARING && 4569 4569 + ahvif->vdev_type == WMI_VDEV_TYPE_STA && 4570 4570 + ahvif->vdev_subtype == WMI_VDEV_SUBTYPE_NONE) 4571 4571 + ath12k_mac_11d_scan_start(ar, arvif->vdev_id); 4672 4572 4673 4573 return ret; 4674 4574 } ··· 4715 4605 .macaddr = macaddr, 4716 4606 }; 4717 4607 struct ath12k_vif *ahvif = arvif->ahvif; 4718 4718 - struct ieee80211_vif *vif = ath12k_ahvif_to_vif(ahvif); 4719 4608 4720 4609 lockdep_assert_wiphy(ath12k_ar_to_hw(ar)->wiphy); 4721 4610 ··· 4733 4624 4734 4625 switch (key->cipher) { 4735 4626 case WLAN_CIPHER_SUITE_CCMP: 4627 4627 + case WLAN_CIPHER_SUITE_CCMP_256: 4736 4628 arg.key_cipher = WMI_CIPHER_AES_CCM; 4737 4737 - /* TODO: Re-check if flag is valid */ 4738 4629 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV_MGMT; 4739 4630 break; 4740 4631 case WLAN_CIPHER_SUITE_TKIP: ··· 4742 4633 arg.key_txmic_len = 8; 4743 4634 arg.key_rxmic_len = 8; 4744 4635 break; 4745 4745 - case WLAN_CIPHER_SUITE_CCMP_256: 4746 4746 - arg.key_cipher = WMI_CIPHER_AES_CCM; 4747 4747 - break; 4748 4636 case WLAN_CIPHER_SUITE_GCMP: 4749 4637 case WLAN_CIPHER_SUITE_GCMP_256: 4750 4638 arg.key_cipher = WMI_CIPHER_AES_GCM; 4639 4639 + key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV_MGMT; 4751 4640 break; 4752 4641 default: 4753 4642 ath12k_warn(ar->ab, "cipher %d is not supported\n", key->cipher); ··· 4765 4658 if (!wait_for_completion_timeout(&ar->install_key_done, 1 * HZ)) 4766 4659 return -ETIMEDOUT; 4767 4660 4768 4768 - if (ether_addr_equal(macaddr, vif->addr)) 4661 4661 + if (ether_addr_equal(macaddr, arvif->bssid)) 4769 4662 ahvif->key_cipher = key->cipher; 4770 4663 4771 4664 return ar->install_key_status ? -EINVAL : 0; ··· 5631 5524 ar->max_num_stations); 5632 5525 goto exit; 5633 5526 } 5634 5634 - arsta->rx_stats = kzalloc(sizeof(*arsta->rx_stats), GFP_KERNEL); 5635 5635 - if (!arsta->rx_stats) { 5636 5636 - ret = -ENOMEM; 5637 5637 - goto dec_num_station; 5527 5527 + 5528 5528 + if (ath12k_debugfs_is_extd_rx_stats_enabled(ar) && !arsta->rx_stats) { 5529 5529 + arsta->rx_stats = kzalloc(sizeof(*arsta->rx_stats), GFP_KERNEL); 5530 5530 + if (!arsta->rx_stats) { 5531 5531 + ret = -ENOMEM; 5532 5532 + goto dec_num_station; 5533 5533 + } 5638 5534 } 5639 5535 5640 5536 peer_param.vdev_id = arvif->vdev_id; ··· 5912 5802 * link sta 5913 5803 */ 5914 5804 if (sta->mlo) { 5805 5805 + /* For station mode, arvif->is_sta_assoc_link has been set when 5806 5806 + * vdev starts. Make sure the arvif/arsta pair have same setting 5807 5807 + */ 5808 5808 + if (vif->type == NL80211_IFTYPE_STATION && 5809 5809 + !arsta->arvif->is_sta_assoc_link) { 5810 5810 + ath12k_hw_warn(ah, "failed to verify assoc link setting with link id %u\n", 5811 5811 + link_id); 5812 5812 + ret = -EINVAL; 5813 5813 + goto exit; 5814 5814 + } 5815 5815 + 5915 5816 arsta->is_assoc_link = true; 5916 5817 ahsta->assoc_link_id = link_id; 5917 5818 } ··· 6596 6475 rate_cap_tx_chainmask = ar->cfg_tx_chainmask >> cap->tx_chain_mask_shift; 6597 6476 rate_cap_rx_chainmask = ar->cfg_rx_chainmask >> cap->rx_chain_mask_shift; 6598 6477 6599 6599 - if (cap->supported_bands & WMI_HOST_WLAN_2G_CAP) { 6478 6478 + if (cap->supported_bands & WMI_HOST_WLAN_2GHZ_CAP) { 6600 6479 band = &ar->mac.sbands[NL80211_BAND_2GHZ]; 6601 6480 ht_cap = cap->band[NL80211_BAND_2GHZ].ht_cap_info; 6602 6481 if (ht_cap_info) ··· 6605 6484 rate_cap_rx_chainmask); 6606 6485 } 6607 6486 6608 6608 - if (cap->supported_bands & WMI_HOST_WLAN_5G_CAP && 6487 6487 + if (cap->supported_bands & WMI_HOST_WLAN_5GHZ_CAP && 6609 6488 (ar->ab->hw_params->single_pdev_only || 6610 6489 !ar->supports_6ghz)) { 6611 6490 band = &ar->mac.sbands[NL80211_BAND_5GHZ]; ··· 6782 6661 6783 6662 switch (iftype) { 6784 6663 case NL80211_IFTYPE_AP: 6664 6664 + he_cap_elem->mac_cap_info[2] &= 6665 6665 + ~IEEE80211_HE_MAC_CAP2_BCAST_TWT; 6785 6666 he_cap_elem->phy_cap_info[3] &= 6786 6667 ~IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_MASK; 6787 6668 he_cap_elem->phy_cap_info[9] |= ··· 7016 6893 enum nl80211_band band; 7017 6894 int count; 7018 6895 7019 7019 - if (cap->supported_bands & WMI_HOST_WLAN_2G_CAP) { 6896 6896 + if (cap->supported_bands & WMI_HOST_WLAN_2GHZ_CAP) { 7020 6897 band = NL80211_BAND_2GHZ; 7021 6898 count = ath12k_mac_copy_sband_iftype_data(ar, cap, 7022 6899 ar->mac.iftype[band], ··· 7026 6903 count); 7027 6904 } 7028 6905 7029 7029 - if (cap->supported_bands & WMI_HOST_WLAN_5G_CAP) { 6906 6906 + if (cap->supported_bands & WMI_HOST_WLAN_5GHZ_CAP) { 7030 6907 band = NL80211_BAND_5GHZ; 7031 6908 count = ath12k_mac_copy_sband_iftype_data(ar, cap, 7032 6909 ar->mac.iftype[band], ··· 7036 6913 count); 7037 6914 } 7038 6915 7039 7039 - if (cap->supported_bands & WMI_HOST_WLAN_5G_CAP && 6916 6916 + if (cap->supported_bands & WMI_HOST_WLAN_5GHZ_CAP && 7040 6917 ar->supports_6ghz) { 7041 6918 band = NL80211_BAND_6GHZ; 7042 6919 count = ath12k_mac_copy_sband_iftype_data(ar, cap, ··· 7164 7041 { 7165 7042 struct ath12k_base *ab = ar->ab; 7166 7043 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 7044 7044 + struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb); 7167 7045 struct ieee80211_tx_info *info; 7046 7046 + enum hal_encrypt_type enctype; 7047 7047 + unsigned int mic_len; 7168 7048 dma_addr_t paddr; 7169 7049 int buf_id; 7170 7050 int ret; 7171 7051 7172 7052 lockdep_assert_wiphy(ath12k_ar_to_hw(ar)->wiphy); 7173 7053 7174 7174 - ATH12K_SKB_CB(skb)->ar = ar; 7054 7054 + skb_cb->ar = ar; 7175 7055 spin_lock_bh(&ar->txmgmt_idr_lock); 7176 7056 buf_id = idr_alloc(&ar->txmgmt_idr, skb, 0, 7177 7057 ATH12K_TX_MGMT_NUM_PENDING_MAX, GFP_ATOMIC); ··· 7183 7057 return -ENOSPC; 7184 7058 7185 7059 info = IEEE80211_SKB_CB(skb); 7186 7186 - if (!(info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP)) { 7060 7060 + if ((skb_cb->flags & ATH12K_SKB_CIPHER_SET) && 7061 7061 + !(info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP)) { 7187 7062 if ((ieee80211_is_action(hdr->frame_control) || 7188 7063 ieee80211_is_deauth(hdr->frame_control) || 7189 7064 ieee80211_is_disassoc(hdr->frame_control)) && 7190 7065 ieee80211_has_protected(hdr->frame_control)) { 7191 7191 - skb_put(skb, IEEE80211_CCMP_MIC_LEN); 7066 7066 + enctype = ath12k_dp_tx_get_encrypt_type(skb_cb->cipher); 7067 7067 + mic_len = ath12k_dp_rx_crypto_mic_len(ar, enctype); 7068 7068 + skb_put(skb, mic_len); 7192 7069 } 7193 7070 } 7194 7071 ··· 7202 7073 goto err_free_idr; 7203 7074 } 7204 7075 7205 7205 - ATH12K_SKB_CB(skb)->paddr = paddr; 7076 7076 + skb_cb->paddr = paddr; 7206 7077 7207 7078 ret = ath12k_wmi_mgmt_send(ar, arvif->vdev_id, buf_id, skb); 7208 7079 if (ret) { ··· 7213 7084 return 0; 7214 7085 7215 7086 err_unmap_buf: 7216 7216 - dma_unmap_single(ab->dev, ATH12K_SKB_CB(skb)->paddr, 7087 7087 + dma_unmap_single(ab->dev, skb_cb->paddr, 7217 7088 skb->len, DMA_TO_DEVICE); 7218 7089 err_free_idr: 7219 7090 spin_lock_bh(&ar->txmgmt_idr_lock); ··· 7472 7343 u8 link_id; 7473 7344 int ret; 7474 7345 7346 7346 + if (ahvif->vdev_type == WMI_VDEV_TYPE_MONITOR) { 7347 7347 + ieee80211_free_txskb(hw, skb); 7348 7348 + return; 7349 7349 + } 7350 7350 + 7475 7351 link_id = u32_get_bits(info->control.flags, IEEE80211_TX_CTRL_MLO_LINK); 7476 7352 memset(skb_cb, 0, sizeof(*skb_cb)); 7477 7353 skb_cb->vif = vif; ··· 7533 7399 7534 7400 if (!vif->valid_links || !is_mcast || 7535 7401 test_bit(ATH12K_FLAG_RAW_MODE, &ar->ab->dev_flags)) { 7536 7536 - ret = ath12k_dp_tx(ar, arvif, skb, false, 0); 7402 7402 + ret = ath12k_dp_tx(ar, arvif, skb, false, 0, is_mcast); 7537 7403 if (unlikely(ret)) { 7538 7404 ath12k_warn(ar->ab, "failed to transmit frame %d\n", ret); 7539 7405 ieee80211_free_txskb(ar->ah->hw, skb); ··· 7563 7429 info_flags); 7564 7430 7565 7431 skb_cb = ATH12K_SKB_CB(msdu_copied); 7566 7566 - info = IEEE80211_SKB_CB(msdu_copied); 7567 7432 skb_cb->link_id = link_id; 7568 7433 7569 7434 /* For open mode, skip peer find logic */ 7570 7570 - if (unlikely(ahvif->key_cipher == WMI_CIPHER_NONE)) 7435 7435 + if (unlikely(!ahvif->key_cipher)) 7571 7436 goto skip_peer_find; 7572 7437 7573 7438 spin_lock_bh(&tmp_ar->ab->base_lock); ··· 7585 7452 if (key) { 7586 7453 skb_cb->cipher = key->cipher; 7587 7454 skb_cb->flags |= ATH12K_SKB_CIPHER_SET; 7588 7588 - info->control.hw_key = key; 7589 7455 7590 7456 hdr = (struct ieee80211_hdr *)msdu_copied->data; 7591 7457 if (!ieee80211_has_protected(hdr->frame_control)) ··· 7595 7463 7596 7464 skip_peer_find: 7597 7465 ret = ath12k_dp_tx(tmp_ar, tmp_arvif, 7598 7598 - msdu_copied, true, mcbc_gsn); 7466 7466 + msdu_copied, true, mcbc_gsn, is_mcast); 7599 7467 if (unlikely(ret)) { 7600 7468 if (ret == -ENOMEM) { 7601 7469 /* Drops are expected during heavy multicast ··· 7681 7549 1, pdev->pdev_id); 7682 7550 7683 7551 if (ret) { 7684 7684 - ath12k_err(ab, "failed to enable PMF QOS: (%d\n", ret); 7552 7552 + ath12k_err(ab, "failed to enable PMF QOS: %d\n", ret); 7685 7553 goto err; 7686 7554 } 7687 7555 ··· 7726 7594 7727 7595 /* TODO: Do we need to enable ANI? */ 7728 7596 7729 7729 - ath12k_reg_update_chan_list(ar); 7597 7597 + ath12k_reg_update_chan_list(ar, false); 7730 7598 7731 7599 ar->num_started_vdevs = 0; 7732 7600 ar->num_created_vdevs = 0; 7733 7601 ar->num_peers = 0; 7734 7602 ar->allocated_vdev_map = 0; 7603 7603 + ar->chan_tx_pwr = ATH12K_PDEV_TX_POWER_INVALID; 7735 7604 7736 7605 /* Configure monitor status ring with default rx_filter to get rx status 7737 7606 * such as rssi, rx_duration. ··· 7914 7781 wiphy_work_cancel(ath12k_ar_to_hw(ar)->wiphy, &ar->scan.vdev_clean_wk); 7915 7782 cancel_work_sync(&ar->regd_update_work); 7916 7783 cancel_work_sync(&ar->ab->rfkill_work); 7784 7784 + cancel_work_sync(&ar->ab->update_11d_work); 7785 7785 + ar->state_11d = ATH12K_11D_IDLE; 7786 7786 + complete(&ar->completed_11d_scan); 7917 7787 7918 7788 spin_lock_bh(&ar->data_lock); 7919 7789 list_for_each_entry_safe(ppdu_stats, tmp, &ar->ppdu_stats_info, list) { ··· 8039 7903 return ret; 8040 7904 } 8041 7905 8042 8042 - if (pdev->cap.supported_bands & WMI_HOST_WLAN_2G_CAP) { 7906 7906 + if (pdev->cap.supported_bands & WMI_HOST_WLAN_2GHZ_CAP) { 8043 7907 arg->chains[NL80211_BAND_2GHZ].tx = ar->num_tx_chains; 8044 7908 arg->chains[NL80211_BAND_2GHZ].rx = ar->num_rx_chains; 8045 7909 } 8046 8046 - if (pdev->cap.supported_bands & WMI_HOST_WLAN_5G_CAP) { 7910 7910 + if (pdev->cap.supported_bands & WMI_HOST_WLAN_5GHZ_CAP) { 8047 7911 arg->chains[NL80211_BAND_5GHZ].tx = ar->num_tx_chains; 8048 7912 arg->chains[NL80211_BAND_5GHZ].rx = ar->num_rx_chains; 8049 7913 } 8050 8050 - if (pdev->cap.supported_bands & WMI_HOST_WLAN_5G_CAP && 7914 7914 + if (pdev->cap.supported_bands & WMI_HOST_WLAN_5GHZ_CAP && 8051 7915 ar->supports_6ghz) { 8052 7916 arg->chains[NL80211_BAND_6GHZ].tx = ar->num_tx_chains; 8053 7917 arg->chains[NL80211_BAND_6GHZ].rx = ar->num_rx_chains; ··· 8076 7940 u32 *hecap_phy_ptr = NULL; 8077 7941 u32 hemode; 8078 7942 8079 8079 - if (pdev->cap.supported_bands & WMI_HOST_WLAN_2G_CAP) 7943 7943 + if (pdev->cap.supported_bands & WMI_HOST_WLAN_2GHZ_CAP) 8080 7944 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ]; 8081 7945 else 8082 7946 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ]; ··· 8207 8071 ath12k_mac_update_vif_offload(&ahvif->deflink); 8208 8072 } 8209 8073 8074 8074 + static bool ath12k_mac_vif_ap_active_any(struct ath12k_base *ab) 8075 8075 + { 8076 8076 + struct ath12k *ar; 8077 8077 + struct ath12k_pdev *pdev; 8078 8078 + struct ath12k_link_vif *arvif; 8079 8079 + int i; 8080 8080 + 8081 8081 + for (i = 0; i < ab->num_radios; i++) { 8082 8082 + pdev = &ab->pdevs[i]; 8083 8083 + ar = pdev->ar; 8084 8084 + list_for_each_entry(arvif, &ar->arvifs, list) { 8085 8085 + if (arvif->is_up && 8086 8086 + arvif->ahvif->vdev_type == WMI_VDEV_TYPE_AP) 8087 8087 + return true; 8088 8088 + } 8089 8089 + } 8090 8090 + return false; 8091 8091 + } 8092 8092 + 8093 8093 + void ath12k_mac_11d_scan_start(struct ath12k *ar, u32 vdev_id) 8094 8094 + { 8095 8095 + struct wmi_11d_scan_start_arg arg; 8096 8096 + int ret; 8097 8097 + 8098 8098 + lockdep_assert_wiphy(ath12k_ar_to_hw(ar)->wiphy); 8099 8099 + 8100 8100 + if (ar->regdom_set_by_user) 8101 8101 + goto fin; 8102 8102 + 8103 8103 + if (ar->vdev_id_11d_scan != ATH12K_11D_INVALID_VDEV_ID) 8104 8104 + goto fin; 8105 8105 + 8106 8106 + if (!test_bit(WMI_TLV_SERVICE_11D_OFFLOAD, ar->ab->wmi_ab.svc_map)) 8107 8107 + goto fin; 8108 8108 + 8109 8109 + if (ath12k_mac_vif_ap_active_any(ar->ab)) 8110 8110 + goto fin; 8111 8111 + 8112 8112 + arg.vdev_id = vdev_id; 8113 8113 + arg.start_interval_msec = 0; 8114 8114 + arg.scan_period_msec = ATH12K_SCAN_11D_INTERVAL; 8115 8115 + 8116 8116 + ath12k_dbg(ar->ab, ATH12K_DBG_MAC, 8117 8117 + "mac start 11d scan for vdev %d\n", vdev_id); 8118 8118 + 8119 8119 + ret = ath12k_wmi_send_11d_scan_start_cmd(ar, &arg); 8120 8120 + if (ret) { 8121 8121 + ath12k_warn(ar->ab, "failed to start 11d scan vdev %d ret: %d\n", 8122 8122 + vdev_id, ret); 8123 8123 + } else { 8124 8124 + ar->vdev_id_11d_scan = vdev_id; 8125 8125 + if (ar->state_11d == ATH12K_11D_PREPARING) 8126 8126 + ar->state_11d = ATH12K_11D_RUNNING; 8127 8127 + } 8128 8128 + 8129 8129 + fin: 8130 8130 + if (ar->state_11d == ATH12K_11D_PREPARING) { 8131 8131 + ar->state_11d = ATH12K_11D_IDLE; 8132 8132 + complete(&ar->completed_11d_scan); 8133 8133 + } 8134 8134 + } 8135 8135 + 8136 8136 + void ath12k_mac_11d_scan_stop(struct ath12k *ar) 8137 8137 + { 8138 8138 + int ret; 8139 8139 + u32 vdev_id; 8140 8140 + 8141 8141 + lockdep_assert_wiphy(ath12k_ar_to_hw(ar)->wiphy); 8142 8142 + 8143 8143 + if (!test_bit(WMI_TLV_SERVICE_11D_OFFLOAD, ar->ab->wmi_ab.svc_map)) 8144 8144 + return; 8145 8145 + 8146 8146 + ath12k_dbg(ar->ab, ATH12K_DBG_MAC, "mac stop 11d for vdev %d\n", 8147 8147 + ar->vdev_id_11d_scan); 8148 8148 + 8149 8149 + if (ar->state_11d == ATH12K_11D_PREPARING) { 8150 8150 + ar->state_11d = ATH12K_11D_IDLE; 8151 8151 + complete(&ar->completed_11d_scan); 8152 8152 + } 8153 8153 + 8154 8154 + if (ar->vdev_id_11d_scan != ATH12K_11D_INVALID_VDEV_ID) { 8155 8155 + vdev_id = ar->vdev_id_11d_scan; 8156 8156 + 8157 8157 + ret = ath12k_wmi_send_11d_scan_stop_cmd(ar, vdev_id); 8158 8158 + if (ret) { 8159 8159 + ath12k_warn(ar->ab, 8160 8160 + "failed to stopt 11d scan vdev %d ret: %d\n", 8161 8161 + vdev_id, ret); 8162 8162 + } else { 8163 8163 + ar->vdev_id_11d_scan = ATH12K_11D_INVALID_VDEV_ID; 8164 8164 + ar->state_11d = ATH12K_11D_IDLE; 8165 8165 + complete(&ar->completed_11d_scan); 8166 8166 + } 8167 8167 + } 8168 8168 + } 8169 8169 + 8170 8170 + void ath12k_mac_11d_scan_stop_all(struct ath12k_base *ab) 8171 8171 + { 8172 8172 + struct ath12k *ar; 8173 8173 + struct ath12k_pdev *pdev; 8174 8174 + int i; 8175 8175 + 8176 8176 + ath12k_dbg(ab, ATH12K_DBG_MAC, "mac stop soc 11d scan\n"); 8177 8177 + 8178 8178 + for (i = 0; i < ab->num_radios; i++) { 8179 8179 + pdev = &ab->pdevs[i]; 8180 8180 + ar = pdev->ar; 8181 8181 + 8182 8182 + ath12k_mac_11d_scan_stop(ar); 8183 8183 + } 8184 8184 + } 8185 8185 + 8210 8186 int ath12k_mac_vdev_create(struct ath12k *ar, struct ath12k_link_vif *arvif) 8211 8187 { 8212 8188 struct ath12k_hw *ah = ar->ah; ··· 8336 8088 u8 link_id; 8337 8089 8338 8090 lockdep_assert_wiphy(hw->wiphy); 8091 8091 + 8092 8092 + /* In NO_VIRTUAL_MONITOR, its necessary to restrict only one monitor 8093 8093 + * interface in each radio 8094 8094 + */ 8095 8095 + if (vif->type == NL80211_IFTYPE_MONITOR && ar->monitor_vdev_created) 8096 8096 + return -EINVAL; 8339 8097 8340 8098 /* If no link is active and scan vdev is requested 8341 8099 * use a default link conf for scan address purpose. ··· 8459 8205 arvif->vdev_id, ret); 8460 8206 goto err_peer_del; 8461 8207 } 8208 8208 + ath12k_mac_11d_scan_stop_all(ar->ab); 8462 8209 break; 8463 8210 case WMI_VDEV_TYPE_STA: 8464 8211 param_id = WMI_STA_PS_PARAM_RX_WAKE_POLICY; ··· 8498 8243 arvif->vdev_id, ret); 8499 8244 goto err_peer_del; 8500 8245 } 8246 8246 + 8247 8247 + if (test_bit(WMI_TLV_SERVICE_11D_OFFLOAD, ab->wmi_ab.svc_map) && 8248 8248 + ahvif->vdev_type == WMI_VDEV_TYPE_STA && 8249 8249 + ahvif->vdev_subtype == WMI_VDEV_SUBTYPE_NONE) { 8250 8250 + reinit_completion(&ar->completed_11d_scan); 8251 8251 + ar->state_11d = ATH12K_11D_PREPARING; 8252 8252 + } 8253 8253 + break; 8254 8254 + case WMI_VDEV_TYPE_MONITOR: 8255 8255 + ar->monitor_vdev_created = true; 8501 8256 break; 8502 8257 default: 8503 8258 break; ··· 8528 8263 } 8529 8264 8530 8265 ath12k_dp_vdev_tx_attach(ar, arvif); 8531 8531 - if (vif->type != NL80211_IFTYPE_MONITOR && ar->monitor_conf_enabled) 8532 8532 - ath12k_mac_monitor_vdev_create(ar); 8533 8266 8534 8267 return ret; 8535 8268 ··· 8552 8289 } 8553 8290 8554 8291 err_vdev_del: 8292 8292 + if (ahvif->vdev_type == WMI_VDEV_TYPE_MONITOR) { 8293 8293 + ar->monitor_vdev_id = -1; 8294 8294 + ar->monitor_vdev_created = false; 8295 8295 + } 8296 8296 + 8555 8297 ath12k_wmi_vdev_delete(ar, arvif->vdev_id); 8556 8298 ar->num_created_vdevs--; 8557 8299 arvif->is_created = false; ··· 8834 8566 if (ahvif->vdev_type == WMI_VDEV_TYPE_MONITOR) { 8835 8567 ar->monitor_vdev_id = -1; 8836 8568 ar->monitor_vdev_created = false; 8837 8837 - } else if (ar->monitor_vdev_created && !ar->monitor_started) { 8838 8838 - ret = ath12k_mac_monitor_vdev_delete(ar); 8839 8569 } 8840 8570 8841 8571 ath12k_dbg(ab, ATH12K_DBG_MAC, "vdev %pM deleted, vdev_id %d\n", ··· 9064 8798 */ 9065 8799 ar->rx_channel = ctx->def.chan; 9066 8800 spin_unlock_bh(&ar->data_lock); 8801 8801 + ar->chan_tx_pwr = ATH12K_PDEV_TX_POWER_INVALID; 9067 8802 9068 8803 return 0; 9069 8804 } ··· 9093 8826 */ 9094 8827 ar->rx_channel = NULL; 9095 8828 spin_unlock_bh(&ar->data_lock); 8829 8829 + ar->chan_tx_pwr = ATH12K_PDEV_TX_POWER_INVALID; 9096 8830 } 9097 8831 9098 8832 static enum wmi_phy_mode ··· 9185 8917 * link vdevs which are advertised as partners below 9186 8918 */ 9187 8919 ml_arg->link_add = true; 8920 8920 + 8921 8921 + ml_arg->assoc_link = arvif->is_sta_assoc_link; 8922 8922 + 9188 8923 partner_info = ml_arg->partner_info; 9189 8924 9190 8925 links = ahvif->links_map; ··· 9528 9257 arvif = wiphy_dereference(ath12k_ar_to_hw(ar)->wiphy, 9529 9258 ahvif->link[link_id]); 9530 9259 9531 9531 - if (vif->type == NL80211_IFTYPE_MONITOR) 9260 9260 + if (vif->type == NL80211_IFTYPE_MONITOR) { 9532 9261 monitor_vif = true; 9262 9262 + continue; 9263 9263 + } 9533 9264 9534 9265 ath12k_dbg(ab, ATH12K_DBG_MAC, 9535 9266 "mac chanctx switch vdev_id %i freq %u->%u width %d->%d\n", ··· 9681 9408 struct ath12k_base *ab = ar->ab; 9682 9409 struct ath12k_vif *ahvif = arvif->ahvif; 9683 9410 struct ieee80211_vif *vif = ath12k_ahvif_to_vif(arvif->ahvif); 9411 9411 + struct ieee80211_chanctx_conf *chanctx; 9412 9412 + struct ieee80211_bss_conf *link_conf; 9684 9413 int ret; 9685 9414 9686 9415 if (WARN_ON(arvif->is_started)) 9687 9416 return -EBUSY; 9688 9417 9689 9689 - ret = ath12k_mac_vdev_start(arvif, &arvif->chanctx); 9418 9418 + link_conf = ath12k_mac_get_link_bss_conf(arvif); 9419 9419 + if (!link_conf) { 9420 9420 + ath12k_warn(ab, "failed to get link conf for vdev %u\n", arvif->vdev_id); 9421 9421 + return -EINVAL; 9422 9422 + } 9423 9423 + 9424 9424 + chanctx = wiphy_dereference(ath12k_ar_to_hw(arvif->ar)->wiphy, 9425 9425 + link_conf->chanctx_conf); 9426 9426 + ret = ath12k_mac_vdev_start(arvif, chanctx); 9690 9427 if (ret) { 9691 9428 ath12k_warn(ab, "failed to start vdev %i addr %pM on freq %d: %d\n", 9692 9429 arvif->vdev_id, vif->addr, 9693 9693 - arvif->chanctx.def.chan->center_freq, ret); 9430 9430 + chanctx->def.chan->center_freq, ret); 9694 9431 return ret; 9695 9432 } 9696 9433 ··· 9745 9462 9746 9463 ar = ath12k_mac_assign_vif_to_vdev(hw, arvif, ctx); 9747 9464 if (!ar) { 9748 9748 - ath12k_warn(arvif->ar->ab, "failed to assign chanctx for vif %pM link id %u link vif is already started", 9749 9749 - vif->addr, link_id); 9465 9465 + ath12k_hw_warn(ah, "failed to assign chanctx for vif %pM link id %u link vif is already started", 9466 9466 + vif->addr, link_id); 9750 9467 return -EINVAL; 9751 9468 } 9752 9469 ··· 9763 9480 ahvif->vdev_type != WMI_VDEV_TYPE_AP && 9764 9481 ahvif->vdev_type != WMI_VDEV_TYPE_MONITOR && 9765 9482 !ath12k_peer_exist_by_vdev_id(ab, arvif->vdev_id)) { 9766 9766 - memcpy(&arvif->chanctx, ctx, sizeof(*ctx)); 9767 9483 ret = 0; 9768 9484 goto out; 9769 9485 } ··· 9774 9492 9775 9493 if (ahvif->vdev_type == WMI_VDEV_TYPE_MONITOR) { 9776 9494 ret = ath12k_mac_monitor_start(ar); 9777 9777 - if (ret) 9495 9495 + if (ret) { 9496 9496 + ath12k_mac_monitor_vdev_delete(ar); 9778 9497 goto out; 9498 9498 + } 9779 9499 9780 9500 arvif->is_started = true; 9781 9501 goto out; ··· 9790 9506 ctx->def.chan->center_freq, ret); 9791 9507 goto out; 9792 9508 } 9793 9793 - 9794 9794 - if (ahvif->vdev_type != WMI_VDEV_TYPE_MONITOR && ar->monitor_vdev_created) 9795 9795 - ath12k_mac_monitor_start(ar); 9796 9509 9797 9510 arvif->is_started = true; 9798 9511 ··· 9853 9572 } 9854 9573 arvif->is_started = false; 9855 9574 9856 9856 - if (ahvif->vdev_type != WMI_VDEV_TYPE_MONITOR && 9857 9857 - ar->num_started_vdevs == 1 && ar->monitor_vdev_created) 9858 9858 - ath12k_mac_monitor_stop(ar); 9575 9575 + if (test_bit(WMI_TLV_SERVICE_11D_OFFLOAD, ab->wmi_ab.svc_map) && 9576 9576 + ahvif->vdev_type == WMI_VDEV_TYPE_STA && 9577 9577 + ahvif->vdev_subtype == WMI_VDEV_SUBTYPE_NONE && 9578 9578 + ar->state_11d != ATH12K_11D_PREPARING) { 9579 9579 + reinit_completion(&ar->completed_11d_scan); 9580 9580 + ar->state_11d = ATH12K_11D_PREPARING; 9581 9581 + } 9859 9582 } 9860 9583 9861 9584 static int ··· 10421 10136 ath12k_warn(ar->ab, "pdev %d successfully recovered\n", 10422 10137 ar->pdev->pdev_id); 10423 10138 10139 10139 + if (ar->ab->hw_params->current_cc_support && 10140 10140 + ar->alpha2[0] != 0 && ar->alpha2[1] != 0) { 10141 10141 + struct wmi_set_current_country_arg arg = {}; 10142 10142 + 10143 10143 + memcpy(&arg.alpha2, ar->alpha2, 2); 10144 10144 + ath12k_wmi_send_set_current_country_cmd(ar, &arg); 10145 10145 + } 10146 10146 + 10424 10147 if (ab->is_reset) { 10425 10148 recovery_count = atomic_inc_return(&ab->recovery_count); 10426 10149 ··· 10560 10267 return 0; 10561 10268 } 10562 10269 10563 10563 - static int ath12k_mac_get_fw_stats(struct ath12k *ar, u32 pdev_id, 10564 10564 - u32 vdev_id, u32 stats_id) 10565 10565 - { 10566 10566 - struct ath12k_base *ab = ar->ab; 10567 10567 - struct ath12k_hw *ah = ath12k_ar_to_ah(ar); 10568 10568 - unsigned long time_left; 10569 10569 - int ret; 10570 10570 - 10571 10571 - guard(mutex)(&ah->hw_mutex); 10572 10572 - 10573 10573 - if (ah->state != ATH12K_HW_STATE_ON) 10574 10574 - return -ENETDOWN; 10575 10575 - 10576 10576 - reinit_completion(&ar->fw_stats_complete); 10577 10577 - 10578 10578 - ret = ath12k_wmi_send_stats_request_cmd(ar, stats_id, vdev_id, pdev_id); 10579 10579 - 10580 10580 - if (ret) { 10581 10581 - ath12k_warn(ab, "failed to request fw stats: %d\n", ret); 10582 10582 - return ret; 10583 10583 - } 10584 10584 - 10585 10585 - ath12k_dbg(ab, ATH12K_DBG_WMI, 10586 10586 - "get fw stat pdev id %d vdev id %d stats id 0x%x\n", 10587 10587 - pdev_id, vdev_id, stats_id); 10588 10588 - 10589 10589 - time_left = wait_for_completion_timeout(&ar->fw_stats_complete, 1 * HZ); 10590 10590 - 10591 10591 - if (!time_left) 10592 10592 - ath12k_warn(ab, "time out while waiting for get fw stats\n"); 10593 10593 - 10594 10594 - return ret; 10595 10595 - } 10596 10596 - 10597 10270 static void ath12k_mac_op_sta_statistics(struct ieee80211_hw *hw, 10598 10271 struct ieee80211_vif *vif, 10599 10272 struct ieee80211_sta *sta, 10600 10273 struct station_info *sinfo) 10601 10274 { 10602 10275 struct ath12k_sta *ahsta = ath12k_sta_to_ahsta(sta); 10276 10276 + struct ath12k_fw_stats_req_params params = {}; 10603 10277 struct ath12k_link_sta *arsta; 10604 10278 struct ath12k *ar; 10605 10279 s8 signal; ··· 10608 10348 /* TODO: Use real NF instead of default one. */ 10609 10349 signal = arsta->rssi_comb; 10610 10350 10351 10351 + params.pdev_id = ar->pdev->pdev_id; 10352 10352 + params.vdev_id = 0; 10353 10353 + params.stats_id = WMI_REQUEST_VDEV_STAT; 10354 10354 + 10611 10355 if (!signal && 10612 10356 ahsta->ahvif->vdev_type == WMI_VDEV_TYPE_STA && 10613 10613 - !(ath12k_mac_get_fw_stats(ar, ar->pdev->pdev_id, 0, 10614 10614 - WMI_REQUEST_VDEV_STAT))) 10357 10357 + !(ath12k_mac_get_fw_stats(ar, &params))) 10615 10358 signal = arsta->rssi_beacon; 10616 10359 10617 10360 if (signal) { ··· 10674 10411 return -EINVAL; 10675 10412 10676 10413 /* check if any of the links of ML VIF is already started on 10677 10677 - * radio(ar) correpsondig to given scan frequency and use it, 10414 10414 + * radio(ar) corresponding to given scan frequency and use it, 10678 10415 * if not use deflink(link 0) for scan purpose. 10679 10416 */ 10680 10417 ··· 10858 10595 .assign_vif_chanctx = ath12k_mac_op_assign_vif_chanctx, 10859 10596 .unassign_vif_chanctx = ath12k_mac_op_unassign_vif_chanctx, 10860 10597 .switch_vif_chanctx = ath12k_mac_op_switch_vif_chanctx, 10598 10598 + .get_txpower = ath12k_mac_op_get_txpower, 10861 10599 .set_rts_threshold = ath12k_mac_op_set_rts_threshold, 10862 10600 .set_frag_threshold = ath12k_mac_op_set_frag_threshold, 10863 10601 .set_bitrate_mask = ath12k_mac_op_set_bitrate_mask, ··· 10874 10610 .resume = ath12k_wow_op_resume, 10875 10611 .set_wakeup = ath12k_wow_op_set_wakeup, 10876 10612 #endif 10613 10613 + #ifdef CONFIG_ATH12K_DEBUGFS 10614 10614 + .vif_add_debugfs = ath12k_debugfs_op_vif_add, 10615 10615 + #endif 10877 10616 CFG80211_TESTMODE_CMD(ath12k_tm_cmd) 10878 10617 #ifdef CONFIG_ATH12K_DEBUGFS 10879 10618 .link_sta_add_debugfs = ath12k_debugfs_link_sta_op_add, 10880 10619 #endif 10881 10620 }; 10621 10621 + 10622 10622 + void ath12k_mac_update_freq_range(struct ath12k *ar, 10623 10623 + u32 freq_low, u32 freq_high) 10624 10624 + { 10625 10625 + if (!(freq_low && freq_high)) 10626 10626 + return; 10627 10627 + 10628 10628 + ar->freq_range.start_freq = MHZ_TO_KHZ(freq_low); 10629 10629 + ar->freq_range.end_freq = MHZ_TO_KHZ(freq_high); 10630 10630 + } 10882 10631 10883 10632 static void ath12k_mac_update_ch_list(struct ath12k *ar, 10884 10633 struct ieee80211_supported_band *band, ··· 10907 10630 band->channels[i].center_freq > freq_high) 10908 10631 band->channels[i].flags |= IEEE80211_CHAN_DISABLED; 10909 10632 } 10910 10910 - 10911 10911 - ar->freq_range.start_freq = MHZ_TO_KHZ(freq_low); 10912 10912 - ar->freq_range.end_freq = MHZ_TO_KHZ(freq_high); 10913 10633 } 10914 10634 10915 10635 static u32 ath12k_get_phy_id(struct ath12k *ar, u32 band) ··· 10914 10640 struct ath12k_pdev *pdev = ar->pdev; 10915 10641 struct ath12k_pdev_cap *pdev_cap = &pdev->cap; 10916 10642 10917 10917 - if (band == WMI_HOST_WLAN_2G_CAP) 10643 10643 + if (band == WMI_HOST_WLAN_2GHZ_CAP) 10918 10644 return pdev_cap->band[NL80211_BAND_2GHZ].phy_id; 10919 10645 10920 10920 - if (band == WMI_HOST_WLAN_5G_CAP) 10646 10646 + if (band == WMI_HOST_WLAN_5GHZ_CAP) 10921 10647 return pdev_cap->band[NL80211_BAND_5GHZ].phy_id; 10922 10648 10923 10649 ath12k_warn(ar->ab, "unsupported phy cap:%d\n", band); ··· 10931 10657 { 10932 10658 struct ieee80211_supported_band *band; 10933 10659 struct ath12k_wmi_hal_reg_capabilities_ext_arg *reg_cap; 10660 10660 + struct ath12k_base *ab = ar->ab; 10661 10661 + u32 phy_id, freq_low, freq_high; 10934 10662 struct ath12k_hw *ah = ar->ah; 10935 10663 void *channels; 10936 10936 - u32 phy_id; 10937 10664 10938 10665 BUILD_BUG_ON((ARRAY_SIZE(ath12k_2ghz_channels) + 10939 10666 ARRAY_SIZE(ath12k_5ghz_channels) + 10940 10667 ARRAY_SIZE(ath12k_6ghz_channels)) != 10941 10668 ATH12K_NUM_CHANS); 10942 10669 10943 10943 - reg_cap = &ar->ab->hal_reg_cap[ar->pdev_idx]; 10670 10670 + reg_cap = &ab->hal_reg_cap[ar->pdev_idx]; 10944 10671 10945 10945 - if (supported_bands & WMI_HOST_WLAN_2G_CAP) { 10672 10672 + if (supported_bands & WMI_HOST_WLAN_2GHZ_CAP) { 10946 10673 channels = kmemdup(ath12k_2ghz_channels, 10947 10674 sizeof(ath12k_2ghz_channels), 10948 10675 GFP_KERNEL); ··· 10958 10683 band->bitrates = ath12k_g_rates; 10959 10684 bands[NL80211_BAND_2GHZ] = band; 10960 10685 10961 10961 - if (ar->ab->hw_params->single_pdev_only) { 10962 10962 - phy_id = ath12k_get_phy_id(ar, WMI_HOST_WLAN_2G_CAP); 10963 10963 - reg_cap = &ar->ab->hal_reg_cap[phy_id]; 10686 10686 + if (ab->hw_params->single_pdev_only) { 10687 10687 + phy_id = ath12k_get_phy_id(ar, WMI_HOST_WLAN_2GHZ_CAP); 10688 10688 + reg_cap = &ab->hal_reg_cap[phy_id]; 10964 10689 } 10690 10690 + 10691 10691 + freq_low = max(reg_cap->low_2ghz_chan, 10692 10692 + ab->reg_freq_2ghz.start_freq); 10693 10693 + freq_high = min(reg_cap->high_2ghz_chan, 10694 10694 + ab->reg_freq_2ghz.end_freq); 10695 10695 + 10965 10696 ath12k_mac_update_ch_list(ar, band, 10966 10697 reg_cap->low_2ghz_chan, 10967 10698 reg_cap->high_2ghz_chan); 10699 10699 + 10700 10700 + ath12k_mac_update_freq_range(ar, freq_low, freq_high); 10968 10701 } 10969 10702 10970 10970 - if (supported_bands & WMI_HOST_WLAN_5G_CAP) { 10971 10971 - if (reg_cap->high_5ghz_chan >= ATH12K_MIN_6G_FREQ) { 10703 10703 + if (supported_bands & WMI_HOST_WLAN_5GHZ_CAP) { 10704 10704 + if (reg_cap->high_5ghz_chan >= ATH12K_MIN_6GHZ_FREQ) { 10972 10705 channels = kmemdup(ath12k_6ghz_channels, 10973 10706 sizeof(ath12k_6ghz_channels), GFP_KERNEL); 10974 10707 if (!channels) { ··· 10992 10709 band->n_bitrates = ath12k_a_rates_size; 10993 10710 band->bitrates = ath12k_a_rates; 10994 10711 bands[NL80211_BAND_6GHZ] = band; 10712 10712 + 10713 10713 + freq_low = max(reg_cap->low_5ghz_chan, 10714 10714 + ab->reg_freq_6ghz.start_freq); 10715 10715 + freq_high = min(reg_cap->high_5ghz_chan, 10716 10716 + ab->reg_freq_6ghz.end_freq); 10717 10717 + 10995 10718 ath12k_mac_update_ch_list(ar, band, 10996 10719 reg_cap->low_5ghz_chan, 10997 10720 reg_cap->high_5ghz_chan); 10721 10721 + 10722 10722 + ath12k_mac_update_freq_range(ar, freq_low, freq_high); 10998 10723 ah->use_6ghz_regd = true; 10999 10724 } 11000 10725 11001 11001 - if (reg_cap->low_5ghz_chan < ATH12K_MIN_6G_FREQ) { 10726 10726 + if (reg_cap->low_5ghz_chan < ATH12K_MIN_6GHZ_FREQ) { 11002 10727 channels = kmemdup(ath12k_5ghz_channels, 11003 10728 sizeof(ath12k_5ghz_channels), 11004 10729 GFP_KERNEL); ··· 11024 10733 band->bitrates = ath12k_a_rates; 11025 10734 bands[NL80211_BAND_5GHZ] = band; 11026 10735 11027 11027 - if (ar->ab->hw_params->single_pdev_only) { 11028 11028 - phy_id = ath12k_get_phy_id(ar, WMI_HOST_WLAN_5G_CAP); 11029 11029 - reg_cap = &ar->ab->hal_reg_cap[phy_id]; 10736 10736 + if (ab->hw_params->single_pdev_only) { 10737 10737 + phy_id = ath12k_get_phy_id(ar, WMI_HOST_WLAN_5GHZ_CAP); 10738 10738 + reg_cap = &ab->hal_reg_cap[phy_id]; 11030 10739 } 10740 10740 + 10741 10741 + freq_low = max(reg_cap->low_5ghz_chan, 10742 10742 + ab->reg_freq_5ghz.start_freq); 10743 10743 + freq_high = min(reg_cap->high_5ghz_chan, 10744 10744 + ab->reg_freq_5ghz.end_freq); 11031 10745 11032 10746 ath12k_mac_update_ch_list(ar, band, 11033 10747 reg_cap->low_5ghz_chan, 11034 10748 reg_cap->high_5ghz_chan); 10749 10749 + 10750 10750 + ath12k_mac_update_freq_range(ar, freq_low, freq_high); 11035 10751 } 11036 10752 } 11037 10753 ··· 11138 10840 comb[0].limits = limits; 11139 10841 comb[0].n_limits = n_limits; 11140 10842 comb[0].max_interfaces = max_interfaces; 11141 11141 - comb[0].num_different_channels = 1; 11142 10843 comb[0].beacon_int_infra_match = true; 11143 10844 comb[0].beacon_int_min_gcd = 100; 11144 11144 - comb[0].radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) | 11145 11145 - BIT(NL80211_CHAN_WIDTH_20) | 11146 11146 - BIT(NL80211_CHAN_WIDTH_40) | 11147 11147 - BIT(NL80211_CHAN_WIDTH_80); 10845 10845 + 10846 10846 + if (ar->ab->hw_params->single_pdev_only) { 10847 10847 + comb[0].num_different_channels = 2; 10848 10848 + } else { 10849 10849 + comb[0].num_different_channels = 1; 10850 10850 + comb[0].radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) | 10851 10851 + BIT(NL80211_CHAN_WIDTH_20) | 10852 10852 + BIT(NL80211_CHAN_WIDTH_40) | 10853 10853 + BIT(NL80211_CHAN_WIDTH_80); 10854 10854 + } 11148 10855 11149 10856 return 0; 11150 10857 } ··· 11522 11219 ieee80211_hw_set(hw, QUEUE_CONTROL); 11523 11220 ieee80211_hw_set(hw, SUPPORTS_TX_FRAG); 11524 11221 ieee80211_hw_set(hw, REPORTS_LOW_ACK); 11222 11222 + ieee80211_hw_set(hw, NO_VIRTUAL_MONITOR); 11525 11223 11526 11224 if ((ht_cap & WMI_HT_CAP_ENABLED) || is_6ghz) { 11527 11225 ieee80211_hw_set(hw, AMPDU_AGGREGATION); ··· 11651 11347 goto err_unregister_hw; 11652 11348 } 11653 11349 11350 11350 + ath12k_fw_stats_init(ar); 11654 11351 ath12k_debugfs_register(ar); 11655 11352 } 11656 11656 - 11657 11657 - init_completion(&ar->fw_stats_complete); 11658 11353 11659 11354 return 0; 11660 11355 ··· 11699 11396 ar->num_tx_chains = hweight32(pdev->cap.tx_chain_mask); 11700 11397 ar->num_rx_chains = hweight32(pdev->cap.rx_chain_mask); 11701 11398 ar->scan.arvif = NULL; 11399 11399 + ar->vdev_id_11d_scan = ATH12K_11D_INVALID_VDEV_ID; 11702 11400 11703 11401 spin_lock_init(&ar->data_lock); 11704 11402 INIT_LIST_HEAD(&ar->arvifs); ··· 11715 11411 init_completion(&ar->scan.completed); 11716 11412 init_completion(&ar->scan.on_channel); 11717 11413 init_completion(&ar->mlo_setup_done); 11414 11414 + init_completion(&ar->completed_11d_scan); 11718 11415 11719 11416 INIT_DELAYED_WORK(&ar->scan.timeout, ath12k_scan_timeout_work); 11720 11417 wiphy_work_init(&ar->scan.vdev_clean_wk, ath12k_scan_vdev_clean_work); ··· 11723 11418 11724 11419 wiphy_work_init(&ar->wmi_mgmt_tx_work, ath12k_mgmt_over_wmi_tx_work); 11725 11420 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 11421 11421 + 11422 11422 + ar->monitor_vdev_id = -1; 11423 11423 + ar->monitor_vdev_created = false; 11424 11424 + ar->monitor_started = false; 11726 11425 } 11727 11426 11728 11427 static int __ath12k_mac_mlo_setup(struct ath12k *ar) ··· 11881 11572 11882 11573 int ath12k_mac_register(struct ath12k_hw_group *ag) 11883 11574 { 11884 11884 - struct ath12k_base *ab = ag->ab[0]; 11885 11575 struct ath12k_hw *ah; 11886 11576 int i; 11887 11577 int ret; ··· 11892 11584 if (ret) 11893 11585 goto err; 11894 11586 } 11895 11895 - 11896 11896 - set_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags); 11897 11587 11898 11588 return 0; 11899 11589 ··· 11909 11603 11910 11604 void ath12k_mac_unregister(struct ath12k_hw_group *ag) 11911 11605 { 11912 11912 - struct ath12k_base *ab = ag->ab[0]; 11913 11606 struct ath12k_hw *ah; 11914 11607 int i; 11915 11915 - 11916 11916 - clear_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags); 11917 11608 11918 11609 for (i = ag->num_hw - 1; i >= 0; i--) { 11919 11610 ah = ath12k_ag_to_ah(ag, i);

+13

drivers/net/wireless/ath/ath12k/mac.h

reviewed

··· 33 33 #define ATH12K_KEEPALIVE_MAX_IDLE 3895 34 34 #define ATH12K_KEEPALIVE_MAX_UNRESPONSIVE 3900 35 35 36 36 + #define ATH12K_PDEV_TX_POWER_INVALID ((u32)-1) 37 37 + #define ATH12K_PDEV_TX_POWER_REFRESH_TIME_MSECS 5000 /* msecs */ 38 38 + 36 39 /* FIXME: should these be in ieee80211.h? */ 37 40 #define IEEE80211_VHT_MCS_SUPPORT_0_11_MASK GENMASK(23, 16) 38 41 #define IEEE80211_DISABLE_VHT_MCS_SUPPORT_0_11 BIT(24) ··· 68 65 }; 69 66 70 67 extern const struct htt_rx_ring_tlv_filter ath12k_mac_mon_status_filter_default; 68 68 + 69 69 + #define ATH12K_SCAN_11D_INTERVAL 600000 70 70 + #define ATH12K_11D_INVALID_VDEV_ID 0xFFFF 71 71 + 72 72 + void ath12k_mac_11d_scan_start(struct ath12k *ar, u32 vdev_id); 73 73 + void ath12k_mac_11d_scan_stop(struct ath12k *ar); 74 74 + void ath12k_mac_11d_scan_stop_all(struct ath12k_base *ab); 71 75 72 76 void ath12k_mac_destroy(struct ath12k_hw_group *ag); 73 77 void ath12k_mac_unregister(struct ath12k_hw_group *ag); ··· 125 115 struct ath12k *ath12k_get_ar_by_vif(struct ieee80211_hw *hw, 126 116 struct ieee80211_vif *vif, 127 117 u8 link_id); 118 118 + int ath12k_mac_get_fw_stats(struct ath12k *ar, struct ath12k_fw_stats_req_params *param); 119 119 + void ath12k_mac_update_freq_range(struct ath12k *ar, 120 120 + u32 freq_low, u32 freq_high); 128 121 #endif

+6 -3

drivers/net/wireless/ath/ath12k/mhi.c

reviewed

··· 1 1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 2 /* 3 3 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 7 7 #include <linux/msi.h> ··· 285 285 break; 286 286 } 287 287 288 288 - if (!(test_bit(ATH12K_FLAG_UNREGISTERING, &ab->dev_flags))) 288 288 + if (!(test_bit(ATH12K_FLAG_UNREGISTERING, &ab->dev_flags))) { 289 289 + set_bit(ATH12K_FLAG_CRASH_FLUSH, &ab->dev_flags); 290 290 + set_bit(ATH12K_FLAG_RECOVERY, &ab->dev_flags); 289 291 queue_work(ab->workqueue_aux, &ab->reset_work); 292 292 + } 290 293 break; 291 294 default: 292 295 break; ··· 382 379 mhi_ctrl->irq_flags = IRQF_SHARED | IRQF_NOBALANCING; 383 380 384 381 mhi_ctrl->iova_start = 0; 385 385 - mhi_ctrl->iova_stop = 0xffffffff; 382 382 + mhi_ctrl->iova_stop = ab_pci->dma_mask; 386 383 mhi_ctrl->sbl_size = SZ_512K; 387 384 mhi_ctrl->seg_len = SZ_512K; 388 385 mhi_ctrl->fbc_download = true;

+36 -22

drivers/net/wireless/ath/ath12k/pci.c

reviewed

··· 17 17 #include "debug.h" 18 18 19 19 #define ATH12K_PCI_BAR_NUM 0 20 20 - #define ATH12K_PCI_DMA_MASK 32 20 20 + #define ATH12K_PCI_DMA_MASK 36 21 21 22 22 #define ATH12K_PCI_IRQ_CE0_OFFSET 3 23 23 ··· 718 718 cfg->svc_to_ce_map_len = ab->hw_params->svc_to_ce_map_len; 719 719 ab->qmi.service_ins_id = ab->hw_params->qmi_service_ins_id; 720 720 721 721 - if (test_bit(ATH12K_FW_FEATURE_MULTI_QRTR_ID, ab->fw.fw_features)) { 721 721 + if (ath12k_fw_feature_supported(ab, ATH12K_FW_FEATURE_MULTI_QRTR_ID)) { 722 722 ab_pci->qmi_instance = 723 723 u32_encode_bits(pci_domain_nr(bus), DOMAIN_NUMBER_MASK) | 724 724 u32_encode_bits(bus->number, BUS_NUMBER_MASK); ··· 877 877 goto disable_device; 878 878 } 879 879 880 880 - ret = dma_set_mask_and_coherent(&pdev->dev, 881 881 - DMA_BIT_MASK(ATH12K_PCI_DMA_MASK)); 882 882 - if (ret) { 883 883 - ath12k_err(ab, "failed to set pci dma mask to %d: %d\n", 884 884 - ATH12K_PCI_DMA_MASK, ret); 885 885 - goto release_region; 886 886 - } 880 880 + ab_pci->dma_mask = DMA_BIT_MASK(ATH12K_PCI_DMA_MASK); 881 881 + dma_set_mask(&pdev->dev, ab_pci->dma_mask); 882 882 + dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); 887 883 888 884 pci_set_master(pdev); 889 885 ··· 1468 1472 1469 1473 ath12k_pci_msi_enable(ab_pci); 1470 1474 1471 1471 - if (test_bit(ATH12K_FW_FEATURE_MULTI_QRTR_ID, ab->fw.fw_features)) 1475 1475 + if (ath12k_fw_feature_supported(ab, ATH12K_FW_FEATURE_MULTI_QRTR_ID)) 1472 1476 ath12k_pci_update_qrtr_node_id(ab); 1473 1477 1474 1478 ret = ath12k_mhi_start(ab_pci); ··· 1486 1490 void ath12k_pci_power_down(struct ath12k_base *ab, bool is_suspend) 1487 1491 { 1488 1492 struct ath12k_pci *ab_pci = ath12k_pci_priv(ab); 1493 1493 + 1494 1494 + if (!test_bit(ATH12K_PCI_FLAG_INIT_DONE, &ab_pci->flags)) 1495 1495 + return; 1489 1496 1490 1497 /* restore aspm in case firmware bootup fails */ 1491 1498 ath12k_pci_aspm_restore(ab_pci); ··· 1709 1710 err_mhi_unregister: 1710 1711 ath12k_mhi_unregister(ab_pci); 1711 1712 1712 1712 - err_pci_msi_free: 1713 1713 - ath12k_pci_msi_free(ab_pci); 1714 1714 - 1715 1713 err_irq_affinity_cleanup: 1716 1714 ath12k_pci_set_irq_affinity_hint(ab_pci, NULL); 1715 1715 + 1716 1716 + err_pci_msi_free: 1717 1717 + ath12k_pci_msi_free(ab_pci); 1717 1718 1718 1719 err_pci_free_region: 1719 1720 ath12k_pci_free_region(ab_pci); ··· 1757 1758 ath12k_core_free(ab); 1758 1759 } 1759 1760 1761 1761 + static void ath12k_pci_hw_group_power_down(struct ath12k_hw_group *ag) 1762 1762 + { 1763 1763 + struct ath12k_base *ab; 1764 1764 + int i; 1765 1765 + 1766 1766 + if (!ag) 1767 1767 + return; 1768 1768 + 1769 1769 + mutex_lock(&ag->mutex); 1770 1770 + 1771 1771 + for (i = 0; i < ag->num_devices; i++) { 1772 1772 + ab = ag->ab[i]; 1773 1773 + if (!ab) 1774 1774 + continue; 1775 1775 + 1776 1776 + ath12k_pci_power_down(ab, false); 1777 1777 + } 1778 1778 + 1779 1779 + mutex_unlock(&ag->mutex); 1780 1780 + } 1781 1781 + 1760 1782 static void ath12k_pci_shutdown(struct pci_dev *pdev) 1761 1783 { 1762 1784 struct ath12k_base *ab = pci_get_drvdata(pdev); 1763 1785 struct ath12k_pci *ab_pci = ath12k_pci_priv(ab); 1764 1786 1765 1787 ath12k_pci_set_irq_affinity_hint(ab_pci, NULL); 1766 1766 - ath12k_pci_power_down(ab, false); 1788 1788 + ath12k_pci_hw_group_power_down(ab->ag); 1767 1789 } 1768 1790 1769 1791 static __maybe_unused int ath12k_pci_pm_suspend(struct device *dev) ··· 1851 1831 .driver.pm = &ath12k_pci_pm_ops, 1852 1832 }; 1853 1833 1854 1854 - static int ath12k_pci_init(void) 1834 1834 + int ath12k_pci_init(void) 1855 1835 { 1856 1836 int ret; 1857 1837 ··· 1864 1844 1865 1845 return 0; 1866 1846 } 1867 1867 - module_init(ath12k_pci_init); 1868 1847 1869 1869 - static void ath12k_pci_exit(void) 1848 1848 + void ath12k_pci_exit(void) 1870 1849 { 1871 1850 pci_unregister_driver(&ath12k_pci_driver); 1872 1851 } 1873 1873 - 1874 1874 - module_exit(ath12k_pci_exit); 1875 1875 - 1876 1876 - MODULE_DESCRIPTION("Driver support for Qualcomm Technologies PCIe 802.11be WLAN devices"); 1877 1877 - MODULE_LICENSE("Dual BSD/GPL");

+4 -1

drivers/net/wireless/ath/ath12k/pci.h

reviewed

··· 1 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 2 /* 3 3 * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 #ifndef ATH12K_PCI_H 7 7 #define ATH12K_PCI_H ··· 116 116 unsigned long irq_flags; 117 117 const struct ath12k_pci_ops *pci_ops; 118 118 u32 qmi_instance; 119 119 + u64 dma_mask; 119 120 }; 120 121 121 122 static inline struct ath12k_pci *ath12k_pci_priv(struct ath12k_base *ab) ··· 146 145 int ath12k_pci_start(struct ath12k_base *ab); 147 146 int ath12k_pci_power_up(struct ath12k_base *ab); 148 147 void ath12k_pci_power_down(struct ath12k_base *ab, bool is_suspend); 148 148 + int ath12k_pci_init(void); 149 149 + void ath12k_pci_exit(void); 149 150 #endif /* ATH12K_PCI_H */

+4 -1

drivers/net/wireless/ath/ath12k/peer.c

reviewed

··· 1 1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 2 /* 3 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2022, 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 7 7 #include "core.h" ··· 382 382 arvif->ast_hash = peer->ast_hash; 383 383 arvif->ast_idx = peer->hw_peer_id; 384 384 } 385 385 + 386 386 + if (vif->type == NL80211_IFTYPE_AP) 387 387 + peer->ucast_ra_only = true; 385 388 386 389 if (sta) { 387 390 ahsta = ath12k_sta_to_ahsta(sta);

+2 -1

drivers/net/wireless/ath/ath12k/peer.h

reviewed

··· 1 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 2 /* 3 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 7 7 #ifndef ATH12K_PEER_H ··· 62 62 63 63 /* for reference to ath12k_link_sta */ 64 64 u8 link_id; 65 65 + bool ucast_ra_only; 65 66 }; 66 67 67 68 struct ath12k_ml_peer {

+210 -28

drivers/net/wireless/ath/ath12k/qmi.c

reviewed

··· 11 11 #include "debug.h" 12 12 #include <linux/of.h> 13 13 #include <linux/firmware.h> 14 14 + #include <linux/of_address.h> 15 15 + #include <linux/ioport.h> 14 16 15 17 #define SLEEP_CLOCK_SELECT_INTERNAL_BIT 0x02 16 18 #define HOST_CSTATE_BIT 0x04 ··· 2170 2168 req.bdf_support_valid = 1; 2171 2169 req.bdf_support = 1; 2172 2170 2173 2173 - req.m3_support_valid = 1; 2174 2174 - req.m3_support = 1; 2175 2175 - req.m3_cache_support_valid = 1; 2176 2176 - req.m3_cache_support = 1; 2171 2171 + if (ab->hw_params->fw.m3_loader == ath12k_m3_fw_loader_driver) { 2172 2172 + req.m3_support_valid = 1; 2173 2173 + req.m3_support = 1; 2174 2174 + req.m3_cache_support_valid = 1; 2175 2175 + req.m3_cache_support = 1; 2176 2176 + } 2177 2177 2178 2178 req.cal_done_valid = 1; 2179 2179 req.cal_done = ab->qmi.cal_done; ··· 2268 2264 goto out; 2269 2265 } 2270 2266 2267 2267 + if (resp.single_chip_mlo_support_valid && resp.single_chip_mlo_support) 2268 2268 + ab->single_chip_mlo_support = true; 2269 2269 + 2271 2270 if (!resp.num_phy_valid) { 2272 2271 ret = -ENODATA; 2273 2272 goto out; ··· 2279 2272 ab->qmi.num_radios = resp.num_phy; 2280 2273 2281 2274 ath12k_dbg(ab, ATH12K_DBG_QMI, 2282 2282 - "phy capability resp valid %d num_phy %d valid %d board_id %d\n", 2275 2275 + "phy capability resp valid %d single_chip_mlo_support %d valid %d num_phy %d valid %d board_id %d\n", 2276 2276 + resp.single_chip_mlo_support_valid, resp.single_chip_mlo_support, 2283 2277 resp.num_phy_valid, resp.num_phy, 2284 2278 resp.board_id_valid, resp.board_id); 2285 2279 ··· 2384 2376 * failure to firmware and firmware then request multiple blocks of 2385 2377 * small chunk size memory. 2386 2378 */ 2387 2387 - if (ab->qmi.target_mem_delayed) { 2379 2379 + if (!test_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags) && 2380 2380 + ab->qmi.target_mem_delayed) { 2388 2381 delayed = true; 2389 2382 ath12k_dbg(ab, ATH12K_DBG_QMI, "qmi delays mem_request %d\n", 2390 2383 ab->qmi.mem_seg_count); ··· 2443 2434 return ret; 2444 2435 } 2445 2436 2437 2437 + void ath12k_qmi_reset_mlo_mem(struct ath12k_hw_group *ag) 2438 2438 + { 2439 2439 + struct target_mem_chunk *mlo_chunk; 2440 2440 + int i; 2441 2441 + 2442 2442 + lockdep_assert_held(&ag->mutex); 2443 2443 + 2444 2444 + if (!ag->mlo_mem.init_done || ag->num_started) 2445 2445 + return; 2446 2446 + 2447 2447 + for (i = 0; i < ARRAY_SIZE(ag->mlo_mem.chunk); i++) { 2448 2448 + mlo_chunk = &ag->mlo_mem.chunk[i]; 2449 2449 + 2450 2450 + if (mlo_chunk->v.addr) 2451 2451 + /* TODO: Mode 0 recovery is the default mode hence resetting the 2452 2452 + * whole memory region for now. Once Mode 1 support is added, this 2453 2453 + * needs to be handled properly 2454 2454 + */ 2455 2455 + memset(mlo_chunk->v.addr, 0, mlo_chunk->size); 2456 2456 + } 2457 2457 + } 2458 2458 + 2446 2459 static void ath12k_qmi_free_mlo_mem_chunk(struct ath12k_base *ab, 2447 2460 struct target_mem_chunk *chunk, 2448 2461 int idx) 2449 2462 { 2450 2463 struct ath12k_hw_group *ag = ab->ag; 2451 2464 struct target_mem_chunk *mlo_chunk; 2465 2465 + bool fixed_mem; 2452 2466 2453 2467 lockdep_assert_held(&ag->mutex); 2454 2468 ··· 2483 2451 return; 2484 2452 } 2485 2453 2454 2454 + fixed_mem = test_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags); 2486 2455 mlo_chunk = &ag->mlo_mem.chunk[idx]; 2487 2487 - if (mlo_chunk->v.addr) { 2456 2456 + 2457 2457 + if (fixed_mem && mlo_chunk->v.ioaddr) { 2458 2458 + iounmap(mlo_chunk->v.ioaddr); 2459 2459 + mlo_chunk->v.ioaddr = NULL; 2460 2460 + } else if (mlo_chunk->v.addr) { 2488 2461 dma_free_coherent(ab->dev, 2489 2462 mlo_chunk->size, 2490 2463 mlo_chunk->v.addr, ··· 2499 2462 2500 2463 mlo_chunk->paddr = 0; 2501 2464 mlo_chunk->size = 0; 2502 2502 - chunk->v.addr = NULL; 2465 2465 + if (fixed_mem) 2466 2466 + chunk->v.ioaddr = NULL; 2467 2467 + else 2468 2468 + chunk->v.addr = NULL; 2503 2469 chunk->paddr = 0; 2504 2470 chunk->size = 0; 2505 2471 } ··· 2513 2473 int i, mlo_idx; 2514 2474 2515 2475 for (i = 0, mlo_idx = 0; i < ab->qmi.mem_seg_count; i++) { 2516 2516 - if (!ab->qmi.target_mem[i].v.addr) 2517 2517 - continue; 2518 2518 - 2519 2476 if (ab->qmi.target_mem[i].type == MLO_GLOBAL_MEM_REGION_TYPE) { 2520 2477 ath12k_qmi_free_mlo_mem_chunk(ab, 2521 2478 &ab->qmi.target_mem[i], 2522 2479 mlo_idx++); 2523 2480 } else { 2524 2524 - dma_free_coherent(ab->dev, 2525 2525 - ab->qmi.target_mem[i].prev_size, 2526 2526 - ab->qmi.target_mem[i].v.addr, 2527 2527 - ab->qmi.target_mem[i].paddr); 2528 2528 - ab->qmi.target_mem[i].v.addr = NULL; 2481 2481 + if (test_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags) && 2482 2482 + ab->qmi.target_mem[i].v.ioaddr) { 2483 2483 + iounmap(ab->qmi.target_mem[i].v.ioaddr); 2484 2484 + ab->qmi.target_mem[i].v.ioaddr = NULL; 2485 2485 + } else { 2486 2486 + if (!ab->qmi.target_mem[i].v.addr) 2487 2487 + continue; 2488 2488 + dma_free_coherent(ab->dev, 2489 2489 + ab->qmi.target_mem[i].prev_size, 2490 2490 + ab->qmi.target_mem[i].v.addr, 2491 2491 + ab->qmi.target_mem[i].paddr); 2492 2492 + ab->qmi.target_mem[i].v.addr = NULL; 2493 2493 + } 2529 2494 } 2530 2495 } 2531 2496 ··· 2680 2635 if (ret == -EAGAIN) 2681 2636 ret = 0; 2682 2637 2638 2638 + return ret; 2639 2639 + } 2640 2640 + 2641 2641 + static int ath12k_qmi_assign_target_mem_chunk(struct ath12k_base *ab) 2642 2642 + { 2643 2643 + struct reserved_mem *rmem; 2644 2644 + size_t avail_rmem_size; 2645 2645 + int i, idx, ret; 2646 2646 + 2647 2647 + for (i = 0, idx = 0; i < ab->qmi.mem_seg_count; i++) { 2648 2648 + switch (ab->qmi.target_mem[i].type) { 2649 2649 + case HOST_DDR_REGION_TYPE: 2650 2650 + rmem = ath12k_core_get_reserved_mem(ab, 0); 2651 2651 + if (!rmem) { 2652 2652 + ret = -ENODEV; 2653 2653 + goto out; 2654 2654 + } 2655 2655 + 2656 2656 + avail_rmem_size = rmem->size; 2657 2657 + if (avail_rmem_size < ab->qmi.target_mem[i].size) { 2658 2658 + ath12k_dbg(ab, ATH12K_DBG_QMI, 2659 2659 + "failed to assign mem type %u req size %u avail size %zu\n", 2660 2660 + ab->qmi.target_mem[i].type, 2661 2661 + ab->qmi.target_mem[i].size, 2662 2662 + avail_rmem_size); 2663 2663 + ret = -EINVAL; 2664 2664 + goto out; 2665 2665 + } 2666 2666 + 2667 2667 + ab->qmi.target_mem[idx].paddr = rmem->base; 2668 2668 + ab->qmi.target_mem[idx].v.ioaddr = 2669 2669 + ioremap(ab->qmi.target_mem[idx].paddr, 2670 2670 + ab->qmi.target_mem[i].size); 2671 2671 + if (!ab->qmi.target_mem[idx].v.ioaddr) { 2672 2672 + ret = -EIO; 2673 2673 + goto out; 2674 2674 + } 2675 2675 + ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size; 2676 2676 + ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type; 2677 2677 + idx++; 2678 2678 + break; 2679 2679 + case BDF_MEM_REGION_TYPE: 2680 2680 + rmem = ath12k_core_get_reserved_mem(ab, 0); 2681 2681 + if (!rmem) { 2682 2682 + ret = -ENODEV; 2683 2683 + goto out; 2684 2684 + } 2685 2685 + 2686 2686 + avail_rmem_size = rmem->size - ab->hw_params->bdf_addr_offset; 2687 2687 + if (avail_rmem_size < ab->qmi.target_mem[i].size) { 2688 2688 + ath12k_dbg(ab, ATH12K_DBG_QMI, 2689 2689 + "failed to assign mem type %u req size %u avail size %zu\n", 2690 2690 + ab->qmi.target_mem[i].type, 2691 2691 + ab->qmi.target_mem[i].size, 2692 2692 + avail_rmem_size); 2693 2693 + ret = -EINVAL; 2694 2694 + goto out; 2695 2695 + } 2696 2696 + ab->qmi.target_mem[idx].paddr = 2697 2697 + rmem->base + ab->hw_params->bdf_addr_offset; 2698 2698 + ab->qmi.target_mem[idx].v.ioaddr = 2699 2699 + ioremap(ab->qmi.target_mem[idx].paddr, 2700 2700 + ab->qmi.target_mem[i].size); 2701 2701 + if (!ab->qmi.target_mem[idx].v.ioaddr) { 2702 2702 + ret = -EIO; 2703 2703 + goto out; 2704 2704 + } 2705 2705 + ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size; 2706 2706 + ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type; 2707 2707 + idx++; 2708 2708 + break; 2709 2709 + case CALDB_MEM_REGION_TYPE: 2710 2710 + /* Cold boot calibration is not enabled in Ath12k. Hence, 2711 2711 + * assign paddr = 0. 2712 2712 + * Once cold boot calibration is enabled add support to 2713 2713 + * assign reserved memory from DT. 2714 2714 + */ 2715 2715 + ab->qmi.target_mem[idx].paddr = 0; 2716 2716 + ab->qmi.target_mem[idx].v.ioaddr = NULL; 2717 2717 + ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size; 2718 2718 + ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type; 2719 2719 + idx++; 2720 2720 + break; 2721 2721 + case M3_DUMP_REGION_TYPE: 2722 2722 + rmem = ath12k_core_get_reserved_mem(ab, 1); 2723 2723 + if (!rmem) { 2724 2724 + ret = -EINVAL; 2725 2725 + goto out; 2726 2726 + } 2727 2727 + 2728 2728 + avail_rmem_size = rmem->size; 2729 2729 + if (avail_rmem_size < ab->qmi.target_mem[i].size) { 2730 2730 + ath12k_dbg(ab, ATH12K_DBG_QMI, 2731 2731 + "failed to assign mem type %u req size %u avail size %zu\n", 2732 2732 + ab->qmi.target_mem[i].type, 2733 2733 + ab->qmi.target_mem[i].size, 2734 2734 + avail_rmem_size); 2735 2735 + ret = -EINVAL; 2736 2736 + goto out; 2737 2737 + } 2738 2738 + 2739 2739 + ab->qmi.target_mem[idx].paddr = rmem->base; 2740 2740 + ab->qmi.target_mem[idx].v.ioaddr = 2741 2741 + ioremap(ab->qmi.target_mem[idx].paddr, 2742 2742 + ab->qmi.target_mem[i].size); 2743 2743 + if (!ab->qmi.target_mem[idx].v.ioaddr) { 2744 2744 + ret = -EIO; 2745 2745 + goto out; 2746 2746 + } 2747 2747 + ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size; 2748 2748 + ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type; 2749 2749 + idx++; 2750 2750 + break; 2751 2751 + default: 2752 2752 + ath12k_warn(ab, "qmi ignore invalid mem req type %u\n", 2753 2753 + ab->qmi.target_mem[i].type); 2754 2754 + break; 2755 2755 + } 2756 2756 + } 2757 2757 + ab->qmi.mem_seg_count = idx; 2758 2758 + 2759 2759 + return 0; 2760 2760 + out: 2761 2761 + ath12k_qmi_free_target_mem_chunk(ab); 2683 2762 return ret; 2684 2763 } 2685 2764 ··· 3108 2939 { 3109 2940 struct m3_mem_region *m3_mem = &ab->qmi.m3_mem; 3110 2941 2942 2942 + if (ab->hw_params->fw.m3_loader == ath12k_m3_fw_loader_remoteproc) 2943 2943 + return; 2944 2944 + 3111 2945 if (!m3_mem->vaddr) 3112 2946 return; 3113 2947 ··· 3191 3019 struct qmi_txn txn; 3192 3020 int ret = 0; 3193 3021 3194 3194 - ret = ath12k_qmi_m3_load(ab); 3195 3195 - if (ret) { 3196 3196 - ath12k_err(ab, "failed to load m3 firmware: %d", ret); 3197 3197 - return ret; 3022 3022 + if (ab->hw_params->fw.m3_loader == ath12k_m3_fw_loader_driver) { 3023 3023 + ret = ath12k_qmi_m3_load(ab); 3024 3024 + if (ret) { 3025 3025 + ath12k_err(ab, "failed to load m3 firmware: %d", ret); 3026 3026 + return ret; 3027 3027 + } 3028 3028 + req.addr = m3_mem->paddr; 3029 3029 + req.size = m3_mem->size; 3198 3030 } 3199 3199 - 3200 3200 - req.addr = m3_mem->paddr; 3201 3201 - req.size = m3_mem->size; 3202 3031 3203 3032 ret = qmi_txn_init(&ab->qmi.handle, &txn, 3204 3033 qmi_wlanfw_m3_info_resp_msg_v01_ei, &resp); ··· 3650 3477 msg->mem_seg[i].type, msg->mem_seg[i].size); 3651 3478 } 3652 3479 3653 3653 - ret = ath12k_qmi_alloc_target_mem_chunk(ab); 3654 3654 - if (ret) { 3655 3655 - ath12k_warn(ab, "qmi failed to alloc target memory: %d\n", 3656 3656 - ret); 3657 3657 - return; 3480 3480 + if (test_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags)) { 3481 3481 + ret = ath12k_qmi_assign_target_mem_chunk(ab); 3482 3482 + if (ret) { 3483 3483 + ath12k_warn(ab, "failed to assign qmi target memory: %d\n", 3484 3484 + ret); 3485 3485 + return; 3486 3486 + } 3487 3487 + } else { 3488 3488 + ret = ath12k_qmi_alloc_target_mem_chunk(ab); 3489 3489 + if (ret) { 3490 3490 + ath12k_warn(ab, "qmi failed to alloc target memory: %d\n", 3491 3491 + ret); 3492 3492 + return; 3493 3493 + } 3658 3494 } 3659 3495 3660 3496 ath12k_qmi_driver_event_post(qmi, ATH12K_QMI_EVENT_REQUEST_MEM, NULL);

+4 -1

drivers/net/wireless/ath/ath12k/qmi.h

reviewed

··· 1 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 2 /* 3 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 7 7 #ifndef ATH12K_QMI_H ··· 21 21 #define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_WCN7850 0x1 22 22 23 23 #define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9274 0x07 24 24 + #define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ5332 0x2 24 25 #define ATH12K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 32 25 26 #define ATH12K_QMI_RESP_LEN_MAX 8192 26 27 #define ATH12K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01 52 ··· 42 41 #define ATH12K_BOARD_ID_DEFAULT 0xFF 43 42 44 43 struct ath12k_base; 44 44 + struct ath12k_hw_group; 45 45 46 46 enum ath12k_qmi_file_type { 47 47 ATH12K_QMI_FILE_TYPE_BDF_GOLDEN = 0, ··· 623 621 int ath12k_qmi_init_service(struct ath12k_base *ab); 624 622 void ath12k_qmi_free_resource(struct ath12k_base *ab); 625 623 void ath12k_qmi_trigger_host_cap(struct ath12k_base *ab); 624 624 + void ath12k_qmi_reset_mlo_mem(struct ath12k_hw_group *ag); 626 625 627 626 #endif

+147 -30

drivers/net/wireless/ath/ath12k/reg.c

reviewed

··· 1 1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 2 /* 3 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 4 - * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 4 + * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 5 */ 6 6 #include <linux/rtnetlink.h> 7 7 #include "core.h" 8 8 #include "debug.h" 9 9 + #include "mac.h" 9 10 10 11 /* World regdom to be used in case default regd from fw is unavailable */ 11 12 #define ATH12K_2GHZ_CH01_11 REG_RULE(2412 - 10, 2462 + 10, 40, 0, 20, 0) ··· 49 48 { 50 49 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 51 50 struct ath12k_wmi_init_country_arg arg; 51 51 + struct wmi_set_current_country_arg current_arg = {}; 52 52 struct ath12k_hw *ah = ath12k_hw_to_ah(hw); 53 53 struct ath12k *ar = ath12k_ah_to_ar(ah, 0); 54 54 int ret, i; 55 55 56 56 ath12k_dbg(ar->ab, ATH12K_DBG_REG, 57 57 "Regulatory Notification received for %s\n", wiphy_name(wiphy)); 58 58 + 59 59 + if (request->initiator == NL80211_REGDOM_SET_BY_DRIVER) { 60 60 + ath12k_dbg(ar->ab, ATH12K_DBG_REG, 61 61 + "driver initiated regd update\n"); 62 62 + if (ah->state != ATH12K_HW_STATE_ON) 63 63 + return; 64 64 + 65 65 + for_each_ar(ah, ar, i) { 66 66 + ret = ath12k_reg_update_chan_list(ar, true); 67 67 + if (ret) { 68 68 + ath12k_warn(ar->ab, 69 69 + "failed to update chan list for pdev %u, ret %d\n", 70 70 + i, ret); 71 71 + break; 72 72 + } 73 73 + } 74 74 + return; 75 75 + } 58 76 59 77 /* Currently supporting only General User Hints. Cell base user 60 78 * hints to be handled later. ··· 97 77 return; 98 78 } 99 79 100 100 - /* Set the country code to the firmware and wait for 101 101 - * the WMI_REG_CHAN_LIST_CC EVENT for updating the 102 102 - * reg info 103 103 - */ 104 104 - arg.flags = ALPHA_IS_SET; 105 105 - memcpy(&arg.cc_info.alpha2, request->alpha2, 2); 106 106 - arg.cc_info.alpha2[2] = 0; 107 107 - 108 80 /* Allow fresh updates to wiphy regd */ 109 81 ah->regd_updated = false; 110 82 111 83 /* Send the reg change request to all the radios */ 112 84 for_each_ar(ah, ar, i) { 113 113 - ret = ath12k_wmi_send_init_country_cmd(ar, &arg); 114 114 - if (ret) 115 115 - ath12k_warn(ar->ab, 116 116 - "INIT Country code set to fw failed : %d\n", ret); 85 85 + if (ar->ab->hw_params->current_cc_support) { 86 86 + memcpy(&current_arg.alpha2, request->alpha2, 2); 87 87 + memcpy(&ar->alpha2, &current_arg.alpha2, 2); 88 88 + ret = ath12k_wmi_send_set_current_country_cmd(ar, &current_arg); 89 89 + if (ret) 90 90 + ath12k_warn(ar->ab, 91 91 + "failed set current country code: %d\n", ret); 92 92 + } else { 93 93 + arg.flags = ALPHA_IS_SET; 94 94 + memcpy(&arg.cc_info.alpha2, request->alpha2, 2); 95 95 + arg.cc_info.alpha2[2] = 0; 96 96 + 97 97 + ret = ath12k_wmi_send_init_country_cmd(ar, &arg); 98 98 + if (ret) 99 99 + ath12k_warn(ar->ab, 100 100 + "failed set INIT Country code: %d\n", ret); 101 101 + } 102 102 + 103 103 + wiphy_lock(wiphy); 104 104 + ath12k_mac_11d_scan_stop(ar); 105 105 + wiphy_unlock(wiphy); 106 106 + 107 107 + ar->regdom_set_by_user = true; 117 108 } 118 109 } 119 110 120 120 - int ath12k_reg_update_chan_list(struct ath12k *ar) 111 111 + int ath12k_reg_update_chan_list(struct ath12k *ar, bool wait) 121 112 { 122 113 struct ieee80211_supported_band **bands; 123 114 struct ath12k_wmi_scan_chan_list_arg *arg; ··· 137 106 struct ath12k_wmi_channel_arg *ch; 138 107 enum nl80211_band band; 139 108 int num_channels = 0; 140 140 - int i, ret; 109 109 + int i, ret, left; 110 110 + 111 111 + if (wait && ar->state_11d != ATH12K_11D_IDLE) { 112 112 + left = wait_for_completion_timeout(&ar->completed_11d_scan, 113 113 + ATH12K_SCAN_TIMEOUT_HZ); 114 114 + if (!left) { 115 115 + ath12k_dbg(ar->ab, ATH12K_DBG_REG, 116 116 + "failed to receive 11d scan complete: timed out\n"); 117 117 + ar->state_11d = ATH12K_11D_IDLE; 118 118 + } 119 119 + ath12k_dbg(ar->ab, ATH12K_DBG_REG, 120 120 + "reg 11d scan wait left time %d\n", left); 121 121 + } 122 122 + 123 123 + if (wait && 124 124 + (ar->scan.state == ATH12K_SCAN_STARTING || 125 125 + ar->scan.state == ATH12K_SCAN_RUNNING)) { 126 126 + left = wait_for_completion_timeout(&ar->scan.completed, 127 127 + ATH12K_SCAN_TIMEOUT_HZ); 128 128 + if (!left) 129 129 + ath12k_dbg(ar->ab, ATH12K_DBG_REG, 130 130 + "failed to receive hw scan complete: timed out\n"); 131 131 + 132 132 + ath12k_dbg(ar->ab, ATH12K_DBG_REG, 133 133 + "reg hw scan wait left time %d\n", left); 134 134 + } 135 135 + 136 136 + if (ar->ah->state == ATH12K_HW_STATE_RESTARTING) 137 137 + return 0; 141 138 142 139 bands = hw->wiphy->bands; 143 140 for (band = 0; band < NUM_NL80211_BANDS; band++) { ··· 265 206 266 207 int ath12k_regd_update(struct ath12k *ar, bool init) 267 208 { 209 209 + u32 phy_id, freq_low = 0, freq_high = 0, supported_bands, band; 210 210 + struct ath12k_wmi_hal_reg_capabilities_ext_arg *reg_cap; 268 211 struct ath12k_hw *ah = ath12k_ar_to_ah(ar); 269 212 struct ieee80211_hw *hw = ah->hw; 270 213 struct ieee80211_regdomain *regd, *regd_copy = NULL; 271 214 int ret, regd_len, pdev_id; 272 215 struct ath12k_base *ab; 273 273 - int i; 274 216 275 217 ab = ar->ab; 218 218 + 219 219 + supported_bands = ar->pdev->cap.supported_bands; 220 220 + if (supported_bands & WMI_HOST_WLAN_2GHZ_CAP) { 221 221 + band = NL80211_BAND_2GHZ; 222 222 + } else if (supported_bands & WMI_HOST_WLAN_5GHZ_CAP && !ar->supports_6ghz) { 223 223 + band = NL80211_BAND_5GHZ; 224 224 + } else if (supported_bands & WMI_HOST_WLAN_5GHZ_CAP && ar->supports_6ghz) { 225 225 + band = NL80211_BAND_6GHZ; 226 226 + } else { 227 227 + /* This condition is not expected. 228 228 + */ 229 229 + WARN_ON(1); 230 230 + ret = -EINVAL; 231 231 + goto err; 232 232 + } 233 233 + 234 234 + reg_cap = &ab->hal_reg_cap[ar->pdev_idx]; 235 235 + 236 236 + if (ab->hw_params->single_pdev_only && !ar->supports_6ghz) { 237 237 + phy_id = ar->pdev->cap.band[band].phy_id; 238 238 + reg_cap = &ab->hal_reg_cap[phy_id]; 239 239 + } 240 240 + 241 241 + /* Possible that due to reg change, current limits for supported 242 242 + * frequency changed. Update that 243 243 + */ 244 244 + if (supported_bands & WMI_HOST_WLAN_2GHZ_CAP) { 245 245 + freq_low = max(reg_cap->low_2ghz_chan, ab->reg_freq_2ghz.start_freq); 246 246 + freq_high = min(reg_cap->high_2ghz_chan, ab->reg_freq_2ghz.end_freq); 247 247 + } else if (supported_bands & WMI_HOST_WLAN_5GHZ_CAP && !ar->supports_6ghz) { 248 248 + freq_low = max(reg_cap->low_5ghz_chan, ab->reg_freq_5ghz.start_freq); 249 249 + freq_high = min(reg_cap->high_5ghz_chan, ab->reg_freq_5ghz.end_freq); 250 250 + } else if (supported_bands & WMI_HOST_WLAN_5GHZ_CAP && ar->supports_6ghz) { 251 251 + freq_low = max(reg_cap->low_5ghz_chan, ab->reg_freq_6ghz.start_freq); 252 252 + freq_high = min(reg_cap->high_5ghz_chan, ab->reg_freq_6ghz.end_freq); 253 253 + } 254 254 + 255 255 + ath12k_mac_update_freq_range(ar, freq_low, freq_high); 256 256 + 257 257 + ath12k_dbg(ab, ATH12K_DBG_REG, "pdev %u reg updated freq limits %u->%u MHz\n", 258 258 + ar->pdev->pdev_id, freq_low, freq_high); 276 259 277 260 /* If one of the radios within ah has already updated the regd for 278 261 * the wiphy, then avoid setting regd again ··· 376 275 goto err; 377 276 } 378 277 379 379 - rtnl_lock(); 380 380 - wiphy_lock(hw->wiphy); 381 381 - ret = regulatory_set_wiphy_regd_sync(hw->wiphy, regd_copy); 382 382 - wiphy_unlock(hw->wiphy); 383 383 - rtnl_unlock(); 278 278 + ret = regulatory_set_wiphy_regd(hw->wiphy, regd_copy); 384 279 385 280 kfree(regd_copy); 386 281 ··· 387 290 goto skip; 388 291 389 292 ah->regd_updated = true; 390 390 - /* Apply the new regd to all the radios, this is expected to be received only once 391 391 - * since we check for ah->regd_updated and allow here only once. 392 392 - */ 393 393 - for_each_ar(ah, ar, i) { 394 394 - ab = ar->ab; 395 395 - ret = ath12k_reg_update_chan_list(ar); 396 396 - if (ret) 397 397 - goto err; 398 398 - } 293 293 + 399 294 skip: 400 295 return 0; 401 296 err: ··· 700 611 *rule_idx = i; 701 612 } 702 613 614 614 + static void ath12k_reg_update_freq_range(struct ath12k_reg_freq *reg_freq, 615 615 + struct ath12k_reg_rule *reg_rule) 616 616 + { 617 617 + if (reg_freq->start_freq > reg_rule->start_freq) 618 618 + reg_freq->start_freq = reg_rule->start_freq; 619 619 + 620 620 + if (reg_freq->end_freq < reg_rule->end_freq) 621 621 + reg_freq->end_freq = reg_rule->end_freq; 622 622 + } 623 623 + 703 624 struct ieee80211_regdomain * 704 625 ath12k_reg_build_regd(struct ath12k_base *ab, 705 626 struct ath12k_reg_info *reg_info, bool intersect) ··· 753 654 "\r\nCountry %s, CFG Regdomain %s FW Regdomain %d, num_reg_rules %d\n", 754 655 alpha2, ath12k_reg_get_regdom_str(tmp_regd->dfs_region), 755 656 reg_info->dfs_region, num_rules); 657 657 + 658 658 + /* Reset start and end frequency for each band 659 659 + */ 660 660 + ab->reg_freq_5ghz.start_freq = INT_MAX; 661 661 + ab->reg_freq_5ghz.end_freq = 0; 662 662 + ab->reg_freq_2ghz.start_freq = INT_MAX; 663 663 + ab->reg_freq_2ghz.end_freq = 0; 664 664 + ab->reg_freq_6ghz.start_freq = INT_MAX; 665 665 + ab->reg_freq_6ghz.end_freq = 0; 666 666 + 756 667 /* Update reg_rules[] below. Firmware is expected to 757 668 * send these rules in order(2G rules first and then 5G) 758 669 */ ··· 773 664 max_bw = min_t(u16, reg_rule->max_bw, 774 665 reg_info->max_bw_2g); 775 666 flags = 0; 667 667 + ath12k_reg_update_freq_range(&ab->reg_freq_2ghz, reg_rule); 776 668 } else if (reg_info->num_5g_reg_rules && 777 669 (j < reg_info->num_5g_reg_rules)) { 778 670 reg_rule = reg_info->reg_rules_5g_ptr + j++; ··· 787 677 * per other BW rule flags we pass from here 788 678 */ 789 679 flags = NL80211_RRF_AUTO_BW; 680 680 + ath12k_reg_update_freq_range(&ab->reg_freq_5ghz, reg_rule); 790 681 } else if (reg_info->is_ext_reg_event && 791 682 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] && 792 683 (k < reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP])) { ··· 795 684 max_bw = min_t(u16, reg_rule->max_bw, 796 685 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP]); 797 686 flags = NL80211_RRF_AUTO_BW; 687 687 + ath12k_reg_update_freq_range(&ab->reg_freq_6ghz, reg_rule); 798 688 } else { 799 689 break; 800 690 } ··· 882 770 void ath12k_reg_init(struct ieee80211_hw *hw) 883 771 { 884 772 hw->wiphy->regulatory_flags = REGULATORY_WIPHY_SELF_MANAGED; 773 773 + hw->wiphy->flags |= WIPHY_FLAG_NOTIFY_REGDOM_BY_DRIVER; 885 774 hw->wiphy->reg_notifier = ath12k_reg_notifier; 886 775 } 887 776 ··· 890 777 { 891 778 int i; 892 779 780 780 + mutex_lock(&ab->core_lock); 893 781 for (i = 0; i < ab->hw_params->max_radios; i++) { 894 782 kfree(ab->default_regd[i]); 895 783 kfree(ab->new_regd[i]); 784 784 + ab->default_regd[i] = NULL; 785 785 + ab->new_regd[i] = NULL; 896 786 } 787 787 + mutex_unlock(&ab->core_lock); 897 788 }

+1 -1

drivers/net/wireless/ath/ath12k/reg.h

reviewed

··· 99 99 struct ath12k_reg_info *reg_info, 100 100 bool intersect); 101 101 int ath12k_regd_update(struct ath12k *ar, bool init); 102 102 - int ath12k_reg_update_chan_list(struct ath12k *ar); 102 102 + int ath12k_reg_update_chan_list(struct ath12k *ar, bool wait); 103 103 104 104 #endif

+2 -2

drivers/net/wireless/ath/ath12k/testmode.c

reviewed

··· 97 97 u8 const *buf_pos; 98 98 99 99 ath12k_dbg(ab, ATH12K_DBG_TESTMODE, 100 100 - "testmode event wmi cmd_id %d ftm event msg %pK datalen %d\n", 100 100 + "testmode event wmi cmd_id %d ftm event msg %p datalen %d\n", 101 101 cmd_id, ftm_msg, length); 102 102 ath12k_dbg_dump(ab, ATH12K_DBG_TESTMODE, NULL, "", ftm_msg, length); 103 103 pdev_id = DP_HW2SW_MACID(le32_to_cpu(ftm_msg->seg_hdr.pdev_id)); ··· 227 227 buf_len = nla_len(tb[ATH_TM_ATTR_DATA]); 228 228 cmd_id = WMI_PDEV_UTF_CMDID; 229 229 ath12k_dbg(ar->ab, ATH12K_DBG_TESTMODE, 230 230 - "testmode cmd wmi cmd_id %d buf %pK buf_len %d\n", 230 230 + "testmode cmd wmi cmd_id %d buf %p buf_len %d\n", 231 231 cmd_id, buf, buf_len); 232 232 ath12k_dbg_dump(ar->ab, ATH12K_DBG_TESTMODE, NULL, "", buf, buf_len); 233 233 bufpos = buf;

+282 -47

drivers/net/wireless/ath/ath12k/wmi.c

reviewed

··· 29 29 30 30 struct wmi_tlv_fw_stats_parse { 31 31 const struct wmi_stats_event *ev; 32 32 + struct ath12k_fw_stats *stats; 32 33 }; 33 34 34 35 struct ath12k_wmi_dma_ring_caps_parse { ··· 178 177 .min_len = sizeof(struct ath12k_wmi_p2p_noa_info) }, 179 178 [WMI_TAG_P2P_NOA_EVENT] = { 180 179 .min_len = sizeof(struct wmi_p2p_noa_event) }, 180 180 + [WMI_TAG_11D_NEW_COUNTRY_EVENT] = { 181 181 + .min_len = sizeof(struct wmi_11d_new_cc_event) }, 181 182 }; 182 183 183 184 __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len) ··· 523 520 * band to band for a single radio, need to see how this should be 524 521 * handled. 525 522 */ 526 526 - if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) { 523 523 + if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2GHZ_CAP) { 527 524 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g); 528 525 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g); 529 529 - } else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) { 526 526 + } else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5GHZ_CAP) { 530 527 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g); 531 528 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g); 532 529 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); ··· 549 546 pdev_cap->rx_chain_mask_shift = 550 547 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32); 551 548 552 552 - if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) { 549 549 + if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2GHZ_CAP) { 553 550 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ]; 554 551 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 555 552 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g); ··· 569 566 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]); 570 567 } 571 568 572 572 - if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) { 569 569 + if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5GHZ_CAP) { 573 570 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ]; 574 571 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 575 572 cap_band->max_bw_supported = ··· 1040 1037 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan, 1041 1038 struct wmi_vdev_start_req_arg *arg) 1042 1039 { 1040 1040 + u32 center_freq1 = arg->band_center_freq1; 1041 1041 + 1043 1042 memset(chan, 0, sizeof(*chan)); 1044 1043 1045 1044 chan->mhz = cpu_to_le32(arg->freq); 1046 1046 - chan->band_center_freq1 = cpu_to_le32(arg->band_center_freq1); 1047 1047 - if (arg->mode == MODE_11AC_VHT80_80) 1045 1045 + chan->band_center_freq1 = cpu_to_le32(center_freq1); 1046 1046 + if (arg->mode == MODE_11BE_EHT320) { 1047 1047 + if (arg->freq > center_freq1) 1048 1048 + chan->band_center_freq1 = cpu_to_le32(center_freq1 + 80); 1049 1049 + else 1050 1050 + chan->band_center_freq1 = cpu_to_le32(center_freq1 - 80); 1051 1051 + 1052 1052 + chan->band_center_freq2 = cpu_to_le32(center_freq1); 1053 1053 + 1054 1054 + } else if (arg->mode == MODE_11BE_EHT160) { 1055 1055 + if (arg->freq > center_freq1) 1056 1056 + chan->band_center_freq1 = cpu_to_le32(center_freq1 + 40); 1057 1057 + else 1058 1058 + chan->band_center_freq1 = cpu_to_le32(center_freq1 - 40); 1059 1059 + 1060 1060 + chan->band_center_freq2 = cpu_to_le32(center_freq1); 1061 1061 + } else if (arg->mode == MODE_11BE_EHT80_80) { 1048 1062 chan->band_center_freq2 = cpu_to_le32(arg->band_center_freq2); 1049 1049 - else 1063 1063 + } else { 1050 1064 chan->band_center_freq2 = 0; 1065 1065 + } 1051 1066 1052 1067 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE); 1053 1068 if (arg->passive) ··· 2372 2351 2373 2352 for (i = 0; i < arg->peer_eht_mcs_count; i++) { 2374 2353 eht_mcs = ptr; 2375 2375 - eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET, 2354 2354 + eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_EHT_RATE_SET, 2376 2355 sizeof(*eht_mcs)); 2377 2356 2378 2357 eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]); ··· 2612 2591 cmd->scan_id = cpu_to_le32(arg->scan_id); 2613 2592 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id); 2614 2593 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2615 2615 - cmd->scan_priority = cpu_to_le32(arg->scan_priority); 2594 2594 + if (ar->state_11d == ATH12K_11D_PREPARING) 2595 2595 + arg->scan_priority = WMI_SCAN_PRIORITY_MEDIUM; 2596 2596 + else 2597 2597 + arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 2616 2598 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events); 2617 2599 2618 2600 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg); ··· 3337 3313 return ret; 3338 3314 } 3339 3315 3316 3316 + int ath12k_wmi_send_set_current_country_cmd(struct ath12k *ar, 3317 3317 + struct wmi_set_current_country_arg *arg) 3318 3318 + { 3319 3319 + struct ath12k_wmi_pdev *wmi = ar->wmi; 3320 3320 + struct wmi_set_current_country_cmd *cmd; 3321 3321 + struct sk_buff *skb; 3322 3322 + int ret; 3323 3323 + 3324 3324 + skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3325 3325 + if (!skb) 3326 3326 + return -ENOMEM; 3327 3327 + 3328 3328 + cmd = (struct wmi_set_current_country_cmd *)skb->data; 3329 3329 + cmd->tlv_header = 3330 3330 + ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_CURRENT_COUNTRY_CMD, 3331 3331 + sizeof(*cmd)); 3332 3332 + 3333 3333 + cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 3334 3334 + memcpy(&cmd->new_alpha2, &arg->alpha2, sizeof(arg->alpha2)); 3335 3335 + ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SET_CURRENT_COUNTRY_CMDID); 3336 3336 + 3337 3337 + ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3338 3338 + "set current country pdev id %d alpha2 %c%c\n", 3339 3339 + ar->pdev->pdev_id, 3340 3340 + arg->alpha2[0], 3341 3341 + arg->alpha2[1]); 3342 3342 + 3343 3343 + if (ret) { 3344 3344 + ath12k_warn(ar->ab, 3345 3345 + "failed to send WMI_SET_CURRENT_COUNTRY_CMDID: %d\n", ret); 3346 3346 + dev_kfree_skb(skb); 3347 3347 + } 3348 3348 + 3349 3349 + return ret; 3350 3350 + } 3351 3351 + 3352 3352 + int ath12k_wmi_send_11d_scan_start_cmd(struct ath12k *ar, 3353 3353 + struct wmi_11d_scan_start_arg *arg) 3354 3354 + { 3355 3355 + struct ath12k_wmi_pdev *wmi = ar->wmi; 3356 3356 + struct wmi_11d_scan_start_cmd *cmd; 3357 3357 + struct sk_buff *skb; 3358 3358 + int ret; 3359 3359 + 3360 3360 + skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3361 3361 + if (!skb) 3362 3362 + return -ENOMEM; 3363 3363 + 3364 3364 + cmd = (struct wmi_11d_scan_start_cmd *)skb->data; 3365 3365 + cmd->tlv_header = 3366 3366 + ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_START_CMD, 3367 3367 + sizeof(*cmd)); 3368 3368 + 3369 3369 + cmd->vdev_id = cpu_to_le32(arg->vdev_id); 3370 3370 + cmd->scan_period_msec = cpu_to_le32(arg->scan_period_msec); 3371 3371 + cmd->start_interval_msec = cpu_to_le32(arg->start_interval_msec); 3372 3372 + ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_START_CMDID); 3373 3373 + 3374 3374 + ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3375 3375 + "send 11d scan start vdev id %d period %d ms internal %d ms\n", 3376 3376 + arg->vdev_id, arg->scan_period_msec, 3377 3377 + arg->start_interval_msec); 3378 3378 + 3379 3379 + if (ret) { 3380 3380 + ath12k_warn(ar->ab, 3381 3381 + "failed to send WMI_11D_SCAN_START_CMDID: %d\n", ret); 3382 3382 + dev_kfree_skb(skb); 3383 3383 + } 3384 3384 + 3385 3385 + return ret; 3386 3386 + } 3387 3387 + 3388 3388 + int ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k *ar, u32 vdev_id) 3389 3389 + { 3390 3390 + struct ath12k_wmi_pdev *wmi = ar->wmi; 3391 3391 + struct wmi_11d_scan_stop_cmd *cmd; 3392 3392 + struct sk_buff *skb; 3393 3393 + int ret; 3394 3394 + 3395 3395 + skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3396 3396 + if (!skb) 3397 3397 + return -ENOMEM; 3398 3398 + 3399 3399 + cmd = (struct wmi_11d_scan_stop_cmd *)skb->data; 3400 3400 + cmd->tlv_header = 3401 3401 + ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_STOP_CMD, 3402 3402 + sizeof(*cmd)); 3403 3403 + 3404 3404 + cmd->vdev_id = cpu_to_le32(vdev_id); 3405 3405 + ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_STOP_CMDID); 3406 3406 + 3407 3407 + ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3408 3408 + "send 11d scan stop vdev id %d\n", 3409 3409 + cmd->vdev_id); 3410 3410 + 3411 3411 + if (ret) { 3412 3412 + ath12k_warn(ar->ab, 3413 3413 + "failed to send WMI_11D_SCAN_STOP_CMDID: %d\n", ret); 3414 3414 + dev_kfree_skb(skb); 3415 3415 + } 3416 3416 + 3417 3417 + return ret; 3418 3418 + } 3419 3419 + 3340 3420 int 3341 3421 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id) 3342 3422 { ··· 3774 3646 arg[i].pdev_id = pdev->pdev_id; 3775 3647 3776 3648 switch (pdev->cap.supported_bands) { 3777 3777 - case WMI_HOST_WLAN_2G_5G_CAP: 3649 3649 + case WMI_HOST_WLAN_2GHZ_5GHZ_CAP: 3778 3650 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3779 3651 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3780 3652 break; 3781 3781 - case WMI_HOST_WLAN_2G_CAP: 3653 3653 + case WMI_HOST_WLAN_2GHZ_CAP: 3782 3654 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3783 3655 arg[i].end_freq = hal_reg_cap->high_2ghz_chan; 3784 3656 break; 3785 3785 - case WMI_HOST_WLAN_5G_CAP: 3657 3657 + case WMI_HOST_WLAN_5GHZ_CAP: 3786 3658 arg[i].start_freq = hal_reg_cap->low_5ghz_chan; 3787 3659 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3788 3660 break; ··· 3793 3665 } 3794 3666 3795 3667 static void 3796 3796 - ath12k_wmi_copy_resource_config(struct ath12k_wmi_resource_config_params *wmi_cfg, 3668 3668 + ath12k_wmi_copy_resource_config(struct ath12k_base *ab, 3669 3669 + struct ath12k_wmi_resource_config_params *wmi_cfg, 3797 3670 struct ath12k_wmi_resource_config_arg *tg_cfg) 3798 3671 { 3799 3672 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs); ··· 3861 3732 WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION); 3862 3733 wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported << 3863 3734 WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT); 3735 3735 + if (ab->hw_params->reoq_lut_support) 3736 3736 + wmi_cfg->host_service_flags |= 3737 3737 + cpu_to_le32(1 << WMI_RSRC_CFG_HOST_SVC_FLAG_REO_QREF_SUPPORT_BIT); 3864 3738 wmi_cfg->ema_max_vap_cnt = cpu_to_le32(tg_cfg->ema_max_vap_cnt); 3865 3739 wmi_cfg->ema_max_profile_period = cpu_to_le32(tg_cfg->ema_max_profile_period); 3866 3740 wmi_cfg->flags2 |= cpu_to_le32(WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET); ··· 3904 3772 ptr = skb->data + sizeof(*cmd); 3905 3773 cfg = ptr; 3906 3774 3907 3907 - ath12k_wmi_copy_resource_config(cfg, &arg->res_cfg); 3775 3775 + ath12k_wmi_copy_resource_config(ab, cfg, &arg->res_cfg); 3908 3776 3909 3777 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG, 3910 3778 sizeof(*cfg)); ··· 4831 4699 bands = pdev->cap.supported_bands; 4832 4700 } 4833 4701 4834 4834 - if (bands & WMI_HOST_WLAN_2G_CAP) { 4702 4702 + if (bands & WMI_HOST_WLAN_2GHZ_CAP) { 4835 4703 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ, 4836 4704 caps->eht_cap_mac_info_2ghz, 4837 4705 caps->eht_cap_phy_info_2ghz, ··· 4840 4708 caps->eht_cap_info_internal); 4841 4709 } 4842 4710 4843 4843 - if (bands & WMI_HOST_WLAN_5G_CAP) { 4711 4711 + if (bands & WMI_HOST_WLAN_5GHZ_CAP) { 4844 4712 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ, 4845 4713 caps->eht_cap_mac_info_5ghz, 4846 4714 caps->eht_cap_phy_info_5ghz, ··· 5054 4922 for (count = 0; count < num_reg_rules; count++) { 5055 4923 start_freq = le32_get_bits(rule[count].freq_info, REG_RULE_START_FREQ); 5056 4924 5057 5057 - if (start_freq >= ATH12K_MIN_6G_FREQ) 4925 4925 + if (start_freq >= ATH12K_MIN_6GHZ_FREQ) 5058 4926 num_invalid_5ghz_rules++; 5059 4927 } 5060 4928 ··· 5124 4992 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 5125 4993 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i]; 5126 4994 5127 5127 - if (num_6g_reg_rules_ap[i] > MAX_6G_REG_RULES) { 4995 4995 + if (num_6g_reg_rules_ap[i] > MAX_6GHZ_REG_RULES) { 5128 4996 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n", 5129 5129 - i, num_6g_reg_rules_ap[i], MAX_6G_REG_RULES); 4997 4997 + i, num_6g_reg_rules_ap[i], MAX_6GHZ_REG_RULES); 5130 4998 kfree(tb); 5131 4999 return -EINVAL; 5132 5000 } ··· 5147 5015 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 5148 5016 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 5149 5017 5150 5150 - if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6G_REG_RULES || 5151 5151 - num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6G_REG_RULES || 5152 5152 - num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6G_REG_RULES) { 5018 5018 + if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6GHZ_REG_RULES || 5019 5019 + num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6GHZ_REG_RULES || 5020 5020 + num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6GHZ_REG_RULES) { 5153 5021 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n", 5154 5022 i); 5155 5023 kfree(tb); ··· 6065 5933 wake_up(&ab->wmi_ab.tx_credits_wq); 6066 5934 } 6067 5935 5936 5936 + static int ath12k_reg_11d_new_cc_event(struct ath12k_base *ab, struct sk_buff *skb) 5937 5937 + { 5938 5938 + const struct wmi_11d_new_cc_event *ev; 5939 5939 + struct ath12k *ar; 5940 5940 + struct ath12k_pdev *pdev; 5941 5941 + const void **tb; 5942 5942 + int ret, i; 5943 5943 + 5944 5944 + tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5945 5945 + if (IS_ERR(tb)) { 5946 5946 + ret = PTR_ERR(tb); 5947 5947 + ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5948 5948 + return ret; 5949 5949 + } 5950 5950 + 5951 5951 + ev = tb[WMI_TAG_11D_NEW_COUNTRY_EVENT]; 5952 5952 + if (!ev) { 5953 5953 + kfree(tb); 5954 5954 + ath12k_warn(ab, "failed to fetch 11d new cc ev"); 5955 5955 + return -EPROTO; 5956 5956 + } 5957 5957 + 5958 5958 + spin_lock_bh(&ab->base_lock); 5959 5959 + memcpy(&ab->new_alpha2, &ev->new_alpha2, REG_ALPHA2_LEN); 5960 5960 + spin_unlock_bh(&ab->base_lock); 5961 5961 + 5962 5962 + ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi 11d new cc %c%c\n", 5963 5963 + ab->new_alpha2[0], 5964 5964 + ab->new_alpha2[1]); 5965 5965 + 5966 5966 + kfree(tb); 5967 5967 + 5968 5968 + for (i = 0; i < ab->num_radios; i++) { 5969 5969 + pdev = &ab->pdevs[i]; 5970 5970 + ar = pdev->ar; 5971 5971 + ar->state_11d = ATH12K_11D_IDLE; 5972 5972 + complete(&ar->completed_11d_scan); 5973 5973 + } 5974 5974 + 5975 5975 + queue_work(ab->workqueue, &ab->update_11d_work); 5976 5976 + 5977 5977 + return 0; 5978 5978 + } 5979 5979 + 6068 5980 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab, 6069 5981 struct sk_buff *skb) 6070 5982 { ··· 6493 6317 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC) 6494 6318 status->flag |= RX_FLAG_MMIC_ERROR; 6495 6319 6496 6496 - if (rx_ev.chan_freq >= ATH12K_MIN_6G_FREQ && 6497 6497 - rx_ev.chan_freq <= ATH12K_MAX_6G_FREQ) { 6320 6320 + if (rx_ev.chan_freq >= ATH12K_MIN_6GHZ_FREQ && 6321 6321 + rx_ev.chan_freq <= ATH12K_MAX_6GHZ_FREQ) { 6498 6322 status->band = NL80211_BAND_6GHZ; 6499 6323 status->freq = rx_ev.chan_freq; 6500 6324 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) { 6501 6325 status->band = NL80211_BAND_2GHZ; 6502 6502 - } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5G_CHAN) { 6326 6326 + } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5GHZ_CHAN) { 6503 6327 status->band = NL80211_BAND_5GHZ; 6504 6328 } else { 6505 6329 /* Shouldn't happen unless list of advertised channels to ··· 7392 7216 else 7393 7217 buf[len] = 0; 7394 7218 7395 7395 - ath12k_debugfs_fw_stats_reset(ar); 7219 7219 + ath12k_fw_stats_reset(ar); 7396 7220 } 7397 7221 7398 7222 static void ··· 7511 7335 u16 len) 7512 7336 { 7513 7337 const struct wmi_stats_event *ev = parse->ev; 7514 7514 - struct ath12k_fw_stats stats = {0}; 7338 7338 + struct ath12k_fw_stats *stats = parse->stats; 7515 7339 struct ath12k *ar; 7516 7340 struct ath12k_link_vif *arvif; 7517 7341 struct ieee80211_sta *sta; ··· 7520 7344 int i, ret = 0; 7521 7345 const void *data = ptr; 7522 7346 7523 7523 - INIT_LIST_HEAD(&stats.vdevs); 7524 7524 - INIT_LIST_HEAD(&stats.bcn); 7525 7525 - INIT_LIST_HEAD(&stats.pdevs); 7526 7526 - 7527 7347 if (!ev) { 7528 7348 ath12k_warn(ab, "failed to fetch update stats ev"); 7529 7349 return -EPROTO; 7530 7350 } 7531 7351 7352 7352 + if (!stats) 7353 7353 + return -EINVAL; 7354 7354 + 7532 7355 rcu_read_lock(); 7533 7356 7534 7534 - ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id)); 7357 7357 + stats->pdev_id = le32_to_cpu(ev->pdev_id); 7358 7358 + ar = ath12k_mac_get_ar_by_pdev_id(ab, stats->pdev_id); 7535 7359 if (!ar) { 7536 7360 ath12k_warn(ab, "invalid pdev id %d in update stats event\n", 7537 7361 le32_to_cpu(ev->pdev_id)); ··· 7574 7398 if (!dst) 7575 7399 continue; 7576 7400 ath12k_wmi_pull_vdev_stats(src, dst); 7577 7577 - stats.stats_id = WMI_REQUEST_VDEV_STAT; 7578 7578 - list_add_tail(&dst->list, &stats.vdevs); 7401 7401 + stats->stats_id = WMI_REQUEST_VDEV_STAT; 7402 7402 + list_add_tail(&dst->list, &stats->vdevs); 7579 7403 } 7580 7404 for (i = 0; i < le32_to_cpu(ev->num_bcn_stats); i++) { 7581 7405 const struct ath12k_wmi_bcn_stats_params *src; ··· 7593 7417 if (!dst) 7594 7418 continue; 7595 7419 ath12k_wmi_pull_bcn_stats(src, dst); 7596 7596 - stats.stats_id = WMI_REQUEST_BCN_STAT; 7597 7597 - list_add_tail(&dst->list, &stats.bcn); 7420 7420 + stats->stats_id = WMI_REQUEST_BCN_STAT; 7421 7421 + list_add_tail(&dst->list, &stats->bcn); 7598 7422 } 7599 7423 for (i = 0; i < le32_to_cpu(ev->num_pdev_stats); i++) { 7600 7424 const struct ath12k_wmi_pdev_stats_params *src; ··· 7606 7430 goto exit; 7607 7431 } 7608 7432 7609 7609 - stats.stats_id = WMI_REQUEST_PDEV_STAT; 7433 7433 + stats->stats_id = WMI_REQUEST_PDEV_STAT; 7610 7434 7611 7435 data += sizeof(*src); 7612 7436 len -= sizeof(*src); ··· 7618 7442 ath12k_wmi_pull_pdev_stats_base(&src->base, dst); 7619 7443 ath12k_wmi_pull_pdev_stats_tx(&src->tx, dst); 7620 7444 ath12k_wmi_pull_pdev_stats_rx(&src->rx, dst); 7621 7621 - list_add_tail(&dst->list, &stats.pdevs); 7445 7445 + list_add_tail(&dst->list, &stats->pdevs); 7622 7446 } 7623 7447 7624 7624 - complete(&ar->fw_stats_complete); 7625 7625 - ath12k_debugfs_fw_stats_process(ar, &stats); 7626 7448 exit: 7627 7449 rcu_read_unlock(); 7628 7450 return ret; ··· 7646 7472 return ret; 7647 7473 } 7648 7474 7649 7649 - static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb) 7475 7475 + static int ath12k_wmi_pull_fw_stats(struct ath12k_base *ab, struct sk_buff *skb, 7476 7476 + struct ath12k_fw_stats *stats) 7650 7477 { 7651 7651 - int ret; 7652 7478 struct wmi_tlv_fw_stats_parse parse = {}; 7653 7479 7654 7654 - ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 7655 7655 - ath12k_wmi_tlv_fw_stats_parse, 7656 7656 - &parse); 7657 7657 - if (ret) 7658 7658 - ath12k_warn(ab, "failed to parse fw stats %d\n", ret); 7480 7480 + stats->stats_id = 0; 7481 7481 + parse.stats = stats; 7482 7482 + 7483 7483 + return ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 7484 7484 + ath12k_wmi_tlv_fw_stats_parse, 7485 7485 + &parse); 7486 7486 + } 7487 7487 + 7488 7488 + static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb) 7489 7489 + { 7490 7490 + struct ath12k_fw_stats stats = {}; 7491 7491 + struct ath12k *ar; 7492 7492 + int ret; 7493 7493 + 7494 7494 + INIT_LIST_HEAD(&stats.pdevs); 7495 7495 + INIT_LIST_HEAD(&stats.vdevs); 7496 7496 + INIT_LIST_HEAD(&stats.bcn); 7497 7497 + 7498 7498 + ret = ath12k_wmi_pull_fw_stats(ab, skb, &stats); 7499 7499 + if (ret) { 7500 7500 + ath12k_warn(ab, "failed to pull fw stats: %d\n", ret); 7501 7501 + goto free; 7502 7502 + } 7503 7503 + 7504 7504 + ath12k_dbg(ab, ATH12K_DBG_WMI, "event update stats"); 7505 7505 + 7506 7506 + rcu_read_lock(); 7507 7507 + ar = ath12k_mac_get_ar_by_pdev_id(ab, stats.pdev_id); 7508 7508 + if (!ar) { 7509 7509 + rcu_read_unlock(); 7510 7510 + ath12k_warn(ab, "failed to get ar for pdev_id %d: %d\n", 7511 7511 + stats.pdev_id, ret); 7512 7512 + goto free; 7513 7513 + } 7514 7514 + 7515 7515 + spin_lock_bh(&ar->data_lock); 7516 7516 + 7517 7517 + /* WMI_REQUEST_PDEV_STAT can be requested via .get_txpower mac ops or via 7518 7518 + * debugfs fw stats. Therefore, processing it separately. 7519 7519 + */ 7520 7520 + if (stats.stats_id == WMI_REQUEST_PDEV_STAT) { 7521 7521 + list_splice_tail_init(&stats.pdevs, &ar->fw_stats.pdevs); 7522 7522 + ar->fw_stats.fw_stats_done = true; 7523 7523 + goto complete; 7524 7524 + } 7525 7525 + 7526 7526 + /* WMI_REQUEST_VDEV_STAT and WMI_REQUEST_BCN_STAT are currently requested only 7527 7527 + * via debugfs fw stats. Hence, processing these in debugfs context. 7528 7528 + */ 7529 7529 + ath12k_debugfs_fw_stats_process(ar, &stats); 7530 7530 + 7531 7531 + complete: 7532 7532 + complete(&ar->fw_stats_complete); 7533 7533 + spin_unlock_bh(&ar->data_lock); 7534 7534 + rcu_read_unlock(); 7535 7535 + 7536 7536 + /* Since the stats's pdev, vdev and beacon list are spliced and reinitialised 7537 7537 + * at this point, no need to free the individual list. 7538 7538 + */ 7539 7539 + return; 7540 7540 + 7541 7541 + free: 7542 7542 + ath12k_fw_stats_free(&stats); 7659 7543 } 7660 7544 7661 7545 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned ··· 8871 8639 break; 8872 8640 case WMI_HALPHY_STATS_CTRL_PATH_EVENTID: 8873 8641 ath12k_wmi_process_tpc_stats(ab, skb); 8642 8642 + break; 8643 8643 + case WMI_11D_NEW_COUNTRY_EVENTID: 8644 8644 + ath12k_reg_11d_new_cc_event(ab, skb); 8874 8645 break; 8875 8646 /* add Unsupported events (rare) here */ 8876 8647 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID:

+47 -8

drivers/net/wireless/ath/ath12k/wmi.h

reviewed

··· 216 216 }; 217 217 218 218 enum WMI_HOST_WLAN_BAND { 219 219 - WMI_HOST_WLAN_2G_CAP = 1, 220 220 - WMI_HOST_WLAN_5G_CAP = 2, 221 221 - WMI_HOST_WLAN_2G_5G_CAP = 3, 219 219 + WMI_HOST_WLAN_2GHZ_CAP = 1, 220 220 + WMI_HOST_WLAN_5GHZ_CAP = 2, 221 221 + WMI_HOST_WLAN_2GHZ_5GHZ_CAP = 3, 222 222 }; 223 223 224 224 enum wmi_cmd_group { ··· 2461 2461 } __packed; 2462 2462 2463 2463 #define WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT 4 2464 2464 + #define WMI_RSRC_CFG_HOST_SVC_FLAG_REO_QREF_SUPPORT_BIT 12 2464 2465 #define WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION GENMASK(5, 4) 2465 2466 #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5) 2466 2467 #define WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET BIT(9) ··· 2691 2690 * 2 - index for 160 MHz, first 3 bytes valid 2692 2691 * 3 - index for 320 MHz, first 3 bytes valid 2693 2692 */ 2694 2694 - #define WMI_MAX_EHT_SUPP_MCS_2G_SIZE 2 2695 2695 - #define WMI_MAX_EHT_SUPP_MCS_5G_SIZE 4 2693 2693 + #define WMI_MAX_EHT_SUPP_MCS_2GHZ_SIZE 2 2694 2694 + #define WMI_MAX_EHT_SUPP_MCS_5GHZ_SIZE 4 2696 2695 2697 2696 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_80 0 2698 2697 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_160 1 ··· 2731 2730 struct ath12k_wmi_ppe_threshold_params eht_ppet_2ghz; 2732 2731 struct ath12k_wmi_ppe_threshold_params eht_ppet_5ghz; 2733 2732 __le32 eht_cap_info_internal; 2734 2734 - __le32 eht_supp_mcs_ext_2ghz[WMI_MAX_EHT_SUPP_MCS_2G_SIZE]; 2735 2735 - __le32 eht_supp_mcs_ext_5ghz[WMI_MAX_EHT_SUPP_MCS_5G_SIZE]; 2733 2733 + __le32 eht_supp_mcs_ext_2ghz[WMI_MAX_EHT_SUPP_MCS_2GHZ_SIZE]; 2734 2734 + __le32 eht_supp_mcs_ext_5ghz[WMI_MAX_EHT_SUPP_MCS_5GHZ_SIZE]; 2736 2735 __le32 eml_capability; 2737 2736 __le32 mld_capability; 2738 2737 } __packed; ··· 4027 4026 } cc_info; 4028 4027 } __packed; 4029 4028 4029 4029 + struct wmi_11d_scan_start_arg { 4030 4030 + u32 vdev_id; 4031 4031 + u32 scan_period_msec; 4032 4032 + u32 start_interval_msec; 4033 4033 + }; 4034 4034 + 4035 4035 + struct wmi_11d_scan_start_cmd { 4036 4036 + __le32 tlv_header; 4037 4037 + __le32 vdev_id; 4038 4038 + __le32 scan_period_msec; 4039 4039 + __le32 start_interval_msec; 4040 4040 + } __packed; 4041 4041 + 4042 4042 + struct wmi_11d_scan_stop_cmd { 4043 4043 + __le32 tlv_header; 4044 4044 + __le32 vdev_id; 4045 4045 + } __packed; 4046 4046 + 4047 4047 + struct wmi_11d_new_cc_event { 4048 4048 + __le32 new_alpha2; 4049 4049 + } __packed; 4050 4050 + 4030 4051 struct wmi_delba_send_cmd { 4031 4052 __le32 tlv_header; 4032 4053 __le32 vdev_id; ··· 4131 4108 4132 4109 #define MAX_REG_RULES 10 4133 4110 #define REG_ALPHA2_LEN 2 4134 4134 - #define MAX_6G_REG_RULES 5 4111 4111 + #define MAX_6GHZ_REG_RULES 5 4112 4112 + 4113 4113 + struct wmi_set_current_country_arg { 4114 4114 + u8 alpha2[REG_ALPHA2_LEN]; 4115 4115 + }; 4116 4116 + 4117 4117 + struct wmi_set_current_country_cmd { 4118 4118 + __le32 tlv_header; 4119 4119 + __le32 pdev_id; 4120 4120 + __le32 new_alpha2; 4121 4121 + } __packed; 4135 4122 4136 4123 enum wmi_start_event_param { 4137 4124 WMI_VDEV_START_RESP_EVENT = 0, ··· 6023 5990 u32 vdev_id, u32 bcn_ctrl_op); 6024 5991 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 6025 5992 struct ath12k_wmi_init_country_arg *arg); 5993 5993 + int 5994 5994 + ath12k_wmi_send_set_current_country_cmd(struct ath12k *ar, 5995 5995 + struct wmi_set_current_country_arg *arg); 6026 5996 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 6027 5997 int vdev_id, const u8 *addr, 6028 5998 dma_addr_t paddr, u8 tid, 6029 5999 u8 ba_window_size_valid, 6030 6000 u32 ba_window_size); 6001 6001 + int ath12k_wmi_send_11d_scan_start_cmd(struct ath12k *ar, 6002 6002 + struct wmi_11d_scan_start_arg *arg); 6003 6003 + int ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k *ar, u32 vdev_id); 6031 6004 int 6032 6005 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 6033 6006 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg);

+1 -1

drivers/net/wireless/ath/wcn36xx/testmode.c

reviewed

··· 56 56 msg = buf; 57 57 58 58 wcn36xx_dbg(WCN36XX_DBG_TESTMODE, 59 59 - "testmode cmd wmi msg_id 0x%04X msg_len %d buf %pK buf_len %d\n", 59 59 + "testmode cmd wmi msg_id 0x%04X msg_len %d buf %p buf_len %d\n", 60 60 msg->msg_id, msg->msg_body_length, 61 61 buf, buf_len); 62 62

+2 -1

drivers/net/wireless/ath/wil6210/txrx.h

reviewed

··· 7 7 #ifndef WIL6210_TXRX_H 8 8 #define WIL6210_TXRX_H 9 9 10 10 + #include <net/sock.h> 10 11 #include "wil6210.h" 11 12 #include "txrx_edma.h" 12 13 ··· 618 617 const u8 *da = wil_skb_get_da(skb); 619 618 620 619 return is_unicast_ether_addr(da) && skb->sk && 621 621 - (skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS); 620 620 + sock_flag(skb->sk, SOCK_WIFI_STATUS); 622 621 } 623 622 624 623 static inline void wil_consume_skb(struct sk_buff *skb, bool acked)

+16 -7

drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c

reviewed

··· 741 741 void *buffer, int buflen) 742 742 { 743 743 int ret; 744 744 - char *tmpbuf; 744 744 + char *tmpbuf = NULL; 745 745 u16 size; 746 746 747 747 - if ((!devinfo) || (devinfo->ctl_urb == NULL)) 748 748 - return -EINVAL; 747 747 + if (!devinfo || !devinfo->ctl_urb) { 748 748 + ret = -EINVAL; 749 749 + goto err; 750 750 + } 749 751 750 752 tmpbuf = kmalloc(buflen, GFP_ATOMIC); 751 751 - if (!tmpbuf) 752 752 - return -ENOMEM; 753 753 + if (!tmpbuf) { 754 754 + ret = -ENOMEM; 755 755 + goto err; 756 756 + } 753 757 754 758 size = buflen; 755 759 devinfo->ctl_urb->transfer_buffer_length = size; ··· 774 770 ret = usb_submit_urb(devinfo->ctl_urb, GFP_ATOMIC); 775 771 if (ret < 0) { 776 772 brcmf_err("usb_submit_urb failed %d\n", ret); 777 777 - goto finalize; 773 773 + goto err; 778 774 } 779 775 780 776 if (!brcmf_usb_ioctl_resp_wait(devinfo)) { 781 777 usb_kill_urb(devinfo->ctl_urb); 782 778 ret = -ETIMEDOUT; 779 779 + goto err; 783 780 } else { 784 781 memcpy(buffer, tmpbuf, buflen); 785 782 } 786 783 787 787 - finalize: 788 784 kfree(tmpbuf); 785 785 + return 0; 786 786 + 787 787 + err: 788 788 + kfree(tmpbuf); 789 789 + brcmf_err("dl cmd %u failed: err=%d\n", cmd, ret); 789 790 return ret; 790 791 } 791 792

+3 -3

drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.c

reviewed

··· 198 198 #define CST4313_SPROM_OTP_SEL_SHIFT 0 199 199 200 200 /* 4313 Chip specific ChipControl register bits */ 201 201 - /* 12 mA drive strengh for later 4313 */ 201 201 + /* 12 mA drive strength for later 4313 */ 202 202 #define CCTRL_4313_12MA_LED_DRIVE 0x00000007 203 203 204 204 /* Manufacturer Ids */ ··· 453 453 /* get chipcommon chipstatus */ 454 454 sii->chipst = bcma_read32(cc, CHIPCREGOFFS(chipstatus)); 455 455 456 456 - /* get chipcommon capabilites */ 456 456 + /* get chipcommon capabilities */ 457 457 sii->pub.cccaps = bcma_read32(cc, CHIPCREGOFFS(capabilities)); 458 458 459 459 /* get pmu rev and caps */ ··· 657 657 } 658 658 659 659 /* 660 660 - * clock control policy function throught chipcommon 660 660 + * clock control policy function through chipcommon 661 661 * 662 662 * set dynamic clk control mode (forceslow, forcefast, dynamic) 663 663 * returns true if we are forcing fast clock

+1 -1

drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.h

reviewed

··· 76 76 * conventions for the use the flash space: 77 77 */ 78 78 79 79 - /* Minumum amount of flash we support */ 79 79 + /* Minimum amount of flash we support */ 80 80 #define FLASH_MIN 0x00020000 /* Minimum flash size */ 81 81 82 82 #define CC_SROM_OTP 0x800 /* SROM/OTP address space */

+2 -2

drivers/net/wireless/broadcom/brcm80211/brcmsmac/ampdu.c

reviewed

··· 479 479 480 480 /* 481 481 * Preps the given packet for AMPDU based on the session data. If the 482 482 - * frame cannot be accomodated in the current session, -ENOSPC is 482 482 + * frame cannot be accommodated in the current session, -ENOSPC is 483 483 * returned. 484 484 */ 485 485 int brcms_c_ampdu_add_frame(struct brcms_ampdu_session *session, ··· 529 529 } 530 530 531 531 /* 532 532 - * Now that we're sure this frame can be accomodated, update the 532 532 + * Now that we're sure this frame can be accommodated, update the 533 533 * session information. 534 534 */ 535 535 session->ampdu_len += len;

+2 -2

drivers/net/wireless/broadcom/brcm80211/brcmsmac/channel.c

reviewed

··· 445 445 446 446 /* 447 447 * OFDM 40 MHz SISO has the same power as the corresponding 448 448 - * MCS0-7 rate unless overriden by the locale specific code. 448 448 + * MCS0-7 rate unless overridden by the locale specific code. 449 449 * We set this value to 0 as a flag (presumably 0 dBm isn't 450 450 * a possibility) and then copy the MCS0-7 value to the 40 MHz 451 451 * value if it wasn't explicitly set. ··· 479 479 480 480 /* 481 481 * 20 MHz has the same power as the corresponding OFDM rate 482 482 - * unless overriden by the locale specific code. 482 482 + * unless overridden by the locale specific code. 483 483 */ 484 484 txpwr->mcs_20_siso[i] = txpwr->ofdm[i]; 485 485 txpwr->mcs_40_siso[i] = 0;

+1 -1

drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c

reviewed

··· 1348 1348 ret = brcms_c_ampdu_add_frame(session, p); 1349 1349 if (ret == -ENOSPC) { 1350 1350 /* 1351 1351 - * AMPDU cannot accomodate this frame. Close out the in- 1351 1351 + * AMPDU cannot accommodate this frame. Close out the in- 1352 1352 * progress AMPDU session and start a new one. 1353 1353 */ 1354 1354 ampdu_finalize(di);

+2 -2

drivers/net/wireless/broadcom/brcm80211/brcmsmac/mac80211_if.c

reviewed

··· 48 48 FIF_BCN_PRBRESP_PROMISC | \ 49 49 FIF_PSPOLL) 50 50 51 51 - #define CHAN2GHZ(channel, freqency, chflags) { \ 51 51 + #define CHAN2GHZ(channel, frequency, chflags) { \ 52 52 .band = NL80211_BAND_2GHZ, \ 53 53 - .center_freq = (freqency), \ 53 53 + .center_freq = (frequency), \ 54 54 .hw_value = (channel), \ 55 55 .flags = chflags, \ 56 56 .max_antenna_gain = 0, \

+2 -2

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

reviewed

··· 921 921 * The "fallback limit" is the number of tx attempts a given 922 922 * MPDU is sent at the "primary" rate. Tx attempts beyond that 923 923 * limit are sent at the "secondary" rate. 924 924 - * A 'short frame' does not exceed RTS treshold. 924 924 + * A 'short frame' does not exceed RTS threshold. 925 925 */ 926 926 u16 sfbl, /* Short Frame Rate Fallback Limit */ 927 927 lfbl, /* Long Frame Rate Fallback Limit */ ··· 6259 6259 } 6260 6260 6261 6261 /* 6262 6262 - * Currently only support same setting for primay and 6262 6262 + * Currently only support same setting for primary and 6263 6263 * fallback rates. Unify flags for each rate into a 6264 6264 * single value for the frame 6265 6265 */

+1 -1

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h

reviewed

··· 603 603 * cur_etheraddr: h/w address 604 604 * flags: BSSCFG flags; see below 605 605 * 606 606 - * current_bss: BSS parms in ASSOCIATED state 606 606 + * current_bss: BSS parameters in ASSOCIATED state 607 607 * 608 608 * 609 609 * ID: 'unique' ID of this bsscfg, assigned at bsscfg allocation

+1 -1

drivers/net/wireless/broadcom/brcm80211/brcmsmac/pmu.c

reviewed

··· 31 31 #define EXT_ILP_HZ 32768 32 32 33 33 /* 34 34 - * Duration for ILP clock frequency measurment in milliseconds 34 34 + * Duration for ILP clock frequency measurement in milliseconds 35 35 * 36 36 * remark: 1000 must be an integer multiple of this duration 37 37 */

+3

drivers/net/wireless/intel/iwlwifi/cfg/22000.c

reviewed

··· 44 44 IWL_QU_C_HR_B_FW_PRE "-" __stringify(api) ".ucode" 45 45 #define IWL_QU_B_JF_B_MODULE_FIRMWARE(api) \ 46 46 IWL_QU_B_JF_B_FW_PRE "-" __stringify(api) ".ucode" 47 47 + #define IWL_QU_C_JF_B_MODULE_FIRMWARE(api) \ 48 48 + IWL_QU_C_JF_B_FW_PRE "-" __stringify(api) ".ucode" 47 49 #define IWL_CC_A_MODULE_FIRMWARE(api) \ 48 50 IWL_CC_A_FW_PRE "-" __stringify(api) ".ucode" 49 51 ··· 424 422 MODULE_FIRMWARE(IWL_QU_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 425 423 MODULE_FIRMWARE(IWL_QU_C_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 426 424 MODULE_FIRMWARE(IWL_QU_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 425 425 + MODULE_FIRMWARE(IWL_QU_C_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 427 426 MODULE_FIRMWARE(IWL_QUZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 428 427 MODULE_FIRMWARE(IWL_QUZ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 429 428 MODULE_FIRMWARE(IWL_CC_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));

+4 -4

drivers/net/wireless/intel/iwlwifi/fw/api/dbg-tlv.h

reviewed

··· 527 527 * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA: override trigger data. 528 528 * Append otherwise 529 529 * @IWL_FW_INI_APPLY_POLICY_DUMP_COMPLETE_CMD: send cmd once dump collected 530 530 - * @IWL_FW_INI_APPLY_POLICY_RESET_HANDSHAKE: perform reset handshake and 531 531 - * split dump to before/after with region marking 530 530 + * @IWL_FW_INI_APPLY_POLICY_SPLIT_DUMP_RESET: split this dump into regions 531 531 + * before and after the reset handshake 532 532 */ 533 533 enum iwl_fw_ini_trigger_apply_policy { 534 534 IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT = BIT(0), ··· 537 537 IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG = BIT(9), 538 538 IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA = BIT(10), 539 539 IWL_FW_INI_APPLY_POLICY_DUMP_COMPLETE_CMD = BIT(16), 540 540 - IWL_FW_INI_APPLY_POLICY_RESET_HANDSHAKE = BIT(17), 540 540 + IWL_FW_INI_APPLY_POLICY_SPLIT_DUMP_RESET = BIT(17), 541 541 }; 542 542 543 543 /** ··· 560 560 * @IWL_FW_INI_DEBUG_DUMP_POLICY_MAX_LIMIT_600KB: mini dump only 600KB region dump 561 561 * @IWL_FW_IWL_DEBUG_DUMP_POLICY_MAX_LIMIT_5MB: mini dump 5MB size dump 562 562 * @IWL_FW_IWL_DEBUG_DUMP_POLICY_BEFORE_RESET: dump this region before reset 563 563 - * handshake (if requested by %IWL_FW_INI_APPLY_POLICY_RESET_HANDSHAKE) 563 563 + * handshake (if requested by %IWL_FW_INI_APPLY_POLICY_SPLIT_DUMP_RESET) 564 564 */ 565 565 enum iwl_fw_ini_dump_policy { 566 566 IWL_FW_INI_DEBUG_DUMP_POLICY_NO_LIMIT = BIT(0),

+6 -3

drivers/net/wireless/intel/iwlwifi/fw/api/phy-ctxt.h

reviewed

··· 1 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 2 /* 3 3 - * Copyright (C) 2012-2014, 2018, 2020-2024 Intel Corporation 3 3 + * Copyright (C) 2012-2014, 2018, 2020-2025 Intel Corporation 4 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 6 */ ··· 146 146 * @sbb_ctrl_channel_loc: location of the control channel 147 147 * @puncture_mask: bitmap of punctured subchannels 148 148 * @dsp_cfg_flags: set to 0 149 149 + * @secondary_ctrl_chnl_loc: location of secondary control channel 149 150 * @reserved: reserved to align to 64 bit 150 151 */ 151 152 struct iwl_phy_context_cmd { ··· 165 164 }; 166 165 }; 167 166 __le32 dsp_cfg_flags; 168 168 - __le32 reserved; 167 167 + u8 secondary_ctrl_chnl_loc; 168 168 + u8 reserved[3]; 169 169 } __packed; /* PHY_CONTEXT_CMD_API_VER_3, 170 170 * PHY_CONTEXT_CMD_API_VER_4, 171 171 * PHY_CONTEXT_CMD_API_VER_5, 172 172 - * PHY_CONTEXT_CMD_API_VER_6 172 172 + * PHY_CONTEXT_CMD_API_VER_6, 173 173 + * PHY_CONTEXT_CMD_API_S_VER_7 173 174 */ 174 175 175 176 #endif /* __iwl_fw_api_phy_ctxt_h__ */

+8 -7

drivers/net/wireless/intel/iwlwifi/fw/api/power.h

reviewed

··· 1 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 2 /* 3 3 - * Copyright (C) 2012-2014, 2018-2024 Intel Corporation 3 3 + * Copyright (C) 2012-2014, 2018-2025 Intel Corporation 4 4 * Copyright (C) 2013-2014 Intel Mobile Communications GmbH 5 5 * Copyright (C) 2015-2017 Intel Deutschland GmbH 6 6 */ ··· 54 54 * @flags: See &enum iwl_ltr_config_flags 55 55 * @static_long: static LTR Long register value. 56 56 * @static_short: static LTR Short register value. 57 57 - * @ltr_cfg_values: LTR parameters table values (in usec) in folowing order: 57 57 + * @ltr_cfg_values: LTR parameters table values (in usec) in following order: 58 58 * TX, RX, Short Idle, Long Idle. Used only if %LTR_CFG_FLAG_UPDATE_VALUES 59 59 * is set. 60 60 * @ltr_short_idle_timeout: LTR Short Idle timeout (in usec). Used only if ··· 89 89 * @POWER_FLAGS_LPRX_ENA_MSK: Low Power RX enable. 90 90 * @POWER_FLAGS_UAPSD_MISBEHAVING_ENA_MSK: AP/GO's uAPSD misbehaving 91 91 * detection enablement 92 92 + * @POWER_FLAGS_ENABLE_SMPS_MSK: SMPS is allowed for this vif 92 93 */ 93 94 enum iwl_power_flags { 94 95 POWER_FLAGS_POWER_SAVE_ENA_MSK = BIT(0), ··· 100 99 POWER_FLAGS_ADVANCE_PM_ENA_MSK = BIT(9), 101 100 POWER_FLAGS_LPRX_ENA_MSK = BIT(11), 102 101 POWER_FLAGS_UAPSD_MISBEHAVING_ENA_MSK = BIT(12), 102 102 + POWER_FLAGS_ENABLE_SMPS_MSK = BIT(14), 103 103 }; 104 104 105 105 #define IWL_POWER_VEC_SIZE 5 ··· 218 216 /* CONTEXT_DESC_API_T_VER_1 */ 219 217 __le32 id_and_color; 220 218 221 221 - /* CLIENT_PM_POWER_TABLE_S_VER_1 */ 222 219 __le16 flags; 223 220 __le16 keep_alive_seconds; 224 221 __le32 rx_data_timeout; ··· 238 237 u8 heavy_rx_thld_percentage; 239 238 u8 limited_ps_threshold; 240 239 u8 reserved; 241 241 - } __packed; 240 240 + } __packed; /* CLIENT_PM_POWER_TABLE_S_VER_1, VER_2 */ 242 241 243 242 /* 244 243 * struct iwl_uapsd_misbehaving_ap_notif - FW sends this notification when ··· 691 690 * Roaming Energy Delta Threshold, otherwise use normal Energy Delta 692 691 * Threshold. Typical energy threshold is -72dBm. 693 692 * @bf_temp_threshold: This threshold determines the type of temperature 694 694 - * filtering (Slow or Fast) that is selected (Units are in Celsuis): 693 693 + * filtering (Slow or Fast) that is selected (Units are in Celsius): 695 694 * If the current temperature is above this threshold - Fast filter 696 695 * will be used, If the current temperature is below this threshold - 697 696 * Slow filter will be used. ··· 699 698 * calculated for this and the last passed beacon is greater than this 700 699 * threshold. Zero value means that the temperature change is ignored for 701 700 * beacon filtering; beacons will not be forced to be sent to driver 702 702 - * regardless of whether its temerature has been changed. 701 701 + * regardless of whether its temperature has been changed. 703 702 * @bf_temp_slow_filter: Send Beacon to driver if delta in temperature values 704 703 * calculated for this and the last passed beacon is greater than this 705 704 * threshold. Zero value means that the temperature change is ignored for 706 705 * beacon filtering; beacons will not be forced to be sent to driver 707 707 - * regardless of whether its temerature has been changed. 706 706 + * regardless of whether its temperature has been changed. 708 707 * @bf_enable_beacon_filter: 1, beacon filtering is enabled; 0, disabled. 709 708 * @bf_debug_flag: beacon filtering debug configuration 710 709 * @bf_escape_timer: Send beacons to to driver if no beacons were passed

+9 -7

drivers/net/wireless/intel/iwlwifi/fw/api/rx.h

reviewed

··· 1 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 2 /* 3 3 - * Copyright (C) 2012-2014, 2018-2024 Intel Corporation 3 3 + * Copyright (C) 2012-2014, 2018-2025 Intel Corporation 4 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 5 * Copyright (C) 2015-2017 Intel Deutschland GmbH 6 6 */ ··· 193 193 IWL_RX_MPDU_AMSDU_LAST_SUBFRAME = 0x80, 194 194 }; 195 195 196 196 - #define RX_MPDU_BAND_POS 6 197 197 - #define RX_MPDU_BAND_MASK 0xC0 198 198 - #define BAND_IN_RX_STATUS(_val) \ 199 199 - (((_val) & RX_MPDU_BAND_MASK) >> RX_MPDU_BAND_POS) 196 196 + enum iwl_rx_mpdu_mac_phy_band { 197 197 + IWL_RX_MPDU_MAC_PHY_BAND_MAC_MASK = 0x0f, 198 198 + IWL_RX_MPDU_MAC_PHY_BAND_PHY_MASK = 0x30, 199 199 + IWL_RX_MPDU_MAC_PHY_BAND_BAND_MASK = 0xc0, 200 200 + }; 200 201 201 202 enum iwl_rx_l3_proto_values { 202 203 IWL_RX_L3_TYPE_NONE, ··· 669 668 */ 670 669 __le16 phy_info; 671 670 /** 672 672 - * @mac_phy_idx: MAC/PHY index 671 671 + * @mac_phy_band: MAC ID, PHY ID, band; 672 672 + * see &enum iwl_rx_mpdu_mac_phy_band 673 673 */ 674 674 - u8 mac_phy_idx; 674 674 + u8 mac_phy_band; 675 675 /* DW4 */ 676 676 union { 677 677 struct {

+4 -1

drivers/net/wireless/intel/iwlwifi/fw/api/stats.h

reviewed

··· 1 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 2 /* 3 3 - * Copyright (C) 2012-2014, 2018, 2020 - 2021, 2023 - 2024 Intel Corporation 3 3 + * Copyright (C) 2012-2014, 2018, 2020-2021, 2023-2025 Intel Corporation 4 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 6 */ ··· 583 583 __le32 fail_per_ch_width[IWL_STATS_MAX_BW_INDEX]; 584 584 __le32 last_tx_ch_width_indx; 585 585 } __packed; /* STATISTICS_NTFY_PER_PHY_API_S_VER_1 */ 586 586 + 587 587 + /* unknown channel load (due to not being active on channel) */ 588 588 + #define IWL_STATS_UNKNOWN_CHANNEL_LOAD 0xffffffff 586 589 587 590 /** 588 591 * struct iwl_stats_ntfy_per_sta

+12 -3

drivers/net/wireless/intel/iwlwifi/fw/dbg.c

reviewed

··· 2624 2624 IWL_INI_DUMP_LATE_REGIONS, 2625 2625 }; 2626 2626 2627 2627 + static bool iwl_dump_due_to_error(enum iwl_fw_ini_time_point tp_id) 2628 2628 + { 2629 2629 + return tp_id == IWL_FW_INI_TIME_POINT_FW_ASSERT || 2630 2630 + tp_id == IWL_FW_INI_TIME_POINT_FW_HW_ERROR; 2631 2631 + } 2632 2632 + 2627 2633 static u32 2628 2634 iwl_dump_ini_dump_regions(struct iwl_fw_runtime *fwrt, 2629 2635 struct iwl_fwrt_dump_data *dump_data, ··· 2695 2689 * debug data which also need to be collected. 2696 2690 */ 2697 2691 if (reg_type == IWL_FW_INI_REGION_DRAM_IMR) { 2698 2698 - if (tp_id == IWL_FW_INI_TIME_POINT_FW_ASSERT || 2699 2699 - tp_id == IWL_FW_INI_TIME_POINT_FW_HW_ERROR) 2692 2692 + if (iwl_dump_due_to_error(tp_id)) 2700 2693 imr_reg_data->reg_tlv = 2701 2694 fwrt->trans->dbg.active_regions[i]; 2702 2695 else ··· 2732 2727 ARRAY_SIZE(fwrt->trans->dbg.active_regions)); 2733 2728 2734 2729 if (trigger->time_point & 2735 2735 - cpu_to_le32(IWL_FW_INI_APPLY_POLICY_RESET_HANDSHAKE)) { 2730 2730 + cpu_to_le32(IWL_FW_INI_APPLY_POLICY_SPLIT_DUMP_RESET)) { 2736 2731 size += iwl_dump_ini_dump_regions(fwrt, dump_data, list, tp_id, 2737 2732 regions_mask, &imr_reg_data, 2738 2733 IWL_INI_DUMP_EARLY_REGIONS); ··· 2741 2736 regions_mask, &imr_reg_data, 2742 2737 IWL_INI_DUMP_LATE_REGIONS); 2743 2738 } else { 2739 2739 + if (fw_has_capa(&fwrt->fw->ucode_capa, 2740 2740 + IWL_UCODE_TLV_CAPA_RESET_DURING_ASSERT) && 2741 2741 + iwl_dump_due_to_error(tp_id)) 2742 2742 + iwl_trans_pcie_fw_reset_handshake(fwrt->trans); 2744 2743 size += iwl_dump_ini_dump_regions(fwrt, dump_data, list, tp_id, 2745 2744 regions_mask, &imr_reg_data, 2746 2745 IWL_INI_DUMP_ALL_REGIONS);

+28

drivers/net/wireless/intel/iwlwifi/fw/file.h

reviewed

··· 102 102 IWL_UCODE_TLV_SEC_TABLE_ADDR = 66, 103 103 IWL_UCODE_TLV_D3_KEK_KCK_ADDR = 67, 104 104 IWL_UCODE_TLV_CURRENT_PC = 68, 105 105 + IWL_UCODE_TLV_FSEQ_BIN_VERSION = 72, 105 106 106 107 IWL_UCODE_TLV_FW_NUM_STATIONS = IWL_UCODE_TLV_CONST_BASE + 0, 107 108 IWL_UCODE_TLV_FW_NUM_LINKS = IWL_UCODE_TLV_CONST_BASE + 1, ··· 403 402 * @IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA: supports (de)activating 5G9 404 403 * for CA from BIOS. 405 404 * @IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT: supports %TAS_UHB_ALLOWED_CANADA 405 405 + * @IWL_UCODE_TLV_CAPA_EXT_FSEQ_IMAGE_SUPPORT: external FSEQ image support 406 406 * 407 407 * @NUM_IWL_UCODE_TLV_CAPA: number of bits used 408 408 */ ··· 506 504 IWL_UCODE_TLV_CAPA_MONITOR_PASSIVE_CHANS = (__force iwl_ucode_tlv_capa_t)122, 507 505 IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA = (__force iwl_ucode_tlv_capa_t)123, 508 506 IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT = (__force iwl_ucode_tlv_capa_t)124, 507 507 + IWL_UCODE_TLV_CAPA_EXT_FSEQ_IMAGE_SUPPORT = (__force iwl_ucode_tlv_capa_t)125, 508 508 + 509 509 + /* set 4 */ 510 510 + /** 511 511 + * @IWL_UCODE_TLV_CAPA_RESET_DURING_ASSERT: FW reset handshake is needed 512 512 + * during assert handling even if the dump isn't split 513 513 + */ 514 514 + IWL_UCODE_TLV_CAPA_RESET_DURING_ASSERT = (__force iwl_ucode_tlv_capa_t)(4 * 32 + 0), 509 515 NUM_IWL_UCODE_TLV_CAPA 510 516 /* 511 517 * This construction make both sparse (which cannot increment the previous ··· 1004 994 __le32 addr, size; 1005 995 }; 1006 996 997 997 + struct iwl_fw_fseq_bin_version { 998 998 + __le32 major, minor; 999 999 + }; /* FW_TLV_FSEQ_BIN_VERSION_S */ 1000 1000 + 1007 1001 static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv, 1008 1002 size_t fixed_size, size_t var_size) 1009 1003 { ··· 1025 1011 1026 1012 #define iwl_tlv_array_len_with_size(_tlv_ptr, _struct_ptr, _size) \ 1027 1013 _iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), _size) 1014 1014 + 1015 1015 + /* external FSEQ file */ 1016 1016 + #define IWL_FSEQ_FILE "intel/fseq-%04x-%04x" 1017 1017 + #define IWL_FSEQ_MAGIC "INTEL-CNV-FSEQ\n\0" 1018 1018 + 1019 1019 + struct iwl_fseq_file { 1020 1020 + char magic[16]; 1021 1021 + char version[16]; 1022 1022 + __le32 bt_len; 1023 1023 + __le32 wifi_len; 1024 1024 + u8 reserved[8]; 1025 1025 + u8 data[]; 1026 1026 + } __packed; 1027 1027 + 1028 1028 #endif /* __iwl_fw_file_h__ */

+5 -1

drivers/net/wireless/intel/iwlwifi/fw/runtime.h

reviewed

··· 1 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 2 /* 3 3 * Copyright (C) 2017 Intel Deutschland GmbH 4 4 - * Copyright (C) 2018-2024 Intel Corporation 4 4 + * Copyright (C) 2018-2025 Intel Corporation 5 5 */ 6 6 #ifndef __iwl_fw_runtime_h__ 7 7 #define __iwl_fw_runtime_h__ ··· 110 110 * Only read the UEFI variables if locked. 111 111 * @sar_profiles: sar profiles as read from WRDS/EWRD BIOS tables 112 112 * @geo_profiles: geographic profiles as read from WGDS BIOS table 113 113 + * @phy_filters: specific phy filters as read from WPFC BIOS table 113 114 */ 114 115 struct iwl_fw_runtime { 115 116 struct iwl_trans *trans; ··· 185 184 struct iwl_mcc_allowed_ap_type_cmd uats_table; 186 185 bool uats_valid; 187 186 u8 uefi_tables_lock_status; 187 187 + #ifdef CONFIG_ACPI 188 188 + struct iwl_phy_specific_cfg phy_filters; 189 189 + #endif 188 190 }; 189 191 190 192 void iwl_fw_runtime_init(struct iwl_fw_runtime *fwrt, struct iwl_trans *trans,

+16 -1

drivers/net/wireless/intel/iwlwifi/iwl-context-info-gen3.h

reviewed

··· 78 78 79 79 /** 80 80 * enum iwl_prph_scratch_ext_flags - PRPH scratch control ext flags 81 81 + * @IWL_PRPH_SCRATCH_EXT_EXT_FSEQ: external FSEQ image provided 81 82 * @IWL_PRPH_SCRATCH_EXT_URM_FW: switch to URM mode based on fw setting 82 83 * @IWL_PRPH_SCRATCH_EXT_URM_PERM: switch to permanent URM mode 83 84 * @IWL_PRPH_SCRATCH_EXT_32KHZ_CLK_VALID: use external 32 KHz clock 84 85 */ 85 86 enum iwl_prph_scratch_ext_flags { 87 87 + IWL_PRPH_SCRATCH_EXT_EXT_FSEQ = BIT(0), 86 88 IWL_PRPH_SCRATCH_EXT_URM_FW = BIT(4), 87 89 IWL_PRPH_SCRATCH_EXT_URM_PERM = BIT(5), 88 90 IWL_PRPH_SCRATCH_EXT_32KHZ_CLK_VALID = BIT(8), ··· 204 202 struct iwl_prph_scratch_step_cfg step_cfg; 205 203 } __packed; /* PERIPH_SCRATCH_CTRL_CFG_S */ 206 204 205 205 + #define IWL_NUM_DRAM_FSEQ_ENTRIES 8 206 206 + 207 207 + /** 208 208 + * struct iwl_context_info_dram_fseq - images DRAM map (with fseq) 209 209 + * each entry in the map represents a DRAM chunk of up to 32 KB 210 210 + * @common: UMAC/LMAC/virtual images 211 211 + * @fseq_img: FSEQ image DRAM map 212 212 + */ 213 213 + struct iwl_context_info_dram_fseq { 214 214 + struct iwl_context_info_dram_nonfseq common; 215 215 + __le64 fseq_img[IWL_NUM_DRAM_FSEQ_ENTRIES]; 216 216 + } __packed; /* PERIPH_SCRATCH_DRAM_MAP_S */ 217 217 + 207 218 /** 208 219 * struct iwl_prph_scratch - peripheral scratch mapping 209 220 * @ctrl_cfg: control and configuration of prph scratch ··· 230 215 __le32 fseq_override; 231 216 __le32 step_analog_params; 232 217 __le32 reserved[8]; 233 233 - struct iwl_context_info_dram dram; 218 218 + struct iwl_context_info_dram_fseq dram; 234 219 } __packed; /* PERIPH_SCRATCH_S */ 235 220 236 221 /**

+5 -5

drivers/net/wireless/intel/iwlwifi/iwl-context-info.h

reviewed

··· 1 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 2 /* 3 3 * Copyright (C) 2017 Intel Deutschland GmbH 4 4 - * Copyright (C) 2018-2020, 2022, 2024 Intel Corporation 4 4 + * Copyright (C) 2018-2020, 2022, 2024-2025 Intel Corporation 5 5 */ 6 6 #ifndef __iwl_context_info_file_h__ 7 7 #define __iwl_context_info_file_h__ ··· 78 78 } __packed; 79 79 80 80 /** 81 81 - * struct iwl_context_info_dram - images DRAM map 81 81 + * struct iwl_context_info_dram_nonfseq - images DRAM map 82 82 * each entry in the map represents a DRAM chunk of up to 32 KB 83 83 * @umac_img: UMAC image DRAM map 84 84 * @lmac_img: LMAC image DRAM map 85 85 * @virtual_img: paged image DRAM map 86 86 */ 87 87 - struct iwl_context_info_dram { 87 87 + struct iwl_context_info_dram_nonfseq { 88 88 __le64 umac_img[IWL_MAX_DRAM_ENTRY]; 89 89 __le64 lmac_img[IWL_MAX_DRAM_ENTRY]; 90 90 __le64 virtual_img[IWL_MAX_DRAM_ENTRY]; ··· 177 177 struct iwl_context_info_early_dbg_cfg edbg_cfg; 178 178 struct iwl_context_info_pnvm_cfg pnvm_cfg; 179 179 __le32 reserved2[16]; 180 180 - struct iwl_context_info_dram dram; 180 180 + struct iwl_context_info_dram_nonfseq dram; 181 181 __le32 reserved3[16]; 182 182 } __packed; 183 183 ··· 186 186 void iwl_pcie_ctxt_info_free_paging(struct iwl_trans *trans); 187 187 int iwl_pcie_init_fw_sec(struct iwl_trans *trans, 188 188 const struct fw_img *fw, 189 189 - struct iwl_context_info_dram *ctxt_dram); 189 189 + struct iwl_context_info_dram_nonfseq *ctxt_dram); 190 190 void *iwl_pcie_ctxt_info_dma_alloc_coherent(struct iwl_trans *trans, 191 191 size_t size, 192 192 dma_addr_t *phys);

+11 -9

drivers/net/wireless/intel/iwlwifi/iwl-csr.h

reviewed

··· 1 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 2 /* 3 3 - * Copyright (C) 2005-2014, 2018-2024 Intel Corporation 3 3 + * Copyright (C) 2005-2014, 2018-2025 Intel Corporation 4 4 * Copyright (C) 2013-2014 Intel Mobile Communications GmbH 5 5 * Copyright (C) 2016 Intel Deutschland GmbH 6 6 */ ··· 194 194 #define CSR_INT_BIT_RF_KILL (1 << 7) /* HW RFKILL switch GP_CNTRL[27] toggled */ 195 195 #define CSR_INT_BIT_CT_KILL (1 << 6) /* Critical temp (chip too hot) rfkill */ 196 196 #define CSR_INT_BIT_SW_RX (1 << 3) /* Rx, command responses */ 197 197 + #define CSR_INT_BIT_RESET_DONE (1 << 2) /* reset handshake with firmware is done */ 197 198 #define CSR_INT_BIT_WAKEUP (1 << 1) /* NIC controller waking up (pwr mgmt) */ 198 199 #define CSR_INT_BIT_ALIVE (1 << 0) /* uCode interrupts once it initializes */ 199 200 200 200 - #define CSR_INI_SET_MASK (CSR_INT_BIT_FH_RX | \ 201 201 - CSR_INT_BIT_HW_ERR | \ 202 202 - CSR_INT_BIT_FH_TX | \ 203 203 - CSR_INT_BIT_SW_ERR | \ 204 204 - CSR_INT_BIT_RF_KILL | \ 205 205 - CSR_INT_BIT_SW_RX | \ 206 206 - CSR_INT_BIT_WAKEUP | \ 207 207 - CSR_INT_BIT_ALIVE | \ 201 201 + #define CSR_INI_SET_MASK (CSR_INT_BIT_FH_RX | \ 202 202 + CSR_INT_BIT_HW_ERR | \ 203 203 + CSR_INT_BIT_FH_TX | \ 204 204 + CSR_INT_BIT_SW_ERR | \ 205 205 + CSR_INT_BIT_RF_KILL | \ 206 206 + CSR_INT_BIT_SW_RX | \ 207 207 + CSR_INT_BIT_WAKEUP | \ 208 208 + CSR_INT_BIT_RESET_DONE | \ 209 209 + CSR_INT_BIT_ALIVE | \ 208 210 CSR_INT_BIT_RX_PERIODIC) 209 211 210 212 /* interrupt flags in FH (flow handler) (PCI busmaster DMA) */

+22 -14

drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c

reviewed

··· 143 143 * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo 144 144 * @NVM_CHANNEL_IBSS: usable as an IBSS channel and deprecated 145 145 * when %IWL_NVM_SBANDS_FLAGS_LAR enabled. 146 146 + * @NVM_CHANNEL_ALLOW_20MHZ_ACTIVITY: active scanning allowed and 147 147 + * AP allowed only in 20 MHz. Valid only 148 148 + * when %IWL_NVM_SBANDS_FLAGS_LAR enabled. 146 149 * @NVM_CHANNEL_ACTIVE: active scanning allowed and allows IBSS 147 150 * when %IWL_NVM_SBANDS_FLAGS_LAR enabled. 148 151 * @NVM_CHANNEL_RADAR: radar detection required ··· 162 159 * @NVM_CHANNEL_AFC: client support connection to UHB AFC AP 163 160 */ 164 161 enum iwl_nvm_channel_flags { 165 165 - NVM_CHANNEL_VALID = BIT(0), 166 166 - NVM_CHANNEL_IBSS = BIT(1), 167 167 - NVM_CHANNEL_ACTIVE = BIT(3), 168 168 - NVM_CHANNEL_RADAR = BIT(4), 169 169 - NVM_CHANNEL_INDOOR_ONLY = BIT(5), 170 170 - NVM_CHANNEL_GO_CONCURRENT = BIT(6), 171 171 - NVM_CHANNEL_UNIFORM = BIT(7), 172 172 - NVM_CHANNEL_20MHZ = BIT(8), 173 173 - NVM_CHANNEL_40MHZ = BIT(9), 174 174 - NVM_CHANNEL_80MHZ = BIT(10), 175 175 - NVM_CHANNEL_160MHZ = BIT(11), 176 176 - NVM_CHANNEL_DC_HIGH = BIT(12), 177 177 - NVM_CHANNEL_VLP = BIT(13), 178 178 - NVM_CHANNEL_AFC = BIT(14), 162 162 + NVM_CHANNEL_VALID = BIT(0), 163 163 + NVM_CHANNEL_IBSS = BIT(1), 164 164 + NVM_CHANNEL_ALLOW_20MHZ_ACTIVITY = BIT(2), 165 165 + NVM_CHANNEL_ACTIVE = BIT(3), 166 166 + NVM_CHANNEL_RADAR = BIT(4), 167 167 + NVM_CHANNEL_INDOOR_ONLY = BIT(5), 168 168 + NVM_CHANNEL_GO_CONCURRENT = BIT(6), 169 169 + NVM_CHANNEL_UNIFORM = BIT(7), 170 170 + NVM_CHANNEL_20MHZ = BIT(8), 171 171 + NVM_CHANNEL_40MHZ = BIT(9), 172 172 + NVM_CHANNEL_80MHZ = BIT(10), 173 173 + NVM_CHANNEL_160MHZ = BIT(11), 174 174 + NVM_CHANNEL_DC_HIGH = BIT(12), 175 175 + NVM_CHANNEL_VLP = BIT(13), 176 176 + NVM_CHANNEL_AFC = BIT(14), 179 177 }; 180 178 181 179 /** ··· 1658 1654 1659 1655 if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY) 1660 1656 flags |= NL80211_RRF_NO_OUTDOOR; 1657 1657 + 1658 1658 + if (nvm_flags & NVM_CHANNEL_ALLOW_20MHZ_ACTIVITY && 1659 1659 + flags & NL80211_RRF_NO_IR) 1660 1660 + flags |= NL80211_RRF_ALLOW_20MHZ_ACTIVITY; 1661 1661 1662 1662 /* Set the GO concurrent flag only in case that NO_IR is set. 1663 1663 * Otherwise it is meaningless

+1

drivers/net/wireless/intel/iwlwifi/iwl-trans.h

reviewed

··· 328 328 case IWL_AMSDU_4K: 329 329 return get_order(4 * 1024); 330 330 case IWL_AMSDU_8K: 331 331 + return get_order(8 * 1024); 331 332 case IWL_AMSDU_12K: 332 333 return get_order(16 * 1024); 333 334 default:

-1

drivers/net/wireless/intel/iwlwifi/iwl-utils.c

reviewed

··· 4 4 */ 5 5 #include <net/gso.h> 6 6 #include <linux/ieee80211.h> 7 7 - #include <net/gso.h> 8 7 #include <net/ip.h> 9 8 10 9 #include "iwl-drv.h"

+2

drivers/net/wireless/intel/iwlwifi/mld/d3.c

reviewed

··· 1347 1347 if (ret) { 1348 1348 IWL_ERR(mld, "d3 suspend: trans_d3_suspend failed %d\n", ret); 1349 1349 } else { 1350 1350 + /* Async notification might send hcmds, which is not allowed in suspend */ 1351 1351 + iwl_mld_cancel_async_notifications(mld); 1350 1352 mld->trans->system_pm_mode = IWL_PLAT_PM_MODE_D3; 1351 1353 mld->fw_status.in_d3 = true; 1352 1354 }

+11 -34

drivers/net/wireless/intel/iwlwifi/mld/fw.c

reviewed

··· 11 11 #include "fw/dbg.h" 12 12 #include "fw/pnvm.h" 13 13 #include "hcmd.h" 14 14 - #include "iwl-nvm-parse.h" 15 14 #include "power.h" 16 15 #include "mcc.h" 17 16 #include "led.h" ··· 238 239 iwl_fw_dbg_error_collect(&mld->fwrt, 239 240 FW_DBG_TRIGGER_ALIVE_TIMEOUT); 240 241 iwl_mld_print_alive_notif_timeout(mld); 241 241 - goto alive_failure; 242 242 + return ret; 242 243 } 243 244 244 245 if (!alive_valid) { 245 246 IWL_ERR(mld, "Loaded firmware is not valid!\n"); 246 246 - ret = -EIO; 247 247 - goto alive_failure; 247 247 + return -EIO; 248 248 } 249 249 250 250 iwl_trans_fw_alive(mld->trans, 0); 251 251 252 252 return 0; 253 253 - 254 254 - alive_failure: 255 255 - iwl_trans_stop_device(mld->trans); 256 256 - return ret; 257 253 } 258 254 259 255 static int iwl_mld_run_fw_init_sequence(struct iwl_mld *mld) ··· 266 272 if (ret) 267 273 return ret; 268 274 269 269 - mld->trans->step_urm = 270 270 - !!(iwl_read_umac_prph(mld->trans, CNVI_PMU_STEP_FLOW) & 271 271 - CNVI_PMU_STEP_FLOW_FORCE_URM); 272 272 - 273 275 ret = iwl_pnvm_load(mld->trans, &mld->notif_wait, 274 276 &mld->fw->ucode_capa); 275 277 if (ret) { 276 278 IWL_ERR(mld, "Timeout waiting for PNVM load %d\n", ret); 277 277 - goto init_failure; 279 279 + return ret; 278 280 } 279 281 280 282 iwl_dbg_tlv_time_point(&mld->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, ··· 288 298 if (ret) { 289 299 IWL_ERR(mld, "Failed to send init config command: %d\n", ret); 290 300 iwl_remove_notification(&mld->notif_wait, &init_wait); 291 291 - goto init_failure; 301 301 + return ret; 292 302 } 293 303 294 304 ret = iwl_wait_notification(&mld->notif_wait, &init_wait, 295 305 MLD_INIT_COMPLETE_TIMEOUT); 296 306 if (ret) { 297 307 IWL_ERR(mld, "Failed to get INIT_COMPLETE %d\n", ret); 298 298 - goto init_failure; 299 299 - } 300 300 - 301 301 - if (!mld->nvm_data) { 302 302 - mld->nvm_data = iwl_get_nvm(mld->trans, mld->fw, 0, 0); 303 303 - if (IS_ERR(mld->nvm_data)) { 304 304 - ret = PTR_ERR(mld->nvm_data); 305 305 - mld->nvm_data = NULL; 306 306 - IWL_ERR(mld, "Failed to read NVM: %d\n", ret); 307 307 - goto init_failure; 308 308 - } 308 308 + return ret; 309 309 } 310 310 311 311 return 0; 312 312 - 313 313 - init_failure: 314 314 - iwl_trans_stop_device(mld->trans); 315 315 - return ret; 316 312 } 317 313 318 314 int iwl_mld_load_fw(struct iwl_mld *mld) ··· 309 333 310 334 ret = iwl_trans_start_hw(mld->trans); 311 335 if (ret) 312 312 - goto err; 336 336 + return ret; 313 337 314 338 ret = iwl_mld_run_fw_init_sequence(mld); 315 339 if (ret) ··· 337 361 338 362 iwl_trans_stop_device(mld->trans); 339 363 340 340 - wiphy_work_cancel(mld->wiphy, &mld->async_handlers_wk); 341 341 - 342 342 - iwl_mld_purge_async_handlers_list(mld); 364 364 + /* HW is stopped, no more coming RX. Cancel all notifications in 365 365 + * case they were sent just before stopping the HW. 366 366 + */ 367 367 + iwl_mld_cancel_async_notifications(mld); 343 368 344 369 mld->fw_status.running = false; 345 370 } ··· 503 526 ret = iwl_mld_load_fw(mld); 504 527 if (IWL_FW_CHECK(mld, ret, "Failed to start firmware %d\n", ret)) { 505 528 iwl_fw_dbg_error_collect(&mld->fwrt, FW_DBG_TRIGGER_DRIVER); 506 506 - goto error; 529 529 + return ret; 507 530 } 508 531 509 532 IWL_DEBUG_INFO(mld, "uCode started.\n");

-5

drivers/net/wireless/intel/iwlwifi/mld/iface.c

reviewed

··· 226 226 if (vif->probe_req_reg && vif->cfg.assoc && vif->p2p) 227 227 cmd->filter_flags |= 228 228 cpu_to_le32(MAC_CFG_FILTER_ACCEPT_PROBE_REQ); 229 229 - 230 230 - if (vif->p2p) 231 231 - cmd->client.ctwin = 232 232 - cpu_to_le32(vif->bss_conf.p2p_noa_attr.oppps_ctwindow & 233 233 - IEEE80211_P2P_OPPPS_CTWINDOW_MASK); 234 229 } 235 230 236 231 static void iwl_mld_fill_mac_cmd_ap(struct iwl_mld *mld,

+2

drivers/net/wireless/intel/iwlwifi/mld/iface.h

reviewed

··· 59 59 * loaded enough to justify EMLSR. 60 60 * @IWL_MLD_EMLSR_EXIT_RFI: Exit EMLSR due to RFI 61 61 * @IWL_MLD_EMLSR_EXIT_FW_REQUEST: Exit EMLSR because the FW requested it 62 62 + * @IWL_MLD_EMLSR_EXIT_INVALID: internal exit reason due to invalid data 62 63 */ 63 64 enum iwl_mld_emlsr_exit { 64 65 IWL_MLD_EMLSR_EXIT_BLOCK = 0x1, ··· 73 72 IWL_MLD_EMLSR_EXIT_CHAN_LOAD = 0x100, 74 73 IWL_MLD_EMLSR_EXIT_RFI = 0x200, 75 74 IWL_MLD_EMLSR_EXIT_FW_REQUEST = 0x400, 75 75 + IWL_MLD_EMLSR_EXIT_INVALID = 0x800, 76 76 }; 77 77 78 78 /**

-9

drivers/net/wireless/intel/iwlwifi/mld/mac80211.c

reviewed

··· 541 541 (IS_ENABLED(CONFIG_PM_SLEEP) && iwl_mld_no_wowlan_suspend(mld))) 542 542 iwl_mld_stop_fw(mld); 543 543 544 544 - /* HW is stopped, no more coming RX. OTOH, the worker can't run as the 545 545 - * wiphy lock is held. Cancel it in case it was scheduled just before 546 546 - * we stopped the HW. 547 547 - */ 548 548 - wiphy_work_cancel(mld->wiphy, &mld->async_handlers_wk); 549 549 - 550 550 - /* Empty out the list, as the worker won't do that */ 551 551 - iwl_mld_purge_async_handlers_list(mld); 552 552 - 553 544 /* Clear in_hw_restart flag when stopping the hw, as mac80211 won't 554 545 * execute the restart. 555 546 */

+13 -3

drivers/net/wireless/intel/iwlwifi/mld/mld.c

reviewed

··· 26 26 #include "hcmd.h" 27 27 #include "fw/api/location.h" 28 28 29 29 + #include "iwl-nvm-parse.h" 30 30 + 29 31 #define DRV_DESCRIPTION "Intel(R) MLD wireless driver for Linux" 30 32 MODULE_DESCRIPTION(DRV_DESCRIPTION); 31 33 MODULE_LICENSE("GPL"); ··· 77 75 78 76 /* Setup async RX handling */ 79 77 spin_lock_init(&mld->async_handlers_lock); 80 80 - INIT_LIST_HEAD(&mld->async_handlers_list); 81 78 wiphy_work_init(&mld->async_handlers_wk, 82 79 iwl_mld_async_handlers_wk); 83 80 ··· 288 287 * Access is done through binary search 289 288 */ 290 289 static const struct iwl_hcmd_names iwl_mld_prot_offload_names[] = { 291 291 - HCMD_NAME(STORED_BEACON_NTF), 290 290 + HCMD_NAME(WOWLAN_WAKE_PKT_NOTIFICATION), 291 291 + HCMD_NAME(WOWLAN_INFO_NOTIFICATION), 292 292 + HCMD_NAME(D3_END_NOTIFICATION), 292 293 }; 293 294 294 295 /* Please keep this array *SORTED* by hex value. ··· 414 411 break; 415 412 } 416 413 414 414 + if (!ret) { 415 415 + mld->nvm_data = iwl_get_nvm(mld->trans, mld->fw, 0, 0); 416 416 + if (IS_ERR(mld->nvm_data)) { 417 417 + IWL_ERR(mld, "Failed to read NVM: %d\n", ret); 418 418 + ret = PTR_ERR(mld->nvm_data); 419 419 + } 420 420 + } 421 421 + 417 422 if (ret) { 418 423 wiphy_unlock(mld->wiphy); 419 424 rtnl_unlock(); 420 420 - iwl_fw_flush_dumps(&mld->fwrt); 421 425 goto err; 422 426 } 423 427

+28 -7

drivers/net/wireless/intel/iwlwifi/mld/mlo.c

reviewed

··· 52 52 HOW(BT_COEX) \ 53 53 HOW(CHAN_LOAD) \ 54 54 HOW(RFI) \ 55 55 - HOW(FW_REQUEST) 55 55 + HOW(FW_REQUEST) \ 56 56 + HOW(INVALID) 56 57 57 58 static const char * 58 59 iwl_mld_get_emlsr_exit_string(enum iwl_mld_emlsr_exit exit) ··· 644 643 { 645 644 struct wiphy *wiphy = mld->wiphy; 646 645 struct ieee80211_bss_conf *conf; 647 647 - enum iwl_mld_emlsr_exit ret = 0; 646 646 + u32 ret = 0; 648 647 649 648 conf = wiphy_dereference(wiphy, vif->link_conf[link->link_id]); 650 649 if (WARN_ON_ONCE(!conf)) 651 651 - return false; 650 650 + return IWL_MLD_EMLSR_EXIT_INVALID; 652 651 653 652 if (link->chandef->chan->band == NL80211_BAND_2GHZ && mld->bt_is_active) 654 653 ret |= IWL_MLD_EMLSR_EXIT_BT_COEX; ··· 773 772 if (a->chandef->width <= b->chandef->width) 774 773 return true; 775 774 776 776 - bw_a = nl80211_chan_width_to_mhz(a->chandef->width); 777 777 - bw_b = nl80211_chan_width_to_mhz(b->chandef->width); 775 775 + bw_a = cfg80211_chandef_get_width(a->chandef); 776 776 + bw_b = cfg80211_chandef_get_width(b->chandef); 778 777 ratio = bw_a / bw_b; 779 778 780 779 switch (ratio) { ··· 805 804 iwl_mld_emlsr_disallowed_with_link(mld, vif, b, false)) 806 805 return false; 807 806 808 808 - if (a->chandef->chan->band == b->chandef->chan->band) 809 809 - reason_mask |= IWL_MLD_EMLSR_EXIT_EQUAL_BAND; 807 807 + if (a->chandef->chan->band == b->chandef->chan->band) { 808 808 + const struct cfg80211_chan_def *c_low = a->chandef; 809 809 + const struct cfg80211_chan_def *c_high = b->chandef; 810 810 + u32 c_low_upper_edge, c_high_lower_edge; 811 811 + 812 812 + if (c_low->chan->center_freq > c_high->chan->center_freq) 813 813 + swap(c_low, c_high); 814 814 + 815 815 + c_low_upper_edge = c_low->chan->center_freq + 816 816 + cfg80211_chandef_get_width(c_low) / 2; 817 817 + c_high_lower_edge = c_high->chan->center_freq - 818 818 + cfg80211_chandef_get_width(c_high) / 2; 819 819 + 820 820 + if (a->chandef->chan->band == NL80211_BAND_5GHZ && 821 821 + c_low_upper_edge <= 5330 && c_high_lower_edge >= 5490) { 822 822 + /* This case is fine - HW/FW can deal with it, there's 823 823 + * enough separation between the two channels. 824 824 + */ 825 825 + } else { 826 826 + reason_mask |= IWL_MLD_EMLSR_EXIT_EQUAL_BAND; 827 827 + } 828 828 + } 810 829 if (!iwl_mld_channel_load_allows_emlsr(mld, vif, a, b)) 811 830 reason_mask |= IWL_MLD_EMLSR_EXIT_CHAN_LOAD; 812 831

+5 -46

drivers/net/wireless/intel/iwlwifi/mld/notif.c

reviewed

··· 183 183 } 184 184 185 185 static void 186 186 - iwl_mld_handle_stored_beacon_notif(struct iwl_mld *mld, 187 187 - struct iwl_rx_packet *pkt) 188 188 - { 189 189 - unsigned int pkt_len = iwl_rx_packet_payload_len(pkt); 190 190 - struct iwl_stored_beacon_notif *sb = (void *)pkt->data; 191 191 - struct ieee80211_rx_status rx_status = {}; 192 192 - struct sk_buff *skb; 193 193 - u32 size = le32_to_cpu(sb->common.byte_count); 194 194 - 195 195 - if (size == 0) 196 196 - return; 197 197 - 198 198 - if (pkt_len < struct_size(sb, data, size)) 199 199 - return; 200 200 - 201 201 - skb = alloc_skb(size, GFP_ATOMIC); 202 202 - if (!skb) { 203 203 - IWL_ERR(mld, "alloc_skb failed\n"); 204 204 - return; 205 205 - } 206 206 - 207 207 - /* update rx_status according to the notification's metadata */ 208 208 - rx_status.mactime = le64_to_cpu(sb->common.tsf); 209 209 - /* TSF as indicated by the firmware is at INA time */ 210 210 - rx_status.flag |= RX_FLAG_MACTIME_PLCP_START; 211 211 - rx_status.device_timestamp = le32_to_cpu(sb->common.system_time); 212 212 - rx_status.band = 213 213 - iwl_mld_phy_band_to_nl80211(le16_to_cpu(sb->common.band)); 214 214 - rx_status.freq = 215 215 - ieee80211_channel_to_frequency(le16_to_cpu(sb->common.channel), 216 216 - rx_status.band); 217 217 - 218 218 - /* copy the data */ 219 219 - skb_put_data(skb, sb->data, size); 220 220 - memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); 221 221 - 222 222 - /* pass it as regular rx to mac80211 */ 223 223 - ieee80211_rx_napi(mld->hw, NULL, skb, NULL); 224 224 - } 225 225 - 226 226 - static void 227 186 iwl_mld_handle_channel_switch_start_notif(struct iwl_mld *mld, 228 187 struct iwl_rx_packet *pkt) 229 188 { ··· 320 361 CMD_VER_ENTRY(2, ct_kill_notif)) 321 362 CMD_VERSIONS(temp_notif, 322 363 CMD_VER_ENTRY(2, iwl_dts_measurement_notif)) 323 323 - CMD_VERSIONS(stored_beacon_notif, 324 324 - CMD_VER_ENTRY(4, iwl_stored_beacon_notif)) 325 364 CMD_VERSIONS(roc_notif, 326 365 CMD_VER_ENTRY(1, iwl_roc_notif)) 327 366 CMD_VERSIONS(probe_resp_data_notif, ··· 430 473 RX_HANDLER_OF_ROC(MAC_CONF_GROUP, ROC_NOTIF, roc_notif) 431 474 RX_HANDLER_NO_OBJECT(DATA_PATH_GROUP, MU_GROUP_MGMT_NOTIF, 432 475 mu_mimo_grp_notif, RX_HANDLER_SYNC) 433 433 - RX_HANDLER_NO_OBJECT(PROT_OFFLOAD_GROUP, STORED_BEACON_NTF, 434 434 - stored_beacon_notif, RX_HANDLER_SYNC) 435 476 RX_HANDLER_OF_VIF(MAC_CONF_GROUP, PROBE_RESPONSE_DATA_NOTIF, 436 477 probe_resp_data_notif) 437 478 RX_HANDLER_NO_OBJECT(PHY_OPS_GROUP, CT_KILL_NOTIFICATION, ··· 662 707 } 663 708 } 664 709 665 665 - void iwl_mld_purge_async_handlers_list(struct iwl_mld *mld) 710 710 + void iwl_mld_cancel_async_notifications(struct iwl_mld *mld) 666 711 { 667 712 struct iwl_async_handler_entry *entry, *tmp; 713 713 + 714 714 + lockdep_assert_wiphy(mld->wiphy); 715 715 + 716 716 + wiphy_work_cancel(mld->wiphy, &mld->async_handlers_wk); 668 717 669 718 spin_lock_bh(&mld->async_handlers_lock); 670 719 list_for_each_entry_safe(entry, tmp, &mld->async_handlers_list, list) {

+1 -1

drivers/net/wireless/intel/iwlwifi/mld/notif.h

reviewed

··· 15 15 16 16 void iwl_mld_async_handlers_wk(struct wiphy *wiphy, struct wiphy_work *wk); 17 17 18 18 - void iwl_mld_purge_async_handlers_list(struct iwl_mld *mld); 18 18 + void iwl_mld_cancel_async_notifications(struct iwl_mld *mld); 19 19 20 20 enum iwl_mld_object_type { 21 21 IWL_MLD_OBJECT_TYPE_NONE,

+46 -51

drivers/net/wireless/intel/iwlwifi/mld/rx.c

reviewed

··· 33 33 u32 gp2_on_air_rise; 34 34 u16 phy_info; 35 35 u8 energy_a, energy_b; 36 36 - u8 channel; 37 36 }; 38 37 39 38 static void ··· 42 43 phy_data->phy_info = le16_to_cpu(desc->phy_info); 43 44 phy_data->rate_n_flags = le32_to_cpu(desc->v3.rate_n_flags); 44 45 phy_data->gp2_on_air_rise = le32_to_cpu(desc->v3.gp2_on_air_rise); 45 45 - phy_data->channel = desc->v3.channel; 46 46 phy_data->energy_a = desc->v3.energy_a; 47 47 phy_data->energy_b = desc->v3.energy_b; 48 48 phy_data->data0 = desc->v3.phy_data0; ··· 1160 1162 1161 1163 static void iwl_mld_rx_fill_status(struct iwl_mld *mld, struct sk_buff *skb, 1162 1164 struct iwl_mld_rx_phy_data *phy_data, 1163 1163 - struct iwl_rx_mpdu_desc *mpdu_desc, 1164 1164 - struct ieee80211_hdr *hdr, 1165 1165 int queue) 1166 1166 { 1167 1167 struct ieee80211_rx_status *rx_status = IEEE80211_SKB_RXCB(skb); ··· 1168 1172 u8 stbc = u32_get_bits(rate_n_flags, RATE_MCS_STBC_MSK); 1169 1173 bool is_sgi = rate_n_flags & RATE_MCS_SGI_MSK; 1170 1174 1171 1171 - if (WARN_ON_ONCE(phy_data->with_data && (!mpdu_desc || !hdr))) 1172 1172 - return; 1173 1173 - 1174 1174 - /* Keep packets with CRC errors (and with overrun) for monitor mode 1175 1175 - * (otherwise the firmware discards them) but mark them as bad. 1176 1176 - */ 1177 1177 - if (phy_data->with_data && 1178 1178 - (!(mpdu_desc->status & cpu_to_le32(IWL_RX_MPDU_STATUS_CRC_OK)) || 1179 1179 - !(mpdu_desc->status & cpu_to_le32(IWL_RX_MPDU_STATUS_OVERRUN_OK)))) { 1180 1180 - IWL_DEBUG_RX(mld, "Bad CRC or FIFO: 0x%08X.\n", 1181 1181 - le32_to_cpu(mpdu_desc->status)); 1182 1182 - rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; 1183 1183 - } 1184 1184 - 1185 1175 phy_data->info_type = IWL_RX_PHY_INFO_TYPE_NONE; 1186 1176 1187 1187 - if (phy_data->with_data && 1188 1188 - likely(!(phy_data->phy_info & IWL_RX_MPDU_PHY_TSF_OVERLOAD))) { 1189 1189 - rx_status->mactime = 1190 1190 - le64_to_cpu(mpdu_desc->v3.tsf_on_air_rise); 1191 1191 - 1192 1192 - /* TSF as indicated by the firmware is at INA time */ 1193 1193 - rx_status->flag |= RX_FLAG_MACTIME_PLCP_START; 1194 1194 - } else { 1177 1177 + if (phy_data->phy_info & IWL_RX_MPDU_PHY_TSF_OVERLOAD) 1195 1178 phy_data->info_type = 1196 1179 le32_get_bits(phy_data->data1, 1197 1180 IWL_RX_PHY_DATA1_INFO_TYPE_MASK); 1198 1198 - } 1199 1199 - 1200 1200 - /* management stuff on default queue */ 1201 1201 - if (!queue && phy_data->with_data && 1202 1202 - unlikely(ieee80211_is_beacon(hdr->frame_control) || 1203 1203 - ieee80211_is_probe_resp(hdr->frame_control))) { 1204 1204 - rx_status->boottime_ns = ktime_get_boottime_ns(); 1205 1205 - 1206 1206 - if (mld->scan.pass_all_sched_res == SCHED_SCAN_PASS_ALL_STATE_ENABLED) 1207 1207 - mld->scan.pass_all_sched_res = SCHED_SCAN_PASS_ALL_STATE_FOUND; 1208 1208 - } 1209 1181 1210 1182 /* set the preamble flag if appropriate */ 1211 1183 if (format == RATE_MCS_CCK_MSK && ··· 1699 1735 } 1700 1736 1701 1737 static void 1702 1702 - iwl_mld_fill_rx_status_band_freq(struct iwl_mld_rx_phy_data *phy_data, 1703 1703 - struct iwl_rx_mpdu_desc *mpdu_desc, 1704 1704 - struct ieee80211_rx_status *rx_status) 1738 1738 + iwl_mld_fill_rx_status_band_freq(struct ieee80211_rx_status *rx_status, 1739 1739 + u8 band, u8 channel) 1705 1740 { 1706 1706 - enum nl80211_band band; 1707 1707 - 1708 1708 - band = BAND_IN_RX_STATUS(mpdu_desc->mac_phy_idx); 1709 1741 rx_status->band = iwl_mld_phy_band_to_nl80211(band); 1710 1710 - rx_status->freq = ieee80211_channel_to_frequency(phy_data->channel, 1742 1742 + rx_status->freq = ieee80211_channel_to_frequency(channel, 1711 1743 rx_status->band); 1712 1744 } 1713 1745 ··· 1718 1758 struct sk_buff *skb; 1719 1759 size_t mpdu_desc_size = sizeof(*mpdu_desc); 1720 1760 bool drop = false; 1721 1721 - u8 crypto_len = 0; 1761 1761 + u8 crypto_len = 0, band; 1722 1762 u32 pkt_len = iwl_rx_packet_payload_len(pkt); 1723 1763 u32 mpdu_len; 1724 1764 enum iwl_mld_reorder_result reorder_res; ··· 1762 1802 rx_status = IEEE80211_SKB_RXCB(skb); 1763 1803 1764 1804 /* this is needed early */ 1765 1765 - iwl_mld_fill_rx_status_band_freq(&phy_data, mpdu_desc, rx_status); 1805 1805 + band = u8_get_bits(mpdu_desc->mac_phy_band, 1806 1806 + IWL_RX_MPDU_MAC_PHY_BAND_BAND_MASK); 1807 1807 + iwl_mld_fill_rx_status_band_freq(rx_status, band, 1808 1808 + mpdu_desc->v3.channel); 1809 1809 + 1766 1810 1767 1811 rcu_read_lock(); 1768 1812 ··· 1778 1814 if (!queue && (phy_data.phy_info & IWL_RX_MPDU_PHY_AMPDU)) 1779 1815 iwl_mld_rx_update_ampdu_ref(mld, &phy_data, rx_status); 1780 1816 1781 1781 - iwl_mld_rx_fill_status(mld, skb, &phy_data, mpdu_desc, hdr, queue); 1817 1817 + /* Keep packets with CRC errors (and with overrun) for monitor mode 1818 1818 + * (otherwise the firmware discards them) but mark them as bad. 1819 1819 + */ 1820 1820 + if (!(mpdu_desc->status & cpu_to_le32(IWL_RX_MPDU_STATUS_CRC_OK)) || 1821 1821 + !(mpdu_desc->status & cpu_to_le32(IWL_RX_MPDU_STATUS_OVERRUN_OK))) { 1822 1822 + IWL_DEBUG_RX(mld, "Bad CRC or FIFO: 0x%08X.\n", 1823 1823 + le32_to_cpu(mpdu_desc->status)); 1824 1824 + rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; 1825 1825 + } 1826 1826 + 1827 1827 + if (likely(!(phy_data.phy_info & IWL_RX_MPDU_PHY_TSF_OVERLOAD))) { 1828 1828 + rx_status->mactime = 1829 1829 + le64_to_cpu(mpdu_desc->v3.tsf_on_air_rise); 1830 1830 + 1831 1831 + /* TSF as indicated by the firmware is at INA time */ 1832 1832 + rx_status->flag |= RX_FLAG_MACTIME_PLCP_START; 1833 1833 + } 1834 1834 + 1835 1835 + /* management stuff on default queue */ 1836 1836 + if (!queue && unlikely(ieee80211_is_beacon(hdr->frame_control) || 1837 1837 + ieee80211_is_probe_resp(hdr->frame_control))) { 1838 1838 + rx_status->boottime_ns = ktime_get_boottime_ns(); 1839 1839 + 1840 1840 + if (mld->scan.pass_all_sched_res == 1841 1841 + SCHED_SCAN_PASS_ALL_STATE_ENABLED) 1842 1842 + mld->scan.pass_all_sched_res = 1843 1843 + SCHED_SCAN_PASS_ALL_STATE_FOUND; 1844 1844 + } 1845 1845 + 1846 1846 + iwl_mld_rx_fill_status(mld, skb, &phy_data, queue); 1782 1847 1783 1848 if (iwl_mld_rx_crypto(mld, sta, hdr, rx_status, mpdu_desc, queue, 1784 1849 le32_to_cpu(pkt->len_n_flags), &crypto_len)) ··· 1949 1956 struct ieee80211_rx_status *rx_status; 1950 1957 struct sk_buff *skb; 1951 1958 u32 format, rssi; 1959 1959 + u8 channel; 1952 1960 1953 1961 if (unlikely(mld->fw_status.in_hw_restart)) 1954 1962 return; ··· 1962 1968 desc = (void *)pkt->data; 1963 1969 1964 1970 rssi = le32_to_cpu(desc->rssi); 1971 1971 + channel = u32_get_bits(rssi, RX_NO_DATA_CHANNEL_MSK); 1972 1972 + 1965 1973 phy_data.energy_a = u32_get_bits(rssi, RX_NO_DATA_CHAIN_A_MSK); 1966 1974 phy_data.energy_b = u32_get_bits(rssi, RX_NO_DATA_CHAIN_B_MSK); 1967 1967 - phy_data.channel = u32_get_bits(rssi, RX_NO_DATA_CHANNEL_MSK); 1968 1975 phy_data.data0 = desc->phy_info[0]; 1969 1976 phy_data.data1 = desc->phy_info[1]; 1970 1977 phy_data.phy_info = IWL_RX_MPDU_PHY_TSF_OVERLOAD; ··· 2013 2018 break; 2014 2019 } 2015 2020 2016 2016 - rx_status->band = phy_data.channel > 14 ? NL80211_BAND_5GHZ : 2021 2021 + rx_status->band = channel > 14 ? NL80211_BAND_5GHZ : 2017 2022 NL80211_BAND_2GHZ; 2018 2023 2019 2019 - rx_status->freq = ieee80211_channel_to_frequency(phy_data.channel, 2024 2024 + rx_status->freq = ieee80211_channel_to_frequency(channel, 2020 2025 rx_status->band); 2021 2026 2022 2022 - iwl_mld_rx_fill_status(mld, skb, &phy_data, NULL, NULL, queue); 2027 2027 + iwl_mld_rx_fill_status(mld, skb, &phy_data, queue); 2023 2028 2024 2029 /* No more radiotap info should be added after this point. 2025 2030 * Mark it as mac header for upper layers to know where

+10 -4

drivers/net/wireless/intel/iwlwifi/mld/stats.c

reviewed

··· 467 467 468 468 old_load = phy->avg_channel_load_not_by_us; 469 469 new_load = le32_to_cpu(per_phy[phy->fw_id].channel_load_not_by_us); 470 470 - if (IWL_FW_CHECK(phy->mld, new_load > 100, "Invalid channel load %u\n", 471 471 - new_load)) 470 470 + 471 471 + if (IWL_FW_CHECK(phy->mld, 472 472 + new_load != IWL_STATS_UNKNOWN_CHANNEL_LOAD && 473 473 + new_load > 100, 474 474 + "Invalid channel load %u\n", new_load)) 472 475 return; 473 476 474 474 - /* give a weight of 0.5 for the old value */ 475 475 - phy->avg_channel_load_not_by_us = (new_load >> 1) + (old_load >> 1); 477 477 + if (new_load != IWL_STATS_UNKNOWN_CHANNEL_LOAD) { 478 478 + /* update giving a weight of 0.5 for the old value */ 479 479 + phy->avg_channel_load_not_by_us = (new_load >> 1) + 480 480 + (old_load >> 1); 481 481 + } 476 482 477 483 iwl_mld_emlsr_check_chan_load(hw, phy, old_load); 478 484 }

+7 -7

drivers/net/wireless/intel/iwlwifi/mld/tests/agg.c

reviewed

··· 2 2 /* 3 3 * KUnit tests for channel helper functions 4 4 * 5 5 - * Copyright (C) 2024 Intel Corporation 5 5 + * Copyright (C) 2024-2025 Intel Corporation 6 6 */ 7 7 #include <kunit/test.h> 8 8 #include <kunit/static_stub.h> ··· 474 474 KUNIT_ALLOC_AND_ASSERT(test, mpdu_desc); 475 475 476 476 mpdu_desc->reorder_data |= 477 477 - cpu_to_le32(FIELD_PREP(IWL_RX_MPDU_REORDER_BAID_MASK, 478 478 - param->rx_pkt.baid)); 477 477 + le32_encode_bits(param->rx_pkt.baid, 478 478 + IWL_RX_MPDU_REORDER_BAID_MASK); 479 479 mpdu_desc->reorder_data |= 480 480 - cpu_to_le32(FIELD_PREP(IWL_RX_MPDU_REORDER_SN_MASK, 481 481 - param->rx_pkt.sn)); 480 480 + le32_encode_bits(param->rx_pkt.sn, 481 481 + IWL_RX_MPDU_REORDER_SN_MASK); 482 482 mpdu_desc->reorder_data |= 483 483 - cpu_to_le32(FIELD_PREP(IWL_RX_MPDU_REORDER_NSSN_MASK, 484 484 - param->rx_pkt.nssn)); 483 483 + le32_encode_bits(param->rx_pkt.nssn, 484 484 + IWL_RX_MPDU_REORDER_NSSN_MASK); 485 485 if (param->rx_pkt.old_sn) 486 486 mpdu_desc->reorder_data |= 487 487 cpu_to_le32(IWL_RX_MPDU_REORDER_BA_OLD_SN);

+2 -7

drivers/net/wireless/intel/iwlwifi/mvm/fw.c

reviewed

··· 473 473 struct iwl_phy_specific_cfg *phy_filters) 474 474 { 475 475 #ifdef CONFIG_ACPI 476 476 - *phy_filters = mvm->phy_filters; 476 476 + *phy_filters = mvm->fwrt.phy_filters; 477 477 #endif /* CONFIG_ACPI */ 478 478 } 479 479 ··· 650 650 } 651 651 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 652 652 NULL); 653 653 - 654 654 - if (mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) 655 655 - mvm->trans->step_urm = !!(iwl_read_umac_prph(mvm->trans, 656 656 - CNVI_PMU_STEP_FLOW) & 657 657 - CNVI_PMU_STEP_FLOW_FORCE_URM); 658 653 659 654 /* Send init config command to mark that we are sending NVM access 660 655 * commands ··· 1265 1270 } 1266 1271 } 1267 1272 1268 1268 - iwl_acpi_get_phy_filters(&mvm->fwrt, &mvm->phy_filters); 1273 1273 + iwl_acpi_get_phy_filters(&mvm->fwrt, &mvm->fwrt.phy_filters); 1269 1274 1270 1275 if (iwl_bios_get_eckv(&mvm->fwrt, &mvm->ext_clock_valid)) 1271 1276 IWL_DEBUG_RADIO(mvm, "ECKV table doesn't exist in BIOS\n");

+12 -13

drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c

reviewed

··· 6426 6426 bool sync, 6427 6427 const void *data, u32 size) 6428 6428 { 6429 6429 - struct { 6430 6430 - struct iwl_rxq_sync_cmd cmd; 6431 6431 - struct iwl_mvm_internal_rxq_notif notif; 6432 6432 - } __packed cmd = { 6433 6433 - .cmd.rxq_mask = cpu_to_le32(BIT(mvm->trans->num_rx_queues) - 1), 6434 6434 - .cmd.count = 6435 6435 - cpu_to_le32(sizeof(struct iwl_mvm_internal_rxq_notif) + 6436 6436 - size), 6437 6437 - .notif.type = type, 6438 6438 - .notif.sync = sync, 6439 6439 - }; 6429 6429 + DEFINE_RAW_FLEX(struct iwl_rxq_sync_cmd, cmd, payload, 6430 6430 + sizeof(struct iwl_mvm_internal_rxq_notif)); 6431 6431 + struct iwl_mvm_internal_rxq_notif *notif = 6432 6432 + (struct iwl_mvm_internal_rxq_notif *)cmd->payload; 6440 6433 struct iwl_host_cmd hcmd = { 6441 6434 .id = WIDE_ID(DATA_PATH_GROUP, TRIGGER_RX_QUEUES_NOTIF_CMD), 6442 6435 .data[0] = &cmd, ··· 6440 6447 }; 6441 6448 int ret; 6442 6449 6450 6450 + cmd->rxq_mask = cpu_to_le32(BIT(mvm->trans->num_rx_queues) - 1); 6451 6451 + cmd->count = cpu_to_le32(sizeof(struct iwl_mvm_internal_rxq_notif) + 6452 6452 + size); 6453 6453 + notif->type = type; 6454 6454 + notif->sync = sync; 6455 6455 + 6443 6456 /* size must be a multiple of DWORD */ 6444 6444 - if (WARN_ON(cmd.cmd.count & cpu_to_le32(3))) 6457 6457 + if (WARN_ON(cmd->count & cpu_to_le32(3))) 6445 6458 return; 6446 6459 6447 6460 if (!iwl_mvm_has_new_rx_api(mvm)) 6448 6461 return; 6449 6462 6450 6463 if (sync) { 6451 6451 - cmd.notif.cookie = mvm->queue_sync_cookie; 6464 6464 + notif->cookie = mvm->queue_sync_cookie; 6452 6465 mvm->queue_sync_state = (1 << mvm->trans->num_rx_queues) - 1; 6453 6466 } 6454 6467

-4

drivers/net/wireless/intel/iwlwifi/mvm/mvm.h

reviewed

··· 1348 1348 __le16 cur_aid; 1349 1349 u8 cur_bssid[ETH_ALEN]; 1350 1350 1351 1351 - #ifdef CONFIG_ACPI 1352 1352 - struct iwl_phy_specific_cfg phy_filters; 1353 1353 - #endif 1354 1354 - 1355 1351 /* report rx timestamp in ptp clock time */ 1356 1352 bool rx_ts_ptp; 1357 1353

+3 -2

drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c

reviewed

··· 1 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 2 /* 3 3 - * Copyright (C) 2012-2014, 2018-2024 Intel Corporation 3 3 + * Copyright (C) 2012-2014, 2018-2025 Intel Corporation 4 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 5 * Copyright (C) 2015-2017 Intel Deutschland GmbH 6 6 */ ··· 2157 2157 } 2158 2158 2159 2159 if (iwl_mvm_is_band_in_rx_supported(mvm)) { 2160 2160 - u8 band = BAND_IN_RX_STATUS(desc->mac_phy_idx); 2160 2160 + u8 band = u8_get_bits(desc->mac_phy_band, 2161 2161 + IWL_RX_MPDU_MAC_PHY_BAND_BAND_MASK); 2161 2162 2162 2163 rx_status->band = iwl_mvm_nl80211_band_from_phy(band); 2163 2164 } else {

+1 -4

drivers/net/wireless/intel/iwlwifi/mvm/sta.h

reviewed

··· 1 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 2 /* 3 3 - * Copyright (C) 2012-2014, 2018-2024 Intel Corporation 3 3 + * Copyright (C) 2012-2014, 2018-2025 Intel Corporation 4 4 * Copyright (C) 2013-2014 Intel Mobile Communications GmbH 5 5 * Copyright (C) 2015-2016 Intel Deutschland GmbH 6 6 */ ··· 225 225 * @IWL_AGG_ON: aggregation session is up 226 226 * @IWL_EMPTYING_HW_QUEUE_ADDBA: establishing a BA session - waiting for the 227 227 * HW queue to be empty from packets for this RA /TID. 228 228 - * @IWL_EMPTYING_HW_QUEUE_DELBA: tearing down a BA session - waiting for the 229 229 - * HW queue to be empty from packets for this RA /TID. 230 228 */ 231 229 enum iwl_mvm_agg_state { 232 230 IWL_AGG_OFF = 0, ··· 232 234 IWL_AGG_STARTING, 233 235 IWL_AGG_ON, 234 236 IWL_EMPTYING_HW_QUEUE_ADDBA, 235 235 - IWL_EMPTYING_HW_QUEUE_DELBA, 236 237 }; 237 238 238 239 /**

+2 -12

drivers/net/wireless/intel/iwlwifi/mvm/tx.c

reviewed

··· 1 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 2 /* 3 3 - * Copyright (C) 2012-2014, 2018-2024 Intel Corporation 3 3 + * Copyright (C) 2012-2014, 2018-2025 Intel Corporation 4 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 6 */ ··· 1372 1372 1373 1373 lockdep_assert_held(&mvmsta->lock); 1374 1374 1375 1375 - if ((tid_data->state == IWL_AGG_ON || 1376 1376 - tid_data->state == IWL_EMPTYING_HW_QUEUE_DELBA) && 1375 1375 + if (tid_data->state == IWL_AGG_ON && 1377 1376 iwl_mvm_tid_queued(mvm, tid_data) == 0) { 1378 1377 /* 1379 1378 * Now that this aggregation or DQA queue is empty tell ··· 1401 1402 tid_data->state = IWL_AGG_STARTING; 1402 1403 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 1403 1404 break; 1404 1404 - 1405 1405 - case IWL_EMPTYING_HW_QUEUE_DELBA: 1406 1406 - IWL_DEBUG_TX_QUEUES(mvm, 1407 1407 - "Can continue DELBA flow ssn = next_recl = %d\n", 1408 1408 - tid_data->next_reclaimed); 1409 1409 - tid_data->state = IWL_AGG_OFF; 1410 1410 - ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 1411 1411 - break; 1412 1412 - 1413 1405 default: 1414 1406 break; 1415 1407 }

+18 -3

drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c

reviewed

··· 182 182 prph_sc_ctrl->step_cfg.mbx_addr_1 = cpu_to_le32(trans->mbx_addr_1_step); 183 183 184 184 /* allocate ucode sections in dram and set addresses */ 185 185 - ret = iwl_pcie_init_fw_sec(trans, fw, &prph_scratch->dram); 185 185 + ret = iwl_pcie_init_fw_sec(trans, fw, &prph_scratch->dram.common); 186 186 if (ret) 187 187 goto err_free_prph_scratch; 188 188 ··· 219 219 cpu_to_le64(trans_pcie->prph_info_dma_addr); 220 220 ctxt_info_gen3->prph_scratch_base_addr = 221 221 cpu_to_le64(trans_pcie->prph_scratch_dma_addr); 222 222 - ctxt_info_gen3->prph_scratch_size = 223 223 - cpu_to_le32(sizeof(*prph_scratch)); 222 222 + 223 223 + /* 224 224 + * This code assumes the FSEQ is last and we can make that 225 225 + * optional; old devices _should_ be fine with a bigger size, 226 226 + * but in simulation we check the size more precisely. 227 227 + */ 228 228 + BUILD_BUG_ON(offsetofend(typeof(*prph_scratch), dram.common) + 229 229 + sizeof(prph_scratch->dram.fseq_img) != 230 230 + sizeof(*prph_scratch)); 231 231 + if (control_flags_ext & IWL_PRPH_SCRATCH_EXT_EXT_FSEQ) 232 232 + ctxt_info_gen3->prph_scratch_size = 233 233 + cpu_to_le32(sizeof(*prph_scratch)); 234 234 + else 235 235 + ctxt_info_gen3->prph_scratch_size = 236 236 + cpu_to_le32(offsetofend(typeof(*prph_scratch), 237 237 + dram.common)); 238 238 + 224 239 ctxt_info_gen3->cr_head_idx_arr_base_addr = 225 240 cpu_to_le64(trans_pcie->rxq->rb_stts_dma); 226 241 ctxt_info_gen3->tr_tail_idx_arr_base_addr =

+2 -2

drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info.c

reviewed

··· 1 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 2 /* 3 3 * Copyright (C) 2017 Intel Deutschland GmbH 4 4 - * Copyright (C) 2018-2024 Intel Corporation 4 4 + * Copyright (C) 2018-2025 Intel Corporation 5 5 */ 6 6 #include "iwl-trans.h" 7 7 #include "iwl-fh.h" ··· 83 83 84 84 int iwl_pcie_init_fw_sec(struct iwl_trans *trans, 85 85 const struct fw_img *fw, 86 86 - struct iwl_context_info_dram *ctxt_dram) 86 86 + struct iwl_context_info_dram_nonfseq *ctxt_dram) 87 87 { 88 88 struct iwl_self_init_dram *dram = &trans->init_dram; 89 89 int i, ret, lmac_cnt, umac_cnt, paging_cnt;

+13 -1

drivers/net/wireless/intel/iwlwifi/pcie/rx.c

reviewed

··· 1947 1947 handled |= CSR_INT_BIT_ALIVE; 1948 1948 } 1949 1949 1950 1950 + if (inta & CSR_INT_BIT_RESET_DONE) { 1951 1951 + IWL_DEBUG_ISR(trans, "Reset flow completed\n"); 1952 1952 + trans_pcie->fw_reset_state = FW_RESET_OK; 1953 1953 + handled |= CSR_INT_BIT_RESET_DONE; 1954 1954 + wake_up(&trans_pcie->fw_reset_waitq); 1955 1955 + } 1956 1956 + 1950 1957 /* Safely ignore these bits for debug checks below */ 1951 1958 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); 1952 1959 ··· 1975 1968 IWL_ERR(trans, "Microcode SW error detected. " 1976 1969 " Restarting 0x%X.\n", inta); 1977 1970 isr_stats->sw++; 1978 1978 - iwl_pcie_irq_handle_error(trans); 1971 1971 + if (trans_pcie->fw_reset_state == FW_RESET_REQUESTED) { 1972 1972 + trans_pcie->fw_reset_state = FW_RESET_ERROR; 1973 1973 + wake_up(&trans_pcie->fw_reset_waitq); 1974 1974 + } else { 1975 1975 + iwl_pcie_irq_handle_error(trans); 1976 1976 + } 1979 1977 handled |= CSR_INT_BIT_SW_ERR; 1980 1978 } 1981 1979

+19 -4

drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c

reviewed

··· 117 117 trans_pcie->fw_reset_state != FW_RESET_REQUESTED, 118 118 FW_RESET_TIMEOUT); 119 119 if (!ret || trans_pcie->fw_reset_state == FW_RESET_ERROR) { 120 120 - u32 inta_hw = iwl_read32(trans, CSR_MSIX_HW_INT_CAUSES_AD); 120 120 + bool reset_done; 121 121 + u32 inta_hw; 122 122 + 123 123 + if (trans_pcie->msix_enabled) { 124 124 + inta_hw = iwl_read32(trans, CSR_MSIX_HW_INT_CAUSES_AD); 125 125 + reset_done = 126 126 + inta_hw & MSIX_HW_INT_CAUSES_REG_RESET_DONE; 127 127 + } else { 128 128 + inta_hw = iwl_read32(trans, CSR_INT_MASK); 129 129 + reset_done = inta_hw & CSR_INT_BIT_RESET_DONE; 130 130 + } 121 131 122 132 IWL_ERR(trans, 123 123 - "timeout waiting for FW reset ACK (inta_hw=0x%x)\n", 124 124 - inta_hw); 133 133 + "timeout waiting for FW reset ACK (inta_hw=0x%x, reset_done %d)\n", 134 134 + inta_hw, reset_done); 125 135 126 126 - if (!(inta_hw & MSIX_HW_INT_CAUSES_REG_RESET_DONE)) { 136 136 + if (!reset_done) { 127 137 struct iwl_fw_error_dump_mode mode = { 128 138 .type = IWL_ERR_TYPE_RESET_HS_TIMEOUT, 129 139 .context = IWL_ERR_CONTEXT_FROM_OPMODE, ··· 389 379 390 380 iwl_pcie_get_rf_name(trans); 391 381 mutex_unlock(&trans_pcie->mutex); 382 382 + 383 383 + if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) 384 384 + trans->step_urm = !!(iwl_read_umac_prph(trans, 385 385 + CNVI_PMU_STEP_FLOW) & 386 386 + CNVI_PMU_STEP_FLOW_FORCE_URM); 392 387 } 393 388 394 389 static bool iwl_pcie_set_ltr(struct iwl_trans *trans)

+6

drivers/net/wireless/intel/iwlwifi/pcie/trans.c

reviewed

··· 2942 2942 for (i = 0; i < trans->num_rx_queues && pos < bufsz; i++) { 2943 2943 struct iwl_rxq *rxq = &trans_pcie->rxq[i]; 2944 2944 2945 2945 + spin_lock_bh(&rxq->lock); 2946 2946 + 2945 2947 pos += scnprintf(buf + pos, bufsz - pos, "queue#: %2d\n", 2946 2948 i); 2947 2949 pos += scnprintf(buf + pos, bufsz - pos, "\tread: %u\n", ··· 2964 2962 pos += scnprintf(buf + pos, bufsz - pos, 2965 2963 "\tclosed_rb_num: Not Allocated\n"); 2966 2964 } 2965 2965 + spin_unlock_bh(&rxq->lock); 2967 2966 } 2968 2967 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); 2969 2968 kfree(buf); ··· 3665 3662 /* Dump RBs is supported only for pre-9000 devices (1 queue) */ 3666 3663 struct iwl_rxq *rxq = &trans_pcie->rxq[0]; 3667 3664 /* RBs */ 3665 3665 + spin_lock_bh(&rxq->lock); 3668 3666 num_rbs = iwl_get_closed_rb_stts(trans, rxq); 3669 3667 num_rbs = (num_rbs - rxq->read) & RX_QUEUE_MASK; 3668 3668 + spin_unlock_bh(&rxq->lock); 3669 3669 + 3670 3670 len += num_rbs * (sizeof(*data) + 3671 3671 sizeof(struct iwl_fw_error_dump_rb) + 3672 3672 (PAGE_SIZE << trans_pcie->rx_page_order));

+15 -27

drivers/net/wireless/marvell/mwifiex/cfg80211.c

reviewed

··· 1126 1126 HostCmd_ACT_GEN_SET, 0, NULL, true)) 1127 1127 return -1; 1128 1128 1129 1129 - if (mwifiex_sta_init_cmd(priv, false, false)) 1129 1129 + if (mwifiex_sta_init_cmd(priv, false)) 1130 1130 return -1; 1131 1131 1132 1132 return 0; ··· 1167 1167 if (mwifiex_send_cmd(priv, HostCmd_CMD_SET_BSS_MODE, 1168 1168 HostCmd_ACT_GEN_SET, 0, NULL, true)) 1169 1169 return -1; 1170 1170 - if (mwifiex_sta_init_cmd(priv, false, false)) 1170 1170 + if (mwifiex_sta_init_cmd(priv, false)) 1171 1171 return -1; 1172 1172 1173 1173 return 0; ··· 1204 1204 if (mwifiex_send_cmd(priv, HostCmd_CMD_SET_BSS_MODE, 1205 1205 HostCmd_ACT_GEN_SET, 0, NULL, true)) 1206 1206 return -1; 1207 1207 - if (mwifiex_sta_init_cmd(priv, false, false)) 1207 1207 + if (mwifiex_sta_init_cmd(priv, false)) 1208 1208 return -1; 1209 1209 1210 1210 return 0; ··· 2906 2906 struct mwifiex_private *priv) 2907 2907 { 2908 2908 int rx_mcs_supp; 2909 2909 - struct ieee80211_mcs_info mcs_set; 2910 2910 - u8 *mcs = (u8 *)&mcs_set; 2911 2909 struct mwifiex_adapter *adapter = priv->adapter; 2912 2910 2913 2911 ht_info->ht_supported = true; 2914 2912 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 2915 2913 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE; 2916 2916 - 2917 2917 - memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); 2918 2914 2919 2915 /* Fill HT capability information */ 2920 2916 if (ISSUPP_CHANWIDTH40(adapter->hw_dot_11n_dev_cap)) ··· 2957 2961 ht_info->cap |= IEEE80211_HT_CAP_SM_PS; 2958 2962 2959 2963 rx_mcs_supp = GET_RXMCSSUPP(adapter->user_dev_mcs_support); 2964 2964 + 2965 2965 + memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); 2960 2966 /* Set MCS for 1x1/2x2 */ 2961 2961 - memset(mcs, 0xff, rx_mcs_supp); 2962 2962 - /* Clear all the other values */ 2963 2963 - memset(&mcs[rx_mcs_supp], 0, 2964 2964 - sizeof(struct ieee80211_mcs_info) - rx_mcs_supp); 2967 2967 + memset(ht_info->mcs.rx_mask, 0xff, rx_mcs_supp); 2968 2968 + 2965 2969 if (priv->bss_mode == NL80211_IFTYPE_STATION || 2966 2970 ISSUPP_CHANWIDTH40(adapter->hw_dot_11n_dev_cap)) 2967 2971 /* Set MCS32 for infra mode or ad-hoc mode with 40MHz support */ 2968 2968 - SETHT_MCS32(mcs_set.rx_mask); 2969 2969 - 2970 2970 - memcpy((u8 *) &ht_info->mcs, mcs, sizeof(struct ieee80211_mcs_info)); 2972 2972 + SETHT_MCS32(ht_info->mcs.rx_mask); 2971 2973 2972 2974 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2973 2975 } ··· 3007 3013 return ERR_PTR(-EFAULT); 3008 3014 } 3009 3015 3010 3010 - priv->wdev.wiphy = wiphy; 3011 3016 priv->wdev.iftype = NL80211_IFTYPE_STATION; 3012 3017 3013 3018 if (type == NL80211_IFTYPE_UNSPECIFIED) ··· 3015 3022 priv->bss_mode = type; 3016 3023 3017 3024 priv->bss_type = MWIFIEX_BSS_TYPE_STA; 3018 3018 - priv->frame_type = MWIFIEX_DATA_FRAME_TYPE_ETH_II; 3019 3019 - priv->bss_priority = 0; 3020 3025 priv->bss_role = MWIFIEX_BSS_ROLE_STA; 3021 3026 3022 3027 break; ··· 3034 3043 return ERR_PTR(-EFAULT); 3035 3044 } 3036 3045 3037 3037 - priv->wdev.wiphy = wiphy; 3038 3046 priv->wdev.iftype = NL80211_IFTYPE_AP; 3039 3047 3040 3048 priv->bss_type = MWIFIEX_BSS_TYPE_UAP; 3041 3041 - priv->frame_type = MWIFIEX_DATA_FRAME_TYPE_ETH_II; 3042 3042 - priv->bss_priority = 0; 3043 3049 priv->bss_role = MWIFIEX_BSS_ROLE_UAP; 3044 3044 - priv->bss_started = 0; 3045 3050 priv->bss_mode = type; 3046 3051 3047 3052 break; ··· 3057 3070 return ERR_PTR(-EFAULT); 3058 3071 } 3059 3072 3060 3060 - priv->wdev.wiphy = wiphy; 3061 3073 /* At start-up, wpa_supplicant tries to change the interface 3062 3074 * to NL80211_IFTYPE_STATION if it is not managed mode. 3063 3075 */ ··· 3069 3083 */ 3070 3084 priv->bss_type = MWIFIEX_BSS_TYPE_P2P; 3071 3085 3072 3072 - priv->frame_type = MWIFIEX_DATA_FRAME_TYPE_ETH_II; 3073 3073 - priv->bss_priority = 0; 3074 3086 priv->bss_role = MWIFIEX_BSS_ROLE_STA; 3075 3075 - priv->bss_started = 0; 3076 3087 3077 3088 if (mwifiex_cfg80211_init_p2p_client(priv)) { 3078 3089 memset(&priv->wdev, 0, sizeof(priv->wdev)); ··· 3082 3099 mwifiex_dbg(adapter, ERROR, "type not supported\n"); 3083 3100 return ERR_PTR(-EINVAL); 3084 3101 } 3102 3102 + 3103 3103 + priv->wdev.wiphy = wiphy; 3104 3104 + priv->bss_priority = 0; 3105 3105 + priv->bss_started = 0; 3106 3106 + priv->frame_type = MWIFIEX_DATA_FRAME_TYPE_ETH_II; 3085 3107 3086 3108 dev = alloc_netdev_mqs(sizeof(struct mwifiex_private *), name, 3087 3109 name_assign_type, ether_setup, ··· 3110 3122 if (ret) 3111 3123 goto err_set_bss_mode; 3112 3124 3113 3113 - ret = mwifiex_sta_init_cmd(priv, false, false); 3125 3125 + ret = mwifiex_sta_init_cmd(priv, false); 3114 3126 if (ret) 3115 3127 goto err_sta_init; 3116 3128 } ··· 4691 4703 void *wdev_priv; 4692 4704 struct wiphy *wiphy; 4693 4705 struct mwifiex_private *priv = adapter->priv[MWIFIEX_BSS_TYPE_STA]; 4694 4694 - u8 *country_code; 4706 4706 + const u8 *country_code; 4695 4707 u32 thr, retry; 4696 4708 struct cfg80211_ops *ops; 4697 4709

+2 -2

drivers/net/wireless/marvell/mwifiex/cfp.c

reviewed

··· 153 153 u8 region[IEEE80211_COUNTRY_STRING_LEN] __nonstring; 154 154 }; 155 155 156 156 - static struct region_code_mapping region_code_mapping_t[] = { 156 156 + static const struct region_code_mapping region_code_mapping_t[] = { 157 157 { 0x10, "US " }, /* US FCC */ 158 158 { 0x20, "CA " }, /* IC Canada */ 159 159 { 0x30, "FR " }, /* France */ ··· 165 165 }; 166 166 167 167 /* This function converts integer code to region string */ 168 168 - u8 *mwifiex_11d_code_2_region(u8 code) 168 168 + const u8 *mwifiex_11d_code_2_region(u8 code) 169 169 { 170 170 u8 i; 171 171

+23 -51

drivers/net/wireless/marvell/mwifiex/cmdevt.c

reviewed

··· 159 159 * sending. Afterwards, it logs the command ID and action for debugging 160 160 * and sets up the command timeout timer. 161 161 */ 162 162 - static int mwifiex_dnld_cmd_to_fw(struct mwifiex_private *priv, 162 162 + static int mwifiex_dnld_cmd_to_fw(struct mwifiex_adapter *adapter, 163 163 struct cmd_ctrl_node *cmd_node) 164 164 { 165 165 - 166 166 - struct mwifiex_adapter *adapter = priv->adapter; 167 165 int ret; 168 166 struct host_cmd_ds_command *host_cmd; 169 167 uint16_t cmd_code; ··· 365 367 (test_bit(MWIFIEX_IS_HS_CONFIGURED, &adapter->work_flags) && 366 368 !adapter->sleep_period.period)) { 367 369 adapter->pm_wakeup_card_req = true; 368 368 - mwifiex_hs_activated_event(mwifiex_get_priv 369 369 - (adapter, MWIFIEX_BSS_ROLE_ANY), true); 370 370 + mwifiex_hs_activated_event(adapter, true); 370 371 } 371 372 372 373 return ret; ··· 470 473 int mwifiex_process_event(struct mwifiex_adapter *adapter) 471 474 { 472 475 int ret, i; 473 473 - struct mwifiex_private *priv = 474 474 - mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 476 476 + struct mwifiex_private *priv; 475 477 struct sk_buff *skb = adapter->event_skb; 476 478 u32 eventcause; 477 479 struct mwifiex_rxinfo *rx_info; ··· 740 744 */ 741 745 int mwifiex_exec_next_cmd(struct mwifiex_adapter *adapter) 742 746 { 743 743 - struct mwifiex_private *priv; 744 747 struct cmd_ctrl_node *cmd_node; 745 748 int ret = 0; 746 749 struct host_cmd_ds_command *host_cmd; ··· 763 768 struct cmd_ctrl_node, list); 764 769 765 770 host_cmd = (struct host_cmd_ds_command *) (cmd_node->cmd_skb->data); 766 766 - priv = cmd_node->priv; 767 771 768 772 if (adapter->ps_state != PS_STATE_AWAKE) { 769 773 mwifiex_dbg(adapter, ERROR, ··· 777 783 spin_unlock_bh(&adapter->cmd_pending_q_lock); 778 784 779 785 spin_unlock_bh(&adapter->mwifiex_cmd_lock); 780 780 - ret = mwifiex_dnld_cmd_to_fw(priv, cmd_node); 781 781 - priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 786 786 + ret = mwifiex_dnld_cmd_to_fw(adapter, cmd_node); 787 787 + 782 788 /* Any command sent to the firmware when host is in sleep 783 789 * mode should de-configure host sleep. We should skip the 784 790 * host sleep configuration command itself though 785 791 */ 786 786 - if (priv && (host_cmd->command != 787 787 - cpu_to_le16(HostCmd_CMD_802_11_HS_CFG_ENH))) { 792 792 + if (host_cmd->command != cpu_to_le16(HostCmd_CMD_802_11_HS_CFG_ENH)) { 788 793 if (adapter->hs_activated) { 789 794 clear_bit(MWIFIEX_IS_HS_CONFIGURED, 790 795 &adapter->work_flags); 791 791 - mwifiex_hs_activated_event(priv, false); 796 796 + mwifiex_hs_activated_event(adapter, false); 792 797 } 793 798 } 794 799 ··· 803 810 int mwifiex_process_cmdresp(struct mwifiex_adapter *adapter) 804 811 { 805 812 struct host_cmd_ds_command *resp; 806 806 - struct mwifiex_private *priv = 807 807 - mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 813 813 + struct mwifiex_private *priv; 808 814 int ret = 0; 809 815 uint16_t orig_cmdresp_no; 810 816 uint16_t cmdresp_no; ··· 890 898 } else { 891 899 /* handle response */ 892 900 ret = mwifiex_process_sta_cmdresp(priv, cmdresp_no, resp); 893 893 - } 894 894 - 895 895 - /* Check init command response */ 896 896 - if (adapter->hw_status == MWIFIEX_HW_STATUS_INITIALIZING) { 897 897 - if (ret) { 898 898 - mwifiex_dbg(adapter, ERROR, 899 899 - "%s: cmd %#x failed during\t" 900 900 - "initialization\n", __func__, cmdresp_no); 901 901 - mwifiex_init_fw_complete(adapter); 902 902 - return -1; 903 903 - } else if (adapter->last_init_cmd == cmdresp_no) 904 904 - adapter->hw_status = MWIFIEX_HW_STATUS_INIT_DONE; 905 901 } 906 902 907 903 if (adapter->curr_cmd) { ··· 1009 1029 adapter->cmd_wait_q.status = -ETIMEDOUT; 1010 1030 mwifiex_cancel_pending_ioctl(adapter); 1011 1031 } 1012 1012 - } 1013 1013 - if (adapter->hw_status == MWIFIEX_HW_STATUS_INITIALIZING) { 1014 1014 - mwifiex_init_fw_complete(adapter); 1015 1015 - return; 1016 1032 } 1017 1033 1018 1034 if (adapter->if_ops.device_dump) ··· 1136 1160 * This event is generated by the driver, with a blank event body. 1137 1161 */ 1138 1162 void 1139 1139 - mwifiex_hs_activated_event(struct mwifiex_private *priv, u8 activated) 1163 1163 + mwifiex_hs_activated_event(struct mwifiex_adapter *adapter, u8 activated) 1140 1164 { 1141 1165 if (activated) { 1142 1166 if (test_bit(MWIFIEX_IS_HS_CONFIGURED, 1143 1143 - &priv->adapter->work_flags)) { 1144 1144 - priv->adapter->hs_activated = true; 1145 1145 - mwifiex_update_rxreor_flags(priv->adapter, 1167 1167 + &adapter->work_flags)) { 1168 1168 + adapter->hs_activated = true; 1169 1169 + mwifiex_update_rxreor_flags(adapter, 1146 1170 RXREOR_FORCE_NO_DROP); 1147 1147 - mwifiex_dbg(priv->adapter, EVENT, 1171 1171 + mwifiex_dbg(adapter, EVENT, 1148 1172 "event: hs_activated\n"); 1149 1149 - priv->adapter->hs_activate_wait_q_woken = true; 1173 1173 + adapter->hs_activate_wait_q_woken = true; 1150 1174 wake_up_interruptible( 1151 1151 - &priv->adapter->hs_activate_wait_q); 1175 1175 + &adapter->hs_activate_wait_q); 1152 1176 } else { 1153 1153 - mwifiex_dbg(priv->adapter, EVENT, 1177 1177 + mwifiex_dbg(adapter, EVENT, 1154 1178 "event: HS not configured\n"); 1155 1179 } 1156 1180 } else { 1157 1157 - mwifiex_dbg(priv->adapter, EVENT, 1181 1181 + mwifiex_dbg(adapter, EVENT, 1158 1182 "event: hs_deactivated\n"); 1159 1159 - priv->adapter->hs_activated = false; 1183 1183 + adapter->hs_activated = false; 1160 1184 } 1161 1185 } 1162 1186 ··· 1180 1204 1181 1205 if (phs_cfg->action == cpu_to_le16(HS_ACTIVATE) && 1182 1206 adapter->iface_type != MWIFIEX_USB) { 1183 1183 - mwifiex_hs_activated_event(priv, true); 1207 1207 + mwifiex_hs_activated_event(adapter, true); 1184 1208 return 0; 1185 1209 } else { 1186 1210 mwifiex_dbg(adapter, CMD, ··· 1193 1217 if (conditions != HS_CFG_CANCEL) { 1194 1218 set_bit(MWIFIEX_IS_HS_CONFIGURED, &adapter->work_flags); 1195 1219 if (adapter->iface_type == MWIFIEX_USB) 1196 1196 - mwifiex_hs_activated_event(priv, true); 1220 1220 + mwifiex_hs_activated_event(adapter, true); 1197 1221 } else { 1198 1222 clear_bit(MWIFIEX_IS_HS_CONFIGURED, &adapter->work_flags); 1199 1223 if (adapter->hs_activated) 1200 1200 - mwifiex_hs_activated_event(priv, false); 1224 1224 + mwifiex_hs_activated_event(adapter, false); 1201 1225 } 1202 1226 1203 1227 return 0; ··· 1226 1250 adapter->hs_activated = false; 1227 1251 clear_bit(MWIFIEX_IS_HS_CONFIGURED, &adapter->work_flags); 1228 1252 clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 1229 1229 - mwifiex_hs_activated_event(mwifiex_get_priv(adapter, 1230 1230 - MWIFIEX_BSS_ROLE_ANY), 1231 1231 - false); 1253 1253 + mwifiex_hs_activated_event(adapter, false); 1232 1254 } 1233 1255 EXPORT_SYMBOL_GPL(mwifiex_process_hs_config); 1234 1256 ··· 1276 1302 } 1277 1303 adapter->pm_wakeup_card_req = true; 1278 1304 if (test_bit(MWIFIEX_IS_HS_CONFIGURED, &adapter->work_flags)) 1279 1279 - mwifiex_hs_activated_event(mwifiex_get_priv 1280 1280 - (adapter, MWIFIEX_BSS_ROLE_ANY), 1281 1281 - true); 1305 1305 + mwifiex_hs_activated_event(adapter, true); 1282 1306 adapter->ps_state = PS_STATE_SLEEP; 1283 1307 cmd->command = cpu_to_le16(command); 1284 1308 cmd->seq_num = cpu_to_le16(seq_num);

+8 -13

drivers/net/wireless/marvell/mwifiex/init.c

reviewed

··· 480 480 * - Initialize the private structure 481 481 * - Add BSS priority tables to the adapter structure 482 482 * - For each interface, send the init commands to firmware 483 483 - * - Send the first command in command pending queue, if available 484 483 */ 485 484 int mwifiex_init_fw(struct mwifiex_adapter *adapter) 486 485 { 487 486 int ret; 488 487 struct mwifiex_private *priv; 489 488 u8 i, first_sta = true; 490 490 - int is_cmd_pend_q_empty; 491 489 492 490 adapter->hw_status = MWIFIEX_HW_STATUS_INITIALIZING; 493 491 ··· 507 509 } 508 510 if (adapter->mfg_mode) { 509 511 adapter->hw_status = MWIFIEX_HW_STATUS_READY; 510 510 - ret = -EINPROGRESS; 511 512 } else { 512 513 for (i = 0; i < adapter->priv_num; i++) { 513 514 ret = mwifiex_sta_init_cmd(adapter->priv[i], 514 514 - first_sta, true); 515 515 + first_sta); 515 516 if (ret == -1) 516 517 return -1; 517 518 ··· 519 522 } 520 523 521 524 spin_lock_bh(&adapter->cmd_pending_q_lock); 522 522 - is_cmd_pend_q_empty = list_empty(&adapter->cmd_pending_q); 525 525 + WARN_ON(!list_empty(&adapter->cmd_pending_q)); 523 526 spin_unlock_bh(&adapter->cmd_pending_q_lock); 524 524 - if (!is_cmd_pend_q_empty) { 525 525 - /* Send the first command in queue and return */ 526 526 - if (mwifiex_main_process(adapter) != -1) 527 527 - ret = -EINPROGRESS; 528 528 - } else { 529 529 - adapter->hw_status = MWIFIEX_HW_STATUS_READY; 530 530 - } 531 527 532 532 - return ret; 528 528 + adapter->hw_status = MWIFIEX_HW_STATUS_READY; 529 529 + 530 530 + if (adapter->if_ops.init_fw_port) 531 531 + adapter->if_ops.init_fw_port(adapter); 532 532 + 533 533 + return 0; 533 534 } 534 535 535 536 /*

+8 -35

drivers/net/wireless/marvell/mwifiex/main.c

reviewed

··· 6 6 */ 7 7 8 8 #include <linux/suspend.h> 9 9 + #include <net/sock.h> 9 10 10 11 #include "main.h" 11 12 #include "wmm.h" ··· 355 354 if (adapter->cmd_resp_received) { 356 355 adapter->cmd_resp_received = false; 357 356 mwifiex_process_cmdresp(adapter); 358 358 - 359 359 - /* call mwifiex back when init_fw is done */ 360 360 - if (adapter->hw_status == MWIFIEX_HW_STATUS_INIT_DONE) { 361 361 - adapter->hw_status = MWIFIEX_HW_STATUS_READY; 362 362 - mwifiex_init_fw_complete(adapter); 363 363 - maybe_quirk_fw_disable_ds(adapter); 364 364 - } 365 357 } 366 358 367 359 /* Check if we need to confirm Sleep Request ··· 409 415 if (adapter->hs_activated) { 410 416 clear_bit(MWIFIEX_IS_HS_CONFIGURED, 411 417 &adapter->work_flags); 412 412 - mwifiex_hs_activated_event 413 413 - (mwifiex_get_priv 414 414 - (adapter, MWIFIEX_BSS_ROLE_ANY), 415 415 - false); 418 418 + mwifiex_hs_activated_event(adapter, false); 416 419 } 417 420 } 418 421 ··· 429 438 if (adapter->hs_activated) { 430 439 clear_bit(MWIFIEX_IS_HS_CONFIGURED, 431 440 &adapter->work_flags); 432 432 - mwifiex_hs_activated_event 433 433 - (mwifiex_get_priv 434 434 - (adapter, MWIFIEX_BSS_ROLE_ANY), 435 435 - false); 441 441 + mwifiex_hs_activated_event(adapter, false); 436 442 } 437 443 } 438 444 ··· 448 460 if (adapter->hs_activated) { 449 461 clear_bit(MWIFIEX_IS_HS_CONFIGURED, 450 462 &adapter->work_flags); 451 451 - mwifiex_hs_activated_event 452 452 - (mwifiex_get_priv 453 453 - (adapter, MWIFIEX_BSS_ROLE_ANY), 454 454 - false); 463 463 + mwifiex_hs_activated_event(adapter, false); 455 464 } 456 465 } 457 466 ··· 572 587 goto err_dnld_fw; 573 588 } 574 589 575 575 - adapter->init_wait_q_woken = false; 576 590 ret = mwifiex_init_fw(adapter); 577 577 - if (ret == -1) { 591 591 + if (ret == -1) 578 592 goto err_init_fw; 579 579 - } else if (!ret) { 580 580 - adapter->hw_status = MWIFIEX_HW_STATUS_READY; 581 581 - goto done; 582 582 - } 583 583 - /* Wait for mwifiex_init to complete */ 584 584 - if (!adapter->mfg_mode) { 585 585 - wait_event_interruptible(adapter->init_wait_q, 586 586 - adapter->init_wait_q_woken); 587 587 - if (adapter->hw_status != MWIFIEX_HW_STATUS_READY) 588 588 - goto err_init_fw; 589 589 - } 593 593 + 594 594 + maybe_quirk_fw_disable_ds(adapter); 590 595 591 596 if (!adapter->wiphy) { 592 597 if (mwifiex_register_cfg80211(adapter)) { ··· 914 939 multicast = is_multicast_ether_addr(skb->data); 915 940 916 941 if (unlikely(!multicast && skb->sk && 917 917 - skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS && 942 942 + sock_flag(skb->sk, SOCK_WIFI_STATUS) && 918 943 priv->adapter->fw_api_ver == MWIFIEX_FW_V15)) 919 944 skb = mwifiex_clone_skb_for_tx_status(priv, 920 945 skb, ··· 1533 1558 1534 1559 adapter->hw_status = MWIFIEX_HW_STATUS_INITIALIZING; 1535 1560 clear_bit(MWIFIEX_SURPRISE_REMOVED, &adapter->work_flags); 1536 1536 - init_waitqueue_head(&adapter->init_wait_q); 1537 1561 clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 1538 1562 adapter->hs_activated = false; 1539 1563 clear_bit(MWIFIEX_IS_CMD_TIMEDOUT, &adapter->work_flags); ··· 1700 1726 1701 1727 adapter->hw_status = MWIFIEX_HW_STATUS_INITIALIZING; 1702 1728 clear_bit(MWIFIEX_SURPRISE_REMOVED, &adapter->work_flags); 1703 1703 - init_waitqueue_head(&adapter->init_wait_q); 1704 1729 clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 1705 1730 adapter->hs_activated = false; 1706 1731 init_waitqueue_head(&adapter->hs_activate_wait_q);

+3 -10

drivers/net/wireless/marvell/mwifiex/main.h

reviewed

··· 239 239 enum MWIFIEX_HARDWARE_STATUS { 240 240 MWIFIEX_HW_STATUS_READY, 241 241 MWIFIEX_HW_STATUS_INITIALIZING, 242 242 - MWIFIEX_HW_STATUS_INIT_DONE, 243 242 MWIFIEX_HW_STATUS_RESET, 244 243 MWIFIEX_HW_STATUS_NOT_READY 245 244 }; ··· 864 865 unsigned long work_flags; 865 866 u32 fw_release_number; 866 867 u8 intf_hdr_len; 867 867 - u16 init_wait_q_woken; 868 868 - wait_queue_head_t init_wait_q; 869 868 void *card; 870 869 struct mwifiex_if_ops if_ops; 871 870 atomic_t bypass_tx_pending; ··· 916 919 struct cmd_ctrl_node *curr_cmd; 917 920 /* spin lock for command */ 918 921 spinlock_t mwifiex_cmd_lock; 919 919 - u16 last_init_cmd; 920 922 struct timer_list cmd_timer; 921 923 struct list_head cmd_free_q; 922 924 /* spin lock for cmd_free_q */ ··· 1056 1060 1057 1061 int mwifiex_init_fw(struct mwifiex_adapter *adapter); 1058 1062 1059 1059 - int mwifiex_init_fw_complete(struct mwifiex_adapter *adapter); 1060 1060 - 1061 1063 void mwifiex_shutdown_drv(struct mwifiex_adapter *adapter); 1062 1064 1063 1065 int mwifiex_dnld_fw(struct mwifiex_adapter *, struct mwifiex_fw_image *); ··· 1119 1125 struct host_cmd_ds_command *resp, 1120 1126 struct mwifiex_ds_pm_cfg *pm_cfg); 1121 1127 void mwifiex_process_hs_config(struct mwifiex_adapter *adapter); 1122 1122 - void mwifiex_hs_activated_event(struct mwifiex_private *priv, 1128 1128 + void mwifiex_hs_activated_event(struct mwifiex_adapter *adapter, 1123 1129 u8 activated); 1124 1130 int mwifiex_set_hs_params(struct mwifiex_private *priv, u16 action, 1125 1131 int cmd_type, struct mwifiex_ds_hs_cfg *hs_cfg); ··· 1150 1156 struct sk_buff *skb); 1151 1157 void mwifiex_process_uap_txpd(struct mwifiex_private *priv, 1152 1158 struct sk_buff *skb); 1153 1153 - int mwifiex_sta_init_cmd(struct mwifiex_private *, u8 first_sta, bool init); 1159 1159 + int mwifiex_sta_init_cmd(struct mwifiex_private *, u8 first_sta); 1154 1160 int mwifiex_cmd_802_11_scan(struct host_cmd_ds_command *cmd, 1155 1161 struct mwifiex_scan_cmd_config *scan_cfg); 1156 1162 void mwifiex_queue_scan_cmd(struct mwifiex_private *priv, ··· 1559 1565 int mwifiex_set_mgmt_ies(struct mwifiex_private *priv, 1560 1566 struct cfg80211_beacon_data *data); 1561 1567 int mwifiex_del_mgmt_ies(struct mwifiex_private *priv); 1562 1562 - u8 *mwifiex_11d_code_2_region(u8 code); 1568 1568 + const u8 *mwifiex_11d_code_2_region(u8 code); 1563 1569 void mwifiex_uap_set_channel(struct mwifiex_private *priv, 1564 1570 struct mwifiex_uap_bss_param *bss_cfg, 1565 1571 struct cfg80211_chan_def chandef); ··· 1592 1598 struct mwifiex_sta_node * 1593 1599 mwifiex_get_sta_entry(struct mwifiex_private *priv, const u8 *mac); 1594 1600 u8 mwifiex_is_tdls_chan_switching(struct mwifiex_private *priv); 1595 1595 - u8 mwifiex_is_tdls_off_chan(struct mwifiex_private *priv); 1596 1601 u8 mwifiex_is_send_cmd_allowed(struct mwifiex_private *priv); 1597 1602 int mwifiex_send_tdls_data_frame(struct mwifiex_private *priv, const u8 *peer, 1598 1603 u8 action_code, u8 dialog_token,

+1 -1

drivers/net/wireless/marvell/mwifiex/pcie.c

reviewed

··· 2971 2971 goto err_iomap2; 2972 2972 } 2973 2973 2974 2974 - pr_notice("PCI memory map Virt0: %pK PCI memory map Virt2: %pK\n", 2974 2974 + pr_notice("PCI memory map Virt0: %p PCI memory map Virt2: %p\n", 2975 2975 card->pci_mmap, card->pci_mmap1); 2976 2976 2977 2977 ret = mwifiex_pcie_alloc_buffers(adapter);

+15 -36

drivers/net/wireless/marvell/mwifiex/sta_cmd.c

reviewed

··· 157 157 */ 158 158 static int mwifiex_cmd_tx_rate_cfg(struct mwifiex_private *priv, 159 159 struct host_cmd_ds_command *cmd, 160 160 - u16 cmd_action, u16 *pbitmap_rates) 160 160 + u16 cmd_action, const u16 *pbitmap_rates) 161 161 { 162 162 struct host_cmd_ds_tx_rate_cfg *rate_cfg = &cmd->params.tx_rate_cfg; 163 163 struct mwifiex_rate_scope *rate_scope; ··· 174 174 rate_scope->type = cpu_to_le16(TLV_TYPE_RATE_SCOPE); 175 175 rate_scope->length = cpu_to_le16 176 176 (sizeof(*rate_scope) - sizeof(struct mwifiex_ie_types_header)); 177 177 - if (pbitmap_rates != NULL) { 178 178 - rate_scope->hr_dsss_rate_bitmap = cpu_to_le16(pbitmap_rates[0]); 179 179 - rate_scope->ofdm_rate_bitmap = cpu_to_le16(pbitmap_rates[1]); 180 180 - for (i = 0; i < ARRAY_SIZE(rate_scope->ht_mcs_rate_bitmap); i++) 181 181 - rate_scope->ht_mcs_rate_bitmap[i] = 182 182 - cpu_to_le16(pbitmap_rates[2 + i]); 183 183 - if (priv->adapter->fw_api_ver == MWIFIEX_FW_V15) { 184 184 - for (i = 0; 185 185 - i < ARRAY_SIZE(rate_scope->vht_mcs_rate_bitmap); 186 186 - i++) 187 187 - rate_scope->vht_mcs_rate_bitmap[i] = 188 188 - cpu_to_le16(pbitmap_rates[10 + i]); 189 189 - } 190 190 - } else { 191 191 - rate_scope->hr_dsss_rate_bitmap = 192 192 - cpu_to_le16(priv->bitmap_rates[0]); 193 193 - rate_scope->ofdm_rate_bitmap = 194 194 - cpu_to_le16(priv->bitmap_rates[1]); 195 195 - for (i = 0; i < ARRAY_SIZE(rate_scope->ht_mcs_rate_bitmap); i++) 196 196 - rate_scope->ht_mcs_rate_bitmap[i] = 197 197 - cpu_to_le16(priv->bitmap_rates[2 + i]); 198 198 - if (priv->adapter->fw_api_ver == MWIFIEX_FW_V15) { 199 199 - for (i = 0; 200 200 - i < ARRAY_SIZE(rate_scope->vht_mcs_rate_bitmap); 201 201 - i++) 202 202 - rate_scope->vht_mcs_rate_bitmap[i] = 203 203 - cpu_to_le16(priv->bitmap_rates[10 + i]); 204 204 - } 177 177 + if (!pbitmap_rates) 178 178 + pbitmap_rates = priv->bitmap_rates; 179 179 + 180 180 + rate_scope->hr_dsss_rate_bitmap = cpu_to_le16(pbitmap_rates[0]); 181 181 + rate_scope->ofdm_rate_bitmap = cpu_to_le16(pbitmap_rates[1]); 182 182 + 183 183 + for (i = 0; i < ARRAY_SIZE(rate_scope->ht_mcs_rate_bitmap); i++) 184 184 + rate_scope->ht_mcs_rate_bitmap[i] = cpu_to_le16(pbitmap_rates[2 + i]); 185 185 + 186 186 + if (priv->adapter->fw_api_ver == MWIFIEX_FW_V15) { 187 187 + for (i = 0; i < ARRAY_SIZE(rate_scope->vht_mcs_rate_bitmap); i++) 188 188 + rate_scope->vht_mcs_rate_bitmap[i] = 189 189 + cpu_to_le16(pbitmap_rates[10 + i]); 205 190 } 206 191 207 192 rate_drop = (struct mwifiex_rate_drop_pattern *) ((u8 *) rate_scope + ··· 2243 2258 * - Set 11d control 2244 2259 * - Set MAC control (this must be the last command to initialize firmware) 2245 2260 */ 2246 2246 - int mwifiex_sta_init_cmd(struct mwifiex_private *priv, u8 first_sta, bool init) 2261 2261 + int mwifiex_sta_init_cmd(struct mwifiex_private *priv, u8 first_sta) 2247 2262 { 2248 2263 struct mwifiex_adapter *adapter = priv->adapter; 2249 2264 int ret; ··· 2417 2432 tx_cfg.tx_htcap = MWIFIEX_FW_DEF_HTTXCFG; 2418 2433 ret = mwifiex_send_cmd(priv, HostCmd_CMD_11N_CFG, 2419 2434 HostCmd_ACT_GEN_SET, 0, &tx_cfg, true); 2420 2420 - 2421 2421 - if (init) { 2422 2422 - /* set last_init_cmd before sending the command */ 2423 2423 - priv->adapter->last_init_cmd = HostCmd_CMD_11N_CFG; 2424 2424 - ret = -EINPROGRESS; 2425 2425 - } 2426 2435 2427 2436 return ret; 2428 2437 }

+1 -2

drivers/net/wireless/marvell/mwifiex/txrx.c

reviewed

··· 24 24 int mwifiex_handle_rx_packet(struct mwifiex_adapter *adapter, 25 25 struct sk_buff *skb) 26 26 { 27 27 - struct mwifiex_private *priv = 28 28 - mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 27 27 + struct mwifiex_private *priv; 29 28 struct rxpd *local_rx_pd; 30 29 struct mwifiex_rxinfo *rx_info = MWIFIEX_SKB_RXCB(skb); 31 30 int ret;

+1 -19

drivers/net/wireless/marvell/mwifiex/util.c

reviewed

··· 116 116 static int num_of_items = ARRAY_SIZE(items); 117 117 118 118 /* 119 119 - * Firmware initialization complete callback handler. 120 120 - * 121 121 - * This function wakes up the function waiting on the init 122 122 - * wait queue for the firmware initialization to complete. 123 123 - */ 124 124 - int mwifiex_init_fw_complete(struct mwifiex_adapter *adapter) 125 125 - { 126 126 - 127 127 - if (adapter->hw_status == MWIFIEX_HW_STATUS_READY) 128 128 - if (adapter->if_ops.init_fw_port) 129 129 - adapter->if_ops.init_fw_port(adapter); 130 130 - 131 131 - adapter->init_wait_q_woken = true; 132 132 - wake_up_interruptible(&adapter->init_wait_q); 133 133 - return 0; 134 134 - } 135 135 - 136 136 - /* 137 119 * This function sends init/shutdown command 138 120 * to firmware. 139 121 */ ··· 645 663 return false; 646 664 } 647 665 648 648 - u8 mwifiex_is_tdls_off_chan(struct mwifiex_private *priv) 666 666 + static u8 mwifiex_is_tdls_off_chan(struct mwifiex_private *priv) 649 667 { 650 668 struct mwifiex_sta_node *sta_ptr; 651 669

+6 -6

drivers/net/wireless/marvell/mwifiex/wmm.c

reviewed

··· 1428 1428 } 1429 1429 1430 1430 if (!ptr->is_11n_enabled || 1431 1431 - ptr->ba_status || 1432 1432 - priv->wps.session_enable) { 1431 1431 + ptr->ba_status || 1432 1432 + priv->wps.session_enable) { 1433 1433 if (ptr->is_11n_enabled && 1434 1434 - ptr->ba_status && 1435 1435 - ptr->amsdu_in_ampdu && 1436 1436 - mwifiex_is_amsdu_allowed(priv, tid) && 1437 1437 - mwifiex_is_11n_aggragation_possible(priv, ptr, 1434 1434 + ptr->ba_status && 1435 1435 + ptr->amsdu_in_ampdu && 1436 1436 + mwifiex_is_amsdu_allowed(priv, tid) && 1437 1437 + mwifiex_is_11n_aggragation_possible(priv, ptr, 1438 1438 adapter->tx_buf_size)) 1439 1439 mwifiex_11n_aggregate_pkt(priv, ptr, ptr_index); 1440 1440 /* ra_list_spinlock has been freed in

+1 -1

drivers/net/wireless/ralink/rt2x00/rt2800lib.c

reviewed

··· 9393 9393 p0, p1, pf, idx0, idx1, ibit); 9394 9394 9395 9395 if (bidx != 5 && pf <= p0 && pf < p1) { 9396 9396 - idxf[iorq] = idxf[iorq]; 9396 9396 + /* no need to adjust idxf[] */; 9397 9397 } else if (p0 < p1) { 9398 9398 pf = p0; 9399 9399 idxf[iorq] = idx0 & 0x3F;

+9 -3

drivers/net/wireless/virtual/mac80211_hwsim.c

reviewed

··· 1229 1229 /* MLD not supported here */ 1230 1230 u32 bcn_int = data->link_data[0].beacon_int; 1231 1231 u64 delta = abs(tsf - now); 1232 1232 + struct ieee80211_bss_conf *conf; 1233 1233 + 1234 1234 + conf = link_conf_dereference_protected(vif, data->link_data[0].link_id); 1235 1235 + if (conf && !conf->enable_beacon) 1236 1236 + return; 1232 1237 1233 1238 /* adjust after beaconing with new timestamp at old TBTT */ 1234 1239 if (tsf > now) { ··· 2278 2273 { 2279 2274 struct mac80211_hwsim_link_data *link_data = arg; 2280 2275 u32 link_id = link_data->link_id; 2281 2281 - struct ieee80211_bss_conf *link_conf; 2276 2276 + struct ieee80211_bss_conf *link_conf, *tx_bss_conf; 2282 2277 struct mac80211_hwsim_data *data = 2283 2278 container_of(link_data, struct mac80211_hwsim_data, 2284 2279 link_data[link_id]); ··· 2297 2292 vif->type != NL80211_IFTYPE_OCB) 2298 2293 return; 2299 2294 2300 2300 - if (vif->mbssid_tx_vif && vif->mbssid_tx_vif != vif) 2295 2295 + tx_bss_conf = rcu_access_pointer(link_conf->tx_bss_conf); 2296 2296 + if (tx_bss_conf && tx_bss_conf != link_conf) 2301 2297 return; 2302 2298 2303 2303 - if (vif->bss_conf.ema_ap) { 2299 2299 + if (link_conf->ema_ap) { 2304 2300 struct ieee80211_ema_beacons *ema; 2305 2301 u8 i = 0; 2306 2302

+4 -4

drivers/ssb/driver_gpio.c

reviewed

··· 148 148 if (bus->bustype != SSB_BUSTYPE_SSB) 149 149 return 0; 150 150 151 151 - bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio, 152 152 - &irq_domain_simple_ops, chipco); 151 151 + bus->irq_domain = irq_domain_create_linear(NULL, chip->ngpio, &irq_domain_simple_ops, 152 152 + chipco); 153 153 if (!bus->irq_domain) { 154 154 err = -ENODEV; 155 155 goto err_irq_domain; ··· 347 347 if (bus->bustype != SSB_BUSTYPE_SSB) 348 348 return 0; 349 349 350 350 - bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio, 351 351 - &irq_domain_simple_ops, extif); 350 350 + bus->irq_domain = irq_domain_create_linear(NULL, chip->ngpio, &irq_domain_simple_ops, 351 351 + extif); 352 352 if (!bus->irq_domain) { 353 353 err = -ENODEV; 354 354 goto err_irq_domain;

+77

include/linux/ieee80211.h

reviewed

··· 4087 4087 /* Defines support for enhanced multi-bssid advertisement*/ 4088 4088 #define WLAN_EXT_CAPA11_EMA_SUPPORT BIT(3) 4089 4089 4090 4090 + /* Enable Beacon Protection */ 4091 4091 + #define WLAN_EXT_CAPA11_BCN_PROTECT BIT(4) 4092 4092 + 4090 4093 /* TDLS specific payload type in the LLC/SNAP header */ 4091 4094 #define WLAN_TDLS_SNAP_RFTYPE 0x2 4092 4095 ··· 5616 5613 } 5617 5614 5618 5615 return len >= fixed + elem_len; 5616 5616 + } 5617 5617 + 5618 5618 + /** 5619 5619 + * ieee80211_emlsr_pad_delay_in_us - Fetch the EMLSR Padding delay 5620 5620 + * in microseconds 5621 5621 + * @eml_cap: EML capabilities field value from common info field of 5622 5622 + * the Multi-link element 5623 5623 + * Return: the EMLSR Padding delay (in microseconds) encoded in the 5624 5624 + * EML Capabilities field 5625 5625 + */ 5626 5626 + 5627 5627 + static inline u32 ieee80211_emlsr_pad_delay_in_us(u16 eml_cap) 5628 5628 + { 5629 5629 + /* IEEE Std 802.11be-2024 Table 9-417i—Encoding of the EMLSR 5630 5630 + * Padding Delay subfield. 5631 5631 + */ 5632 5632 + u32 pad_delay = u16_get_bits(eml_cap, 5633 5633 + IEEE80211_EML_CAP_EMLSR_PADDING_DELAY); 5634 5634 + 5635 5635 + if (!pad_delay || 5636 5636 + pad_delay > IEEE80211_EML_CAP_EMLSR_PADDING_DELAY_256US) 5637 5637 + return 0; 5638 5638 + 5639 5639 + return 32 * (1 << (pad_delay - 1)); 5640 5640 + } 5641 5641 + 5642 5642 + /** 5643 5643 + * ieee80211_emlsr_trans_delay_in_us - Fetch the EMLSR Transition 5644 5644 + * delay in microseconds 5645 5645 + * @eml_cap: EML capabilities field value from common info field of 5646 5646 + * the Multi-link element 5647 5647 + * Return: the EMLSR Transition delay (in microseconds) encoded in the 5648 5648 + * EML Capabilities field 5649 5649 + */ 5650 5650 + 5651 5651 + static inline u32 ieee80211_emlsr_trans_delay_in_us(u16 eml_cap) 5652 5652 + { 5653 5653 + /* IEEE Std 802.11be-2024 Table 9-417j—Encoding of the EMLSR 5654 5654 + * Transition Delay subfield. 5655 5655 + */ 5656 5656 + u32 trans_delay = 5657 5657 + u16_get_bits(eml_cap, 5658 5658 + IEEE80211_EML_CAP_EMLSR_TRANSITION_DELAY); 5659 5659 + 5660 5660 + /* invalid values also just use 0 */ 5661 5661 + if (!trans_delay || 5662 5662 + trans_delay > IEEE80211_EML_CAP_EMLSR_TRANSITION_DELAY_256US) 5663 5663 + return 0; 5664 5664 + 5665 5665 + return 16 * (1 << (trans_delay - 1)); 5666 5666 + } 5667 5667 + 5668 5668 + /** 5669 5669 + * ieee80211_eml_trans_timeout_in_us - Fetch the EMLSR Transition 5670 5670 + * timeout value in microseconds 5671 5671 + * @eml_cap: EML capabilities field value from common info field of 5672 5672 + * the Multi-link element 5673 5673 + * Return: the EMLSR Transition timeout (in microseconds) encoded in 5674 5674 + * the EML Capabilities field 5675 5675 + */ 5676 5676 + 5677 5677 + static inline u32 ieee80211_eml_trans_timeout_in_us(u16 eml_cap) 5678 5678 + { 5679 5679 + /* IEEE Std 802.11be-2024 Table 9-417m—Encoding of the 5680 5680 + * Transition Timeout subfield. 5681 5681 + */ 5682 5682 + u8 timeout = u16_get_bits(eml_cap, 5683 5683 + IEEE80211_EML_CAP_TRANSITION_TIMEOUT); 5684 5684 + 5685 5685 + /* invalid values also just use 0 */ 5686 5686 + if (!timeout || timeout > IEEE80211_EML_CAP_TRANSITION_TIMEOUT_128TU) 5687 5687 + return 0; 5688 5688 + 5689 5689 + return 128 * (1 << (timeout - 1)); 5619 5690 } 5620 5691 5621 5692 #define for_each_mle_subelement(_elem, _data, _len) \

-3

include/linux/skbuff.h

reviewed

··· 481 481 /* generate software time stamp on packet tx completion */ 482 482 SKBTX_COMPLETION_TSTAMP = 1 << 3, 483 483 484 484 - /* generate wifi status information (where possible) */ 485 485 - SKBTX_WIFI_STATUS = 1 << 4, 486 486 - 487 484 /* determine hardware time stamp based on time or cycles */ 488 485 SKBTX_HW_TSTAMP_NETDEV = 1 << 5, 489 486

+7 -37

include/net/cfg80211.h

reviewed

··· 1097 1097 int nl80211_send_chandef(struct sk_buff *msg, const struct cfg80211_chan_def *chandef); 1098 1098 1099 1099 /** 1100 1100 - * ieee80211_chanwidth_rate_flags - return rate flags for channel width 1101 1101 - * @width: the channel width of the channel 1102 1102 - * 1103 1103 - * In some channel types, not all rates may be used - for example CCK 1104 1104 - * rates may not be used in 5/10 MHz channels. 1105 1105 - * 1106 1106 - * Returns: rate flags which apply for this channel width 1107 1107 - */ 1108 1108 - static inline enum ieee80211_rate_flags 1109 1109 - ieee80211_chanwidth_rate_flags(enum nl80211_chan_width width) 1110 1110 - { 1111 1111 - switch (width) { 1112 1112 - case NL80211_CHAN_WIDTH_5: 1113 1113 - return IEEE80211_RATE_SUPPORTS_5MHZ; 1114 1114 - case NL80211_CHAN_WIDTH_10: 1115 1115 - return IEEE80211_RATE_SUPPORTS_10MHZ; 1116 1116 - default: 1117 1117 - break; 1118 1118 - } 1119 1119 - return 0; 1120 1120 - } 1121 1121 - 1122 1122 - /** 1123 1123 - * ieee80211_chandef_rate_flags - returns rate flags for a channel 1124 1124 - * @chandef: channel definition for the channel 1125 1125 - * 1126 1126 - * See ieee80211_chanwidth_rate_flags(). 1127 1127 - * 1128 1128 - * Returns: rate flags which apply for this channel 1129 1129 - */ 1130 1130 - static inline enum ieee80211_rate_flags 1131 1131 - ieee80211_chandef_rate_flags(struct cfg80211_chan_def *chandef) 1132 1132 - { 1133 1133 - return ieee80211_chanwidth_rate_flags(chandef->width); 1134 1134 - } 1135 1135 - 1136 1136 - /** 1137 1100 * ieee80211_chandef_max_power - maximum transmission power for the chandef 1138 1101 * 1139 1102 * In some regulations, the transmit power may depend on the configured channel ··· 1263 1300 * struct cfg80211_mbssid_config - AP settings for multi bssid 1264 1301 * 1265 1302 * @tx_wdev: pointer to the transmitted interface in the MBSSID set 1303 1303 + * @tx_link_id: link ID of the transmitted profile in an MLD. 1266 1304 * @index: index of this AP in the multi bssid group. 1267 1305 * @ema: set to true if the beacons should be sent out in EMA mode. 1268 1306 */ 1269 1307 struct cfg80211_mbssid_config { 1270 1308 struct wireless_dev *tx_wdev; 1309 1309 + u8 tx_link_id; 1271 1310 u8 index; 1272 1311 bool ema; 1273 1312 }; ··· 1735 1770 * @supported_oper_classes_len: number of supported operating classes 1736 1771 * @support_p2p_ps: information if station supports P2P PS mechanism 1737 1772 * @airtime_weight: airtime scheduler weight for this station 1773 1773 + * @eml_cap_present: Specifies if EML capabilities field (@eml_cap) is 1774 1774 + * present/updated 1775 1775 + * @eml_cap: EML capabilities of this station 1738 1776 * @link_sta_params: link related params. 1739 1777 */ 1740 1778 struct station_parameters { ··· 1762 1794 u8 supported_oper_classes_len; 1763 1795 int support_p2p_ps; 1764 1796 u16 airtime_weight; 1797 1797 + bool eml_cap_present; 1798 1798 + u16 eml_cap; 1765 1799 struct link_station_parameters link_sta_params; 1766 1800 }; 1767 1801

+6 -19

include/net/mac80211.h

reviewed

··· 682 682 * responder functionality. 683 683 * @ftmr_params: configurable lci/civic parameter when enabling FTM responder. 684 684 * @nontransmitted: this BSS is a nontransmitted BSS profile 685 685 + * @tx_bss_conf: Pointer to the BSS configuration of transmitting interface 686 686 + * if MBSSID is enabled. This pointer is RCU-protected due to CSA finish 687 687 + * and BSS color change flows accessing it. 685 688 * @transmitter_bssid: the address of transmitter AP 686 689 * @bssid_index: index inside the multiple BSSID set 687 690 * @bssid_indicator: 2^bssid_indicator is the maximum number of APs in set ··· 807 804 struct ieee80211_ftm_responder_params *ftmr_params; 808 805 /* Multiple BSSID data */ 809 806 bool nontransmitted; 807 807 + struct ieee80211_bss_conf __rcu *tx_bss_conf; 810 808 u8 transmitter_bssid[ETH_ALEN]; 811 809 u8 bssid_index; 812 810 u8 bssid_indicator; ··· 2027 2023 * @txq: the multicast data TX queue 2028 2024 * @offload_flags: 802.3 -> 802.11 enapsulation offload flags, see 2029 2025 * &enum ieee80211_offload_flags. 2030 2030 - * @mbssid_tx_vif: Pointer to the transmitting interface if MBSSID is enabled. 2031 2026 */ 2032 2027 struct ieee80211_vif { 2033 2028 enum nl80211_iftype type; ··· 2054 2051 2055 2052 bool probe_req_reg; 2056 2053 bool rx_mcast_action_reg; 2057 2057 - 2058 2058 - struct ieee80211_vif *mbssid_tx_vif; 2059 2054 2060 2055 /* must be last */ 2061 2056 u8 drv_priv[] __aligned(sizeof(void *)); ··· 2489 2488 * @max_amsdu_subframes: indicates the maximal number of MSDUs in a single 2490 2489 * A-MSDU. Taken from the Extended Capabilities element. 0 means 2491 2490 * unlimited. 2491 2491 + * @eml_cap: EML capabilities of this MLO station 2492 2492 * @cur: currently valid data as aggregated from the active links 2493 2493 * For non MLO STA it will point to the deflink data. For MLO STA 2494 2494 * ieee80211_sta_recalc_aggregates() must be called to update it. ··· 2524 2522 bool mlo; 2525 2523 bool spp_amsdu; 2526 2524 u8 max_amsdu_subframes; 2525 2525 + u16 eml_cap; 2527 2526 2528 2527 struct ieee80211_sta_aggregates *cur; 2529 2528 ··· 5348 5345 struct sk_buff *skb, 5349 5346 struct ieee80211_tx_rate *dest, 5350 5347 int max_rates); 5351 5351 - 5352 5352 - /** 5353 5353 - * ieee80211_sta_set_expected_throughput - set the expected tpt for a station 5354 5354 - * 5355 5355 - * Call this function to notify mac80211 about a change in expected throughput 5356 5356 - * to a station. A driver for a device that does rate control in firmware can 5357 5357 - * call this function when the expected throughput estimate towards a station 5358 5358 - * changes. The information is used to tune the CoDel AQM applied to traffic 5359 5359 - * going towards that station (which can otherwise be too aggressive and cause 5360 5360 - * slow stations to starve). 5361 5361 - * 5362 5362 - * @pubsta: the station to set throughput for. 5363 5363 - * @thr: the current expected throughput in kbps. 5364 5364 - */ 5365 5365 - void ieee80211_sta_set_expected_throughput(struct ieee80211_sta *pubsta, 5366 5366 - u32 thr); 5367 5348 5368 5349 /** 5369 5350 * ieee80211_tx_rate_update - transmit rate update callback

-2

include/net/sock.h

reviewed

··· 2735 2735 *tskey = atomic_inc_return(&sk->sk_tskey) - 1; 2736 2736 } 2737 2737 } 2738 2738 - if (unlikely(sock_flag(sk, SOCK_WIFI_STATUS))) 2739 2739 - *tx_flags |= SKBTX_WIFI_STATUS; 2740 2738 } 2741 2739 2742 2740 static inline void sock_tx_timestamp(struct sock *sk,

+6

include/uapi/linux/nl80211.h

reviewed

··· 8036 8036 * Setting this flag is permitted only if the driver advertises EMA support 8037 8037 * by setting wiphy->ema_max_profile_periodicity to non-zero. 8038 8038 * 8039 8039 + * @NL80211_MBSSID_CONFIG_ATTR_TX_LINK_ID: Link ID of the transmitted profile. 8040 8040 + * This parameter is mandatory when NL80211_ATTR_MBSSID_CONFIG attributes 8041 8041 + * are sent for a non-transmitted profile and if the transmitted profile 8042 8042 + * is part of an MLD. For all other cases this parameter is unnecessary. 8043 8043 + * 8039 8044 * @__NL80211_MBSSID_CONFIG_ATTR_LAST: Internal 8040 8045 * @NL80211_MBSSID_CONFIG_ATTR_MAX: highest attribute 8041 8046 */ ··· 8052 8047 NL80211_MBSSID_CONFIG_ATTR_INDEX, 8053 8048 NL80211_MBSSID_CONFIG_ATTR_TX_IFINDEX, 8054 8049 NL80211_MBSSID_CONFIG_ATTR_EMA, 8050 8050 + NL80211_MBSSID_CONFIG_ATTR_TX_LINK_ID, 8055 8051 8056 8052 /* keep last */ 8057 8053 __NL80211_MBSSID_CONFIG_ATTR_LAST,

+43 -24

net/mac80211/cfg.c

reviewed

··· 146 146 struct ieee80211_bss_conf *link_conf) 147 147 { 148 148 struct ieee80211_sub_if_data *tx_sdata; 149 149 + struct ieee80211_bss_conf *old; 149 150 150 150 - sdata->vif.mbssid_tx_vif = NULL; 151 151 link_conf->bssid_index = 0; 152 152 link_conf->nontransmitted = false; 153 153 link_conf->ema_ap = false; ··· 156 156 if (sdata->vif.type != NL80211_IFTYPE_AP || !params->tx_wdev) 157 157 return -EINVAL; 158 158 159 159 + old = sdata_dereference(link_conf->tx_bss_conf, sdata); 160 160 + if (old) 161 161 + return -EALREADY; 162 162 + 159 163 tx_sdata = IEEE80211_WDEV_TO_SUB_IF(params->tx_wdev); 160 164 if (!tx_sdata) 161 165 return -EINVAL; 162 166 163 167 if (tx_sdata == sdata) { 164 164 - sdata->vif.mbssid_tx_vif = &sdata->vif; 168 168 + rcu_assign_pointer(link_conf->tx_bss_conf, link_conf); 165 169 } else { 166 166 - sdata->vif.mbssid_tx_vif = &tx_sdata->vif; 170 170 + struct ieee80211_bss_conf *tx_bss_conf; 171 171 + 172 172 + tx_bss_conf = sdata_dereference(tx_sdata->vif.link_conf[params->tx_link_id], 173 173 + sdata); 174 174 + if (rcu_access_pointer(tx_bss_conf->tx_bss_conf) != tx_bss_conf) 175 175 + return -EINVAL; 176 176 + 177 177 + rcu_assign_pointer(link_conf->tx_bss_conf, tx_bss_conf); 178 178 + 167 179 link_conf->nontransmitted = true; 168 180 link_conf->bssid_index = params->index; 169 181 } ··· 1681 1669 kfree(link_conf->ftmr_params); 1682 1670 link_conf->ftmr_params = NULL; 1683 1671 1684 1684 - sdata->vif.mbssid_tx_vif = NULL; 1685 1672 link_conf->bssid_index = 0; 1686 1673 link_conf->nontransmitted = false; 1687 1674 link_conf->ema_ap = false; ··· 1693 1682 synchronize_net(); 1694 1683 ieee80211_free_key_list(local, &keys); 1695 1684 } 1685 1685 + 1686 1686 + ieee80211_stop_mbssid(sdata); 1687 1687 + RCU_INIT_POINTER(link_conf->tx_bss_conf, NULL); 1696 1688 1697 1689 link_conf->enable_beacon = false; 1698 1690 sdata->beacon_rate_set = false; ··· 2079 2065 2080 2066 if (params->listen_interval >= 0) 2081 2067 sta->listen_interval = params->listen_interval; 2068 2068 + 2069 2069 + if (params->eml_cap_present) 2070 2070 + sta->sta.eml_cap = params->eml_cap; 2082 2071 2083 2072 ret = sta_link_apply_parameters(local, sta, STA_LINK_MODE_STA_MODIFY, 2084 2073 &params->link_sta_params); ··· 3717 3700 { 3718 3701 struct ieee80211_sub_if_data *sdata = vif_to_sdata(vif); 3719 3702 struct ieee80211_local *local = sdata->local; 3703 3703 + struct ieee80211_bss_conf *tx_bss_conf; 3720 3704 struct ieee80211_link_data *link_data; 3721 3705 3722 3706 if (WARN_ON(link_id >= IEEE80211_MLD_MAX_NUM_LINKS)) ··· 3731 3713 return; 3732 3714 } 3733 3715 3734 3734 - /* TODO: MBSSID with MLO changes */ 3735 3735 - if (vif->mbssid_tx_vif == vif) { 3716 3716 + tx_bss_conf = rcu_dereference(link_data->conf->tx_bss_conf); 3717 3717 + if (tx_bss_conf == link_data->conf) { 3736 3718 /* Trigger ieee80211_csa_finish() on the non-transmitting 3737 3719 * interfaces when channel switch is received on 3738 3720 * transmitting interface 3739 3721 */ 3740 3740 - struct ieee80211_sub_if_data *iter; 3722 3722 + struct ieee80211_link_data *iter; 3741 3723 3742 3742 - list_for_each_entry_rcu(iter, &local->interfaces, list) { 3743 3743 - if (!ieee80211_sdata_running(iter)) 3724 3724 + for_each_sdata_link(local, iter) { 3725 3725 + if (iter->sdata == sdata || 3726 3726 + rcu_access_pointer(iter->conf->tx_bss_conf) != tx_bss_conf) 3744 3727 continue; 3745 3728 3746 3746 - if (iter == sdata || iter->vif.mbssid_tx_vif != vif) 3747 3747 - continue; 3748 3748 - 3749 3749 - wiphy_work_queue(iter->local->hw.wiphy, 3750 3750 - &iter->deflink.csa.finalize_work); 3729 3729 + wiphy_work_queue(iter->sdata->local->hw.wiphy, 3730 3730 + &iter->csa.finalize_work); 3751 3731 } 3752 3732 } 3733 3733 + 3753 3734 wiphy_work_queue(local->hw.wiphy, &link_data->csa.finalize_work); 3754 3735 3755 3736 rcu_read_unlock(); ··· 4850 4833 4851 4834 ieee80211_link_info_change_notify(sdata, link, changed); 4852 4835 4853 4853 - if (!sdata->vif.bss_conf.nontransmitted && sdata->vif.mbssid_tx_vif) { 4854 4854 - struct ieee80211_sub_if_data *child; 4836 4836 + if (!link->conf->nontransmitted && 4837 4837 + rcu_access_pointer(link->conf->tx_bss_conf)) { 4838 4838 + struct ieee80211_link_data *tmp; 4855 4839 4856 4856 - list_for_each_entry(child, &sdata->local->interfaces, list) { 4857 4857 - if (child != sdata && child->vif.mbssid_tx_vif == &sdata->vif) { 4858 4858 - child->vif.bss_conf.he_bss_color.color = color; 4859 4859 - child->vif.bss_conf.he_bss_color.enabled = enable; 4860 4860 - ieee80211_link_info_change_notify(child, 4861 4861 - &child->deflink, 4862 4862 - BSS_CHANGED_HE_BSS_COLOR); 4863 4863 - } 4840 4840 + for_each_sdata_link(sdata->local, tmp) { 4841 4841 + if (tmp->sdata == sdata || 4842 4842 + rcu_access_pointer(tmp->conf->tx_bss_conf) != link->conf) 4843 4843 + continue; 4844 4844 + 4845 4845 + tmp->conf->he_bss_color.color = color; 4846 4846 + tmp->conf->he_bss_color.enabled = enable; 4847 4847 + ieee80211_link_info_change_notify(tmp->sdata, tmp, 4848 4848 + BSS_CHANGED_HE_BSS_COLOR); 4864 4849 } 4865 4850 } 4866 4851 }

+3

net/mac80211/chan.c

reviewed

··· 2131 2131 { 2132 2132 struct ieee80211_sub_if_data *sdata = link->sdata; 2133 2133 2134 2134 + if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN) 2135 2135 + return; 2136 2136 + 2134 2137 lockdep_assert_wiphy(sdata->local->hw.wiphy); 2135 2138 2136 2139 if (rcu_access_pointer(link->conf->chanctx_conf))

-6

net/mac80211/debugfs_sta.c

reviewed

··· 152 152 153 153 p += scnprintf(p, 154 154 bufsz + buf - p, 155 155 - "target %uus interval %uus ecn %s\n", 156 156 - codel_time_to_us(sta->cparams.target), 157 157 - codel_time_to_us(sta->cparams.interval), 158 158 - sta->cparams.ecn ? "yes" : "no"); 159 159 - p += scnprintf(p, 160 160 - bufsz + buf - p, 161 155 "tid ac backlog-bytes backlog-packets new-flows drops marks overlimit collisions tx-bytes tx-packets flags\n"); 162 156 163 157 for (i = 0; i < ARRAY_SIZE(sta->sta.txq); i++) {

+1 -18

net/mac80211/ibss.c

reviewed

··· 48 48 struct ieee80211_mgmt *mgmt; 49 49 u8 *pos; 50 50 struct ieee80211_supported_band *sband; 51 51 - u32 rate_flags, rates = 0, rates_added = 0; 51 51 + u32 rates = 0, rates_added = 0; 52 52 struct beacon_data *presp; 53 53 int frame_len; 54 54 ··· 90 90 pos += ifibss->ssid_len; 91 91 92 92 sband = local->hw.wiphy->bands[chandef->chan->band]; 93 93 - rate_flags = ieee80211_chandef_rate_flags(chandef); 94 93 rates_n = 0; 95 94 if (have_higher_than_11mbit) 96 95 *have_higher_than_11mbit = false; 97 96 98 97 for (i = 0; i < sband->n_bitrates; i++) { 99 99 - if ((rate_flags & sband->bitrates[i].flags) != rate_flags) 100 100 - continue; 101 98 if (sband->bitrates[i].bitrate > 110 && 102 99 have_higher_than_11mbit) 103 100 *have_higher_than_11mbit = true; ··· 392 395 const struct cfg80211_bss_ies *ies; 393 396 enum nl80211_channel_type chan_type; 394 397 u64 tsf; 395 395 - u32 rate_flags; 396 398 397 399 lockdep_assert_wiphy(sdata->local->hw.wiphy); 398 400 ··· 425 429 } 426 430 427 431 sband = sdata->local->hw.wiphy->bands[cbss->channel->band]; 428 428 - rate_flags = ieee80211_chandef_rate_flags(&sdata->u.ibss.chandef); 429 432 430 433 basic_rates = 0; 431 434 ··· 434 439 435 440 for (j = 0; j < sband->n_bitrates; j++) { 436 441 int brate; 437 437 - if ((rate_flags & sband->bitrates[j].flags) 438 438 - != rate_flags) 439 439 - continue; 440 442 441 443 brate = DIV_ROUND_UP(sband->bitrates[j].bitrate, 5); 442 444 if (brate == rate) { ··· 1709 1717 struct cfg80211_ibss_params *params) 1710 1718 { 1711 1719 u64 changed = 0; 1712 1712 - u32 rate_flags; 1713 1713 - struct ieee80211_supported_band *sband; 1714 1720 enum ieee80211_chanctx_mode chanmode; 1715 1721 struct ieee80211_local *local = sdata->local; 1716 1722 int radar_detect_width = 0; 1717 1717 - int i; 1718 1723 int ret; 1719 1724 1720 1725 lockdep_assert_wiphy(local->hw.wiphy); ··· 1754 1765 sdata->u.ibss.last_scan_completed = jiffies; 1755 1766 1756 1767 /* fix basic_rates if channel does not support these rates */ 1757 1757 - rate_flags = ieee80211_chandef_rate_flags(&params->chandef); 1758 1758 - sband = local->hw.wiphy->bands[params->chandef.chan->band]; 1759 1759 - for (i = 0; i < sband->n_bitrates; i++) { 1760 1760 - if ((rate_flags & sband->bitrates[i].flags) != rate_flags) 1761 1761 - sdata->u.ibss.basic_rates &= ~BIT(i); 1762 1762 - } 1763 1768 memcpy(sdata->vif.bss_conf.mcast_rate, params->mcast_rate, 1764 1769 sizeof(params->mcast_rate)); 1765 1770

+15 -1

net/mac80211/ieee80211_i.h

reviewed

··· 1226 1226 if ((_link = wiphy_dereference((_local)->hw.wiphy, \ 1227 1227 ___sdata->link[___link_id]))) 1228 1228 1229 1229 + #define for_each_link_data(sdata, __link) \ 1230 1230 + struct ieee80211_sub_if_data *__sdata = sdata; \ 1231 1231 + for (int __link_id = 0; \ 1232 1232 + __link_id < ARRAY_SIZE((__sdata)->link); __link_id++) \ 1233 1233 + if ((!(__sdata)->vif.valid_links || \ 1234 1234 + (__sdata)->vif.valid_links & BIT(__link_id)) && \ 1235 1235 + ((__link) = sdata_dereference((__sdata)->link[__link_id], \ 1236 1236 + (__sdata)))) 1237 1237 + 1229 1238 static inline int 1230 1239 ieee80211_get_mbssid_beacon_len(struct cfg80211_mbssid_elems *elems, 1231 1240 struct cfg80211_rnr_elems *rnr_elems, ··· 2087 2078 ieee80211_vif_set_links(sdata, 0, 0); 2088 2079 } 2089 2080 2081 2081 + void ieee80211_apvlan_link_setup(struct ieee80211_sub_if_data *sdata); 2082 2082 + void ieee80211_apvlan_link_clear(struct ieee80211_sub_if_data *sdata); 2083 2083 + 2090 2084 /* tx handling */ 2091 2085 void ieee80211_clear_tx_pending(struct ieee80211_local *local); 2092 2086 void ieee80211_tx_pending(struct tasklet_struct *t); ··· 2625 2613 /* element building in SKBs */ 2626 2614 int ieee80211_put_srates_elem(struct sk_buff *skb, 2627 2615 const struct ieee80211_supported_band *sband, 2628 2628 - u32 basic_rates, u32 rate_flags, u32 masked_rates, 2616 2616 + u32 basic_rates, u32 masked_rates, 2629 2617 u8 element_id); 2630 2618 int ieee80211_put_he_cap(struct sk_buff *skb, 2631 2619 struct ieee80211_sub_if_data *sdata, ··· 2807 2795 2808 2796 void ieee80211_process_ml_reconf_resp(struct ieee80211_sub_if_data *sdata, 2809 2797 struct ieee80211_mgmt *mgmt, size_t len); 2798 2798 + void ieee80211_stop_mbssid(struct ieee80211_sub_if_data *sdata); 2799 2799 + 2810 2800 #if IS_ENABLED(CONFIG_MAC80211_KUNIT_TEST) 2811 2801 #define EXPORT_SYMBOL_IF_MAC80211_KUNIT(sym) EXPORT_SYMBOL_IF_KUNIT(sym) 2812 2802 #define VISIBLE_IF_MAC80211_KUNIT

+65 -22

net/mac80211/iface.c

reviewed

··· 485 485 case NL80211_IFTYPE_MONITOR: 486 486 list_del_rcu(&sdata->u.mntr.list); 487 487 break; 488 488 + case NL80211_IFTYPE_AP_VLAN: 489 489 + ieee80211_apvlan_link_clear(sdata); 490 490 + break; 488 491 default: 489 492 break; 490 493 } ··· 732 729 ieee80211_add_virtual_monitor(local); 733 730 } 734 731 735 735 - static void ieee80211_stop_mbssid(struct ieee80211_sub_if_data *sdata) 732 732 + void ieee80211_stop_mbssid(struct ieee80211_sub_if_data *sdata) 736 733 { 737 737 - struct ieee80211_sub_if_data *tx_sdata, *non_tx_sdata, *tmp_sdata; 738 738 - struct ieee80211_vif *tx_vif = sdata->vif.mbssid_tx_vif; 734 734 + struct ieee80211_sub_if_data *tx_sdata; 735 735 + struct ieee80211_bss_conf *link_conf, *tx_bss_conf; 736 736 + struct ieee80211_link_data *tx_link, *link; 737 737 + unsigned int link_id; 739 738 740 740 - if (!tx_vif) 741 741 - return; 739 739 + lockdep_assert_wiphy(sdata->local->hw.wiphy); 742 740 743 743 - tx_sdata = vif_to_sdata(tx_vif); 744 744 - sdata->vif.mbssid_tx_vif = NULL; 741 741 + /* Check if any of the links of current sdata is an MBSSID. */ 742 742 + for_each_vif_active_link(&sdata->vif, link_conf, link_id) { 743 743 + tx_bss_conf = sdata_dereference(link_conf->tx_bss_conf, sdata); 744 744 + if (!tx_bss_conf) 745 745 + continue; 745 746 746 746 - list_for_each_entry_safe(non_tx_sdata, tmp_sdata, 747 747 - &tx_sdata->local->interfaces, list) { 748 748 - if (non_tx_sdata != sdata && non_tx_sdata != tx_sdata && 749 749 - non_tx_sdata->vif.mbssid_tx_vif == tx_vif && 750 750 - ieee80211_sdata_running(non_tx_sdata)) { 751 751 - non_tx_sdata->vif.mbssid_tx_vif = NULL; 752 752 - dev_close(non_tx_sdata->wdev.netdev); 747 747 + tx_sdata = vif_to_sdata(tx_bss_conf->vif); 748 748 + RCU_INIT_POINTER(link_conf->tx_bss_conf, NULL); 749 749 + 750 750 + /* If we are not tx sdata reset tx sdata's tx_bss_conf to avoid recusrion 751 751 + * while closing tx sdata at the end of outer loop below. 752 752 + */ 753 753 + if (sdata != tx_sdata) { 754 754 + tx_link = sdata_dereference(tx_sdata->link[tx_bss_conf->link_id], 755 755 + tx_sdata); 756 756 + if (!tx_link) 757 757 + continue; 758 758 + 759 759 + RCU_INIT_POINTER(tx_link->conf->tx_bss_conf, NULL); 753 760 } 754 754 - } 755 761 756 756 - if (sdata != tx_sdata && ieee80211_sdata_running(tx_sdata)) { 757 757 - tx_sdata->vif.mbssid_tx_vif = NULL; 758 758 - dev_close(tx_sdata->wdev.netdev); 762 762 + /* loop through sdatas to find if any of their links 763 763 + * belong to same MBSSID set as the one getting deleted. 764 764 + */ 765 765 + for_each_sdata_link(tx_sdata->local, link) { 766 766 + struct ieee80211_sub_if_data *link_sdata = link->sdata; 767 767 + 768 768 + if (link_sdata == sdata || link_sdata == tx_sdata || 769 769 + rcu_access_pointer(link->conf->tx_bss_conf) != tx_bss_conf) 770 770 + continue; 771 771 + 772 772 + RCU_INIT_POINTER(link->conf->tx_bss_conf, NULL); 773 773 + 774 774 + /* Remove all links of matching MLD until dynamic link 775 775 + * removal can be supported. 776 776 + */ 777 777 + cfg80211_stop_iface(link_sdata->wdev.wiphy, &link_sdata->wdev, 778 778 + GFP_KERNEL); 779 779 + } 780 780 + 781 781 + /* If we are not tx sdata, remove links of tx sdata and proceed */ 782 782 + if (sdata != tx_sdata && ieee80211_sdata_running(tx_sdata)) 783 783 + cfg80211_stop_iface(tx_sdata->wdev.wiphy, 784 784 + &tx_sdata->wdev, GFP_KERNEL); 759 785 } 760 786 } 761 787 ··· 792 760 { 793 761 struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev); 794 762 795 795 - /* close dependent VLAN and MBSSID interfaces before locking wiphy */ 763 763 + /* close dependent VLAN interfaces before locking wiphy */ 796 764 if (sdata->vif.type == NL80211_IFTYPE_AP) { 797 765 struct ieee80211_sub_if_data *vlan, *tmpsdata; 798 766 799 767 list_for_each_entry_safe(vlan, tmpsdata, &sdata->u.ap.vlans, 800 768 u.vlan.list) 801 769 dev_close(vlan->dev); 802 802 - 803 803 - ieee80211_stop_mbssid(sdata); 804 770 } 805 771 806 772 guard(wiphy)(sdata->local->hw.wiphy); 807 773 808 774 wiphy_work_cancel(sdata->local->hw.wiphy, &sdata->activate_links_work); 775 775 + 776 776 + /* Close the dependent MBSSID interfaces with wiphy lock as we may be 777 777 + * terminating its partner links too in case of MLD. 778 778 + */ 779 779 + if (sdata->vif.type == NL80211_IFTYPE_AP) 780 780 + ieee80211_stop_mbssid(sdata); 809 781 810 782 ieee80211_do_stop(sdata, true); 811 783 ··· 1304 1268 sdata->crypto_tx_tailroom_needed_cnt += 1305 1269 master->crypto_tx_tailroom_needed_cnt; 1306 1270 1271 1271 + ieee80211_apvlan_link_setup(sdata); 1272 1272 + 1307 1273 break; 1308 1274 } 1309 1275 case NL80211_IFTYPE_AP: ··· 1362 1324 case NL80211_IFTYPE_AP_VLAN: 1363 1325 /* no need to tell driver, but set carrier and chanctx */ 1364 1326 if (sdata->bss->active) { 1365 1365 - ieee80211_link_vlan_copy_chanctx(&sdata->deflink); 1327 1327 + struct ieee80211_link_data *link; 1328 1328 + 1329 1329 + for_each_link_data(sdata, link) { 1330 1330 + ieee80211_link_vlan_copy_chanctx(link); 1331 1331 + } 1332 1332 + 1366 1333 netif_carrier_on(dev); 1367 1334 ieee80211_set_vif_encap_ops(sdata); 1368 1335 } else {

+86 -4

net/mac80211/link.c

reviewed

··· 12 12 #include "key.h" 13 13 #include "debugfs_netdev.h" 14 14 15 15 + static void ieee80211_update_apvlan_links(struct ieee80211_sub_if_data *sdata) 16 16 + { 17 17 + struct ieee80211_sub_if_data *vlan; 18 18 + struct ieee80211_link_data *link; 19 19 + u16 ap_bss_links = sdata->vif.valid_links; 20 20 + u16 new_links, vlan_links; 21 21 + unsigned long add; 22 22 + 23 23 + list_for_each_entry(vlan, &sdata->u.ap.vlans, u.vlan.list) { 24 24 + int link_id; 25 25 + 26 26 + if (!vlan) 27 27 + continue; 28 28 + 29 29 + /* No support for 4addr with MLO yet */ 30 30 + if (vlan->wdev.use_4addr) 31 31 + return; 32 32 + 33 33 + vlan_links = vlan->vif.valid_links; 34 34 + 35 35 + new_links = ap_bss_links; 36 36 + 37 37 + add = new_links & ~vlan_links; 38 38 + if (!add) 39 39 + continue; 40 40 + 41 41 + ieee80211_vif_set_links(vlan, add, 0); 42 42 + 43 43 + for_each_set_bit(link_id, &add, IEEE80211_MLD_MAX_NUM_LINKS) { 44 44 + link = sdata_dereference(vlan->link[link_id], vlan); 45 45 + ieee80211_link_vlan_copy_chanctx(link); 46 46 + } 47 47 + } 48 48 + } 49 49 + 50 50 + void ieee80211_apvlan_link_setup(struct ieee80211_sub_if_data *sdata) 51 51 + { 52 52 + struct ieee80211_sub_if_data *ap_bss = container_of(sdata->bss, 53 53 + struct ieee80211_sub_if_data, u.ap); 54 54 + u16 new_links = ap_bss->vif.valid_links; 55 55 + unsigned long add; 56 56 + int link_id; 57 57 + 58 58 + if (!ap_bss->vif.valid_links) 59 59 + return; 60 60 + 61 61 + add = new_links; 62 62 + for_each_set_bit(link_id, &add, IEEE80211_MLD_MAX_NUM_LINKS) { 63 63 + sdata->wdev.valid_links |= BIT(link_id); 64 64 + ether_addr_copy(sdata->wdev.links[link_id].addr, 65 65 + ap_bss->wdev.links[link_id].addr); 66 66 + } 67 67 + 68 68 + ieee80211_vif_set_links(sdata, new_links, 0); 69 69 + } 70 70 + 71 71 + void ieee80211_apvlan_link_clear(struct ieee80211_sub_if_data *sdata) 72 72 + { 73 73 + if (!sdata->wdev.valid_links) 74 74 + return; 75 75 + 76 76 + sdata->wdev.valid_links = 0; 77 77 + ieee80211_vif_clear_links(sdata); 78 78 + } 79 79 + 15 80 void ieee80211_link_setup(struct ieee80211_link_data *link) 16 81 { 17 82 if (link->sdata->vif.type == NL80211_IFTYPE_STATION) ··· 95 30 96 31 rcu_assign_pointer(sdata->vif.link_conf[link_id], link_conf); 97 32 rcu_assign_pointer(sdata->link[link_id], link); 33 33 + 34 34 + if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN) { 35 35 + struct ieee80211_sub_if_data *ap_bss; 36 36 + struct ieee80211_bss_conf *ap_bss_conf; 37 37 + 38 38 + ap_bss = container_of(sdata->bss, 39 39 + struct ieee80211_sub_if_data, u.ap); 40 40 + ap_bss_conf = sdata_dereference(ap_bss->vif.link_conf[link_id], 41 41 + ap_bss); 42 42 + memcpy(link_conf, ap_bss_conf, sizeof(*link_conf)); 43 43 + } 98 44 99 45 link->sdata = sdata; 100 46 link->link_id = link_id; ··· 130 54 if (!deflink) { 131 55 switch (sdata->vif.type) { 132 56 case NL80211_IFTYPE_AP: 57 57 + case NL80211_IFTYPE_AP_VLAN: 133 58 ether_addr_copy(link_conf->addr, 134 59 sdata->wdev.links[link_id].addr); 135 60 link_conf->bssid = link_conf->addr; ··· 254 177 255 178 switch (sdata->vif.type) { 256 179 case NL80211_IFTYPE_AP: 180 180 + case NL80211_IFTYPE_AP_VLAN: 257 181 /* in an AP all links are always active */ 258 182 sdata->vif.active_links = valid_links; 259 183 ··· 356 278 ieee80211_set_vif_links_bitmaps(sdata, new_links, dormant_links); 357 279 358 280 /* tell the driver */ 359 359 - ret = drv_change_vif_links(sdata->local, sdata, 360 360 - old_links & old_active, 361 361 - new_links & sdata->vif.active_links, 362 362 - old); 281 281 + if (sdata->vif.type != NL80211_IFTYPE_AP_VLAN) 282 282 + ret = drv_change_vif_links(sdata->local, sdata, 283 283 + old_links & old_active, 284 284 + new_links & sdata->vif.active_links, 285 285 + old); 363 286 if (!new_links) 364 287 ieee80211_debugfs_recreate_netdev(sdata, false); 288 288 + 289 289 + if (sdata->vif.type == NL80211_IFTYPE_AP) 290 290 + ieee80211_update_apvlan_links(sdata); 365 291 } 366 292 367 293 if (ret) {

+4 -6

net/mac80211/mesh.c

reviewed

··· 8 8 9 9 #include <linux/slab.h> 10 10 #include <linux/unaligned.h> 11 11 + #include <net/sock.h> 11 12 #include "ieee80211_i.h" 12 13 #include "mesh.h" 13 14 #include "wme.h" ··· 777 776 if (ethertype < ETH_P_802_3_MIN) 778 777 return false; 779 778 780 780 - if (skb->sk && skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS) 779 779 + if (skb->sk && sock_flag(skb->sk, SOCK_WIFI_STATUS)) 781 780 return false; 782 781 783 782 if (skb->ip_summed == CHECKSUM_PARTIAL) { ··· 957 956 u8 *pos; 958 957 struct ieee80211_sub_if_data *sdata; 959 958 int hdr_len = offsetofend(struct ieee80211_mgmt, u.beacon); 960 960 - u32 rate_flags; 961 959 962 960 sdata = container_of(ifmsh, struct ieee80211_sub_if_data, u.mesh); 963 961 964 962 sband = ieee80211_get_sband(sdata); 965 965 - rate_flags = 966 966 - ieee80211_chandef_rate_flags(&sdata->vif.bss_conf.chanreq.oper); 967 963 968 964 ie_len_he_cap = ieee80211_ie_len_he_cap(sdata); 969 965 ie_len_eht_cap = ieee80211_ie_len_eht_cap(sdata); ··· 1089 1091 1090 1092 if (ieee80211_put_srates_elem(skb, sband, 1091 1093 sdata->vif.bss_conf.basic_rates, 1092 1092 - rate_flags, 0, WLAN_EID_SUPP_RATES) || 1094 1094 + 0, WLAN_EID_SUPP_RATES) || 1093 1095 mesh_add_ds_params_ie(sdata, skb)) 1094 1096 goto out_free; 1095 1097 ··· 1102 1104 1103 1105 if (ieee80211_put_srates_elem(skb, sband, 1104 1106 sdata->vif.bss_conf.basic_rates, 1105 1105 - rate_flags, 0, WLAN_EID_EXT_SUPP_RATES) || 1107 1107 + 0, WLAN_EID_EXT_SUPP_RATES) || 1106 1108 mesh_add_rsn_ie(sdata, skb) || 1107 1109 mesh_add_ht_cap_ie(sdata, skb) || 1108 1110 mesh_add_ht_oper_ie(sdata, skb) ||

+1 -1

net/mac80211/mesh_pathtbl.c

reviewed

··· 22 22 static u32 mesh_table_hash(const void *addr, u32 len, u32 seed) 23 23 { 24 24 /* Use last four bytes of hw addr as hash index */ 25 25 - return jhash_1word(__get_unaligned_cpu32((u8 *)addr + 2), seed); 25 25 + return jhash_1word(get_unaligned((u32 *)((u8 *)addr + 2)), seed); 26 26 } 27 27 28 28 static const struct rhashtable_params mesh_rht_params = {

+3 -7

net/mac80211/mesh_plink.c

reviewed

··· 264 264 265 265 if (action != WLAN_SP_MESH_PEERING_CLOSE) { 266 266 struct ieee80211_supported_band *sband; 267 267 - u32 rate_flags, basic_rates; 267 267 + u32 basic_rates; 268 268 269 269 sband = ieee80211_get_sband(sdata); 270 270 if (!sband) { ··· 280 280 put_unaligned_le16(sta->sta.aid, pos); 281 281 } 282 282 283 283 - rate_flags = 284 284 - ieee80211_chandef_rate_flags(&sdata->vif.bss_conf.chanreq.oper); 285 283 basic_rates = sdata->vif.bss_conf.basic_rates; 286 284 287 285 if (ieee80211_put_srates_elem(skb, sband, basic_rates, 288 288 - rate_flags, 0, 289 289 - WLAN_EID_SUPP_RATES) || 286 286 + 0, WLAN_EID_SUPP_RATES) || 290 287 ieee80211_put_srates_elem(skb, sband, basic_rates, 291 291 - rate_flags, 0, 292 292 - WLAN_EID_EXT_SUPP_RATES) || 288 288 + 0, WLAN_EID_EXT_SUPP_RATES) || 293 289 mesh_add_rsn_ie(sdata, skb) || 294 290 mesh_add_meshid_ie(sdata, skb) || 295 291 mesh_add_meshconf_ie(sdata, skb))

+2 -2

net/mac80211/mlme.c

reviewed

··· 1525 1525 rates = ~0; 1526 1526 } 1527 1527 1528 1528 - ieee80211_put_srates_elem(skb, sband, 0, 0, ~rates, 1528 1528 + ieee80211_put_srates_elem(skb, sband, 0, ~rates, 1529 1529 WLAN_EID_SUPP_RATES); 1530 1530 - ieee80211_put_srates_elem(skb, sband, 0, 0, ~rates, 1530 1530 + ieee80211_put_srates_elem(skb, sband, 0, ~rates, 1531 1531 WLAN_EID_EXT_SUPP_RATES); 1532 1532 } 1533 1533

-3

net/mac80211/parse.c

reviewed

··· 1101 1101 const struct ieee80211_supported_band *sband, 1102 1102 const u8 *srates, int srates_len, u32 *rates) 1103 1103 { 1104 1104 - u32 rate_flags = ieee80211_chanwidth_rate_flags(width); 1105 1104 struct ieee80211_rate *br; 1106 1105 int brate, rate, i, j, count = 0; 1107 1106 ··· 1111 1112 1112 1113 for (j = 0; j < sband->n_bitrates; j++) { 1113 1114 br = &sband->bitrates[j]; 1114 1114 - if ((rate_flags & br->flags) != rate_flags) 1115 1115 - continue; 1116 1115 1117 1116 brate = DIV_ROUND_UP(br->bitrate, 5); 1118 1117 if (brate == rate) {

+2 -10

net/mac80211/rate.c

reviewed

··· 368 368 struct ieee80211_tx_info *info, 369 369 u32 rate_mask) 370 370 { 371 371 + u32 rate_flags = 0; 371 372 int i; 372 372 - u32 rate_flags = 373 373 - ieee80211_chandef_rate_flags(&hw->conf.chandef); 374 373 375 374 if (sband->band == NL80211_BAND_S1GHZ) { 376 375 info->control.rates[0].flags |= IEEE80211_TX_RC_S1G_MCS; ··· 777 778 u8 mcs_mask[IEEE80211_HT_MCS_MASK_LEN], 778 779 u16 vht_mask[NL80211_VHT_NSS_MAX]) 779 780 { 780 780 - u32 i, flags; 781 781 + u32 i; 781 782 782 783 *mask = sdata->rc_rateidx_mask[sband->band]; 783 783 - flags = ieee80211_chandef_rate_flags(&sdata->vif.bss_conf.chanreq.oper); 784 784 - for (i = 0; i < sband->n_bitrates; i++) { 785 785 - if ((flags & sband->bitrates[i].flags) != flags) 786 786 - *mask &= ~BIT(i); 787 787 - } 788 784 789 785 if (*mask == (1 << sband->n_bitrates) - 1 && 790 786 !sdata->rc_has_mcs_mask[sband->band] && ··· 983 989 984 990 if (sta->uploaded) 985 991 drv_sta_rate_tbl_update(hw_to_local(hw), sta->sdata, pubsta); 986 986 - 987 987 - ieee80211_sta_set_expected_throughput(pubsta, sta_get_expected_throughput(sta)); 988 992 989 993 return 0; 990 994 }

+3 -10

net/mac80211/rc80211_minstrel_ht.c

reviewed

··· 1873 1873 1874 1874 static void 1875 1875 minstrel_ht_fill_rate_array(u8 *dest, struct ieee80211_supported_band *sband, 1876 1876 - const s16 *bitrates, int n_rates, u32 rate_flags) 1876 1876 + const s16 *bitrates, int n_rates) 1877 1877 { 1878 1878 int i, j; 1879 1879 1880 1880 for (i = 0; i < sband->n_bitrates; i++) { 1881 1881 struct ieee80211_rate *rate = &sband->bitrates[i]; 1882 1882 - 1883 1883 - if ((rate_flags & sband->bitrates[i].flags) != rate_flags) 1884 1884 - continue; 1885 1882 1886 1883 for (j = 0; j < n_rates; j++) { 1887 1884 if (rate->bitrate != bitrates[j]) ··· 1895 1898 { 1896 1899 static const s16 bitrates[4] = { 10, 20, 55, 110 }; 1897 1900 struct ieee80211_supported_band *sband; 1898 1898 - u32 rate_flags = ieee80211_chandef_rate_flags(&mp->hw->conf.chandef); 1899 1901 1900 1902 memset(mp->cck_rates, 0xff, sizeof(mp->cck_rates)); 1901 1903 sband = mp->hw->wiphy->bands[NL80211_BAND_2GHZ]; ··· 1904 1908 BUILD_BUG_ON(ARRAY_SIZE(mp->cck_rates) != ARRAY_SIZE(bitrates)); 1905 1909 minstrel_ht_fill_rate_array(mp->cck_rates, sband, 1906 1910 minstrel_cck_bitrates, 1907 1907 - ARRAY_SIZE(minstrel_cck_bitrates), 1908 1908 - rate_flags); 1911 1911 + ARRAY_SIZE(minstrel_cck_bitrates)); 1909 1912 } 1910 1913 1911 1914 static void ··· 1912 1917 { 1913 1918 static const s16 bitrates[8] = { 60, 90, 120, 180, 240, 360, 480, 540 }; 1914 1919 struct ieee80211_supported_band *sband; 1915 1915 - u32 rate_flags = ieee80211_chandef_rate_flags(&mp->hw->conf.chandef); 1916 1920 1917 1921 memset(mp->ofdm_rates[band], 0xff, sizeof(mp->ofdm_rates[band])); 1918 1922 sband = mp->hw->wiphy->bands[band]; ··· 1921 1927 BUILD_BUG_ON(ARRAY_SIZE(mp->ofdm_rates[band]) != ARRAY_SIZE(bitrates)); 1922 1928 minstrel_ht_fill_rate_array(mp->ofdm_rates[band], sband, 1923 1929 minstrel_ofdm_bitrates, 1924 1924 - ARRAY_SIZE(minstrel_ofdm_bitrates), 1925 1925 - rate_flags); 1930 1930 + ARRAY_SIZE(minstrel_ofdm_bitrates)); 1926 1931 } 1927 1932 1928 1933 static void *

+27 -28

net/mac80211/spectmgmt.c

reviewed

··· 147 147 struct ieee80211_local *local = sdata->local; 148 148 u32 control_freq, center_freq1, center_freq2; 149 149 enum nl80211_chan_width chan_width; 150 150 - struct { 151 151 - struct ieee80211_he_operation _oper; 152 152 - struct ieee80211_he_6ghz_oper _6ghz_oper; 153 153 - } __packed he; 154 154 - struct { 155 155 - struct ieee80211_eht_operation _oper; 156 156 - struct ieee80211_eht_operation_info _oper_info; 157 157 - } __packed eht; 150 150 + DEFINE_RAW_FLEX(struct ieee80211_he_operation, he, optional, 151 151 + sizeof(struct ieee80211_he_6ghz_oper)); 152 152 + struct ieee80211_he_6ghz_oper *_6ghz_oper = 153 153 + (struct ieee80211_he_6ghz_oper *)he->optional; 154 154 + DEFINE_RAW_FLEX(struct ieee80211_eht_operation, eht, optional, 155 155 + sizeof(struct ieee80211_eht_operation_info)); 156 156 + struct ieee80211_eht_operation_info *_oper_info = 157 157 + (struct ieee80211_eht_operation_info *)eht->optional; 158 158 const struct ieee80211_eht_operation *eht_oper; 159 159 160 160 if (conn->mode < IEEE80211_CONN_MODE_HE) { ··· 167 167 center_freq2 = chandef->center_freq2; 168 168 chan_width = chandef->width; 169 169 170 170 - he._oper.he_oper_params = 170 170 + he->he_oper_params = 171 171 le32_encode_bits(1, IEEE80211_HE_OPERATION_6GHZ_OP_INFO); 172 172 - he._6ghz_oper.primary = 172 172 + _6ghz_oper->primary = 173 173 ieee80211_frequency_to_channel(control_freq); 174 174 - he._6ghz_oper.ccfs0 = ieee80211_frequency_to_channel(center_freq1); 175 175 - he._6ghz_oper.ccfs1 = center_freq2 ? 174 174 + _6ghz_oper->ccfs0 = ieee80211_frequency_to_channel(center_freq1); 175 175 + _6ghz_oper->ccfs1 = center_freq2 ? 176 176 ieee80211_frequency_to_channel(center_freq2) : 0; 177 177 178 178 switch (chan_width) { 179 179 case NL80211_CHAN_WIDTH_320: 180 180 - he._6ghz_oper.ccfs1 = he._6ghz_oper.ccfs0; 181 181 - he._6ghz_oper.ccfs0 += control_freq < center_freq1 ? -16 : 16; 182 182 - he._6ghz_oper.control = IEEE80211_EHT_OPER_CHAN_WIDTH_320MHZ; 180 180 + _6ghz_oper->ccfs1 = _6ghz_oper->ccfs0; 181 181 + _6ghz_oper->ccfs0 += control_freq < center_freq1 ? -16 : 16; 182 182 + _6ghz_oper->control = IEEE80211_EHT_OPER_CHAN_WIDTH_320MHZ; 183 183 break; 184 184 case NL80211_CHAN_WIDTH_160: 185 185 - he._6ghz_oper.ccfs1 = he._6ghz_oper.ccfs0; 186 186 - he._6ghz_oper.ccfs0 += control_freq < center_freq1 ? -8 : 8; 185 185 + _6ghz_oper->ccfs1 = _6ghz_oper->ccfs0; 186 186 + _6ghz_oper->ccfs0 += control_freq < center_freq1 ? -8 : 8; 187 187 fallthrough; 188 188 case NL80211_CHAN_WIDTH_80P80: 189 189 - he._6ghz_oper.control = 189 189 + _6ghz_oper->control = 190 190 IEEE80211_HE_6GHZ_OPER_CTRL_CHANWIDTH_160MHZ; 191 191 break; 192 192 case NL80211_CHAN_WIDTH_80: 193 193 - he._6ghz_oper.control = 193 193 + _6ghz_oper->control = 194 194 IEEE80211_HE_6GHZ_OPER_CTRL_CHANWIDTH_80MHZ; 195 195 break; 196 196 case NL80211_CHAN_WIDTH_40: 197 197 - he._6ghz_oper.control = 197 197 + _6ghz_oper->control = 198 198 IEEE80211_HE_6GHZ_OPER_CTRL_CHANWIDTH_40MHZ; 199 199 break; 200 200 default: 201 201 - he._6ghz_oper.control = 201 201 + _6ghz_oper->control = 202 202 IEEE80211_HE_6GHZ_OPER_CTRL_CHANWIDTH_20MHZ; 203 203 break; 204 204 } ··· 206 206 if (conn->mode < IEEE80211_CONN_MODE_EHT) { 207 207 eht_oper = NULL; 208 208 } else { 209 209 - eht._oper.params = IEEE80211_EHT_OPER_INFO_PRESENT; 210 210 - eht._oper_info.control = he._6ghz_oper.control; 211 211 - eht._oper_info.ccfs0 = he._6ghz_oper.ccfs0; 212 212 - eht._oper_info.ccfs1 = he._6ghz_oper.ccfs1; 213 213 - eht_oper = &eht._oper; 209 209 + eht->params = IEEE80211_EHT_OPER_INFO_PRESENT; 210 210 + _oper_info->control = _6ghz_oper->control; 211 211 + _oper_info->ccfs0 = _6ghz_oper->ccfs0; 212 212 + _oper_info->ccfs1 = _6ghz_oper->ccfs1; 213 213 + eht_oper = eht; 214 214 } 215 215 216 216 - if (!ieee80211_chandef_he_6ghz_oper(local, &he._oper, 217 217 - eht_oper, chandef)) 216 216 + if (!ieee80211_chandef_he_6ghz_oper(local, he, eht_oper, chandef)) 218 217 chandef->chan = NULL; 219 218 } 220 219

-28

net/mac80211/sta_info.c

reviewed

··· 18 18 #include <linux/timer.h> 19 19 #include <linux/rtnetlink.h> 20 20 21 21 - #include <net/codel.h> 22 21 #include <net/mac80211.h> 23 22 #include "ieee80211_i.h" 24 23 #include "driver-ops.h" ··· 700 701 } 701 702 } 702 703 703 703 - sta->cparams.ce_threshold = CODEL_DISABLED_THRESHOLD; 704 704 - sta->cparams.target = MS2TIME(20); 705 705 - sta->cparams.interval = MS2TIME(100); 706 706 - sta->cparams.ecn = true; 707 707 - sta->cparams.ce_threshold_selector = 0; 708 708 - sta->cparams.ce_threshold_mask = 0; 709 704 710 705 sta_dbg(sdata, "Allocated STA %pM\n", sta->sta.addr); 711 706 ··· 2896 2903 time_after(stats->last_rx, sta->deflink.status_stats.last_ack)) 2897 2904 return stats->last_rx; 2898 2905 return sta->deflink.status_stats.last_ack; 2899 2899 - } 2900 2900 - 2901 2901 - static void sta_update_codel_params(struct sta_info *sta, u32 thr) 2902 2902 - { 2903 2903 - if (thr && thr < STA_SLOW_THRESHOLD * sta->local->num_sta) { 2904 2904 - sta->cparams.target = MS2TIME(50); 2905 2905 - sta->cparams.interval = MS2TIME(300); 2906 2906 - sta->cparams.ecn = false; 2907 2907 - } else { 2908 2908 - sta->cparams.target = MS2TIME(20); 2909 2909 - sta->cparams.interval = MS2TIME(100); 2910 2910 - sta->cparams.ecn = true; 2911 2911 - } 2912 2912 - } 2913 2913 - 2914 2914 - void ieee80211_sta_set_expected_throughput(struct ieee80211_sta *pubsta, 2915 2915 - u32 thr) 2916 2916 - { 2917 2917 - struct sta_info *sta = container_of(pubsta, struct sta_info, sta); 2918 2918 - 2919 2919 - sta_update_codel_params(sta, thr); 2920 2906 } 2921 2907 2922 2908 int ieee80211_sta_allocate_link(struct sta_info *sta, unsigned int link_id)

-11

net/mac80211/sta_info.h

reviewed

··· 466 466 unsigned int next; 467 467 }; 468 468 469 469 - /* 470 470 - * The bandwidth threshold below which the per-station CoDel parameters will be 471 471 - * scaled to be more lenient (to prevent starvation of slow stations). This 472 472 - * value will be scaled by the number of active stations when it is being 473 473 - * applied. 474 474 - */ 475 475 - #define STA_SLOW_THRESHOLD 6000 /* 6 Mbps */ 476 476 - 477 469 /** 478 470 * struct link_sta_info - Link STA information 479 471 * All link specific sta info are stored here for reference. This can be ··· 618 626 * @sta: station information we share with the driver 619 627 * @sta_state: duplicates information about station state (for debug) 620 628 * @rcu_head: RCU head used for freeing this station struct 621 621 - * @cparams: CoDel parameters for this station. 622 629 * @reserved_tid: reserved TID (if any, otherwise IEEE80211_TID_UNRESERVED) 623 630 * @amsdu_mesh_control: track the mesh A-MSDU format used by the peer: 624 631 * ··· 707 716 #ifdef CONFIG_MAC80211_DEBUGFS 708 717 struct dentry *debugfs_dir; 709 718 #endif 710 710 - 711 711 - struct codel_params cparams; 712 719 713 720 u8 reserved_tid; 714 721 s8 amsdu_mesh_control;

+2 -2

net/mac80211/tdls.c

reviewed

··· 382 382 if (WARN_ON_ONCE(!sband)) 383 383 return; 384 384 385 385 - ieee80211_put_srates_elem(skb, sband, 0, 0, 0, WLAN_EID_SUPP_RATES); 386 386 - ieee80211_put_srates_elem(skb, sband, 0, 0, 0, WLAN_EID_EXT_SUPP_RATES); 385 385 + ieee80211_put_srates_elem(skb, sband, 0, 0, WLAN_EID_SUPP_RATES); 386 386 + ieee80211_put_srates_elem(skb, sband, 0, 0, WLAN_EID_EXT_SUPP_RATES); 387 387 ieee80211_tdls_add_supp_channels(sdata, skb); 388 388 389 389 /* add any custom IEs that go before Extended Capabilities */

+9 -26

net/mac80211/tx.c

reviewed

··· 26 26 #include <net/codel_impl.h> 27 27 #include <linux/unaligned.h> 28 28 #include <net/fq_impl.h> 29 29 + #include <net/sock.h> 29 30 #include <net/gso.h> 30 31 31 32 #include "ieee80211_i.h" ··· 50 49 struct ieee80211_supported_band *sband; 51 50 struct ieee80211_hdr *hdr; 52 51 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 53 53 - struct ieee80211_chanctx_conf *chanctx_conf; 54 54 - u32 rate_flags = 0; 55 52 56 53 /* assume HW handles this */ 57 54 if (tx->rate.flags & (IEEE80211_TX_RC_MCS | IEEE80211_TX_RC_VHT_MCS)) 58 55 return 0; 59 59 - 60 60 - rcu_read_lock(); 61 61 - chanctx_conf = rcu_dereference(tx->sdata->vif.bss_conf.chanctx_conf); 62 62 - if (chanctx_conf) 63 63 - rate_flags = ieee80211_chandef_rate_flags(&chanctx_conf->def); 64 64 - rcu_read_unlock(); 65 56 66 57 /* uh huh? */ 67 58 if (WARN_ON_ONCE(tx->rate.idx < 0)) ··· 130 137 131 138 if (r->bitrate > txrate->bitrate) 132 139 break; 133 133 - 134 134 - if ((rate_flags & r->flags) != rate_flags) 135 135 - continue; 136 140 137 141 if (tx->sdata->vif.bss_conf.basic_rates & BIT(i)) 138 142 rate = r->bitrate; ··· 1392 1402 1393 1403 local = container_of(fq, struct ieee80211_local, fq); 1394 1404 txqi = container_of(tin, struct txq_info, tin); 1405 1405 + cparams = &local->cparams; 1395 1406 cstats = &txqi->cstats; 1396 1396 - 1397 1397 - if (txqi->txq.sta) { 1398 1398 - struct sta_info *sta = container_of(txqi->txq.sta, 1399 1399 - struct sta_info, sta); 1400 1400 - cparams = &sta->cparams; 1401 1401 - } else { 1402 1402 - cparams = &local->cparams; 1403 1403 - } 1404 1407 1405 1408 if (flow == &tin->default_flow) 1406 1409 cvars = &txqi->def_cvars; ··· 2859 2876 } 2860 2877 2861 2878 if (unlikely(!multicast && 2862 2862 - ((skb->sk && 2863 2863 - skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS) || 2879 2879 + ((skb->sk && sock_flag(skb->sk, SOCK_WIFI_STATUS)) || 2864 2880 ctrl_flags & IEEE80211_TX_CTL_REQ_TX_STATUS))) 2865 2881 info_id = ieee80211_store_ack_skb(local, skb, &info_flags, 2866 2882 cookie); ··· 3756 3774 return false; 3757 3775 3758 3776 /* don't handle TX status request here either */ 3759 3759 - if (skb->sk && skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS) 3777 3777 + if (skb->sk && sock_flag(skb->sk, SOCK_WIFI_STATUS)) 3760 3778 return false; 3761 3779 3762 3780 if (hdr->frame_control & cpu_to_le16(IEEE80211_STYPE_QOS_DATA)) { ··· 4508 4526 IEEE80211_TX_CTRL_MLO_LINK_UNSPEC, 4509 4527 NULL); 4510 4528 } else if (ieee80211_vif_is_mld(&sdata->vif) && 4511 4511 - sdata->vif.type == NL80211_IFTYPE_AP && 4512 4512 - !ieee80211_hw_check(&sdata->local->hw, MLO_MCAST_MULTI_LINK_TX)) { 4529 4529 + ((sdata->vif.type == NL80211_IFTYPE_AP && 4530 4530 + !ieee80211_hw_check(&sdata->local->hw, MLO_MCAST_MULTI_LINK_TX)) || 4531 4531 + (sdata->vif.type == NL80211_IFTYPE_AP_VLAN && 4532 4532 + !sdata->wdev.use_4addr))) { 4513 4533 ieee80211_mlo_multicast_tx(dev, skb); 4514 4534 } else { 4515 4535 normal: ··· 4648 4664 memcpy(IEEE80211_SKB_CB(seg), info, sizeof(*info)); 4649 4665 } 4650 4666 4651 4651 - if (unlikely(skb->sk && 4652 4652 - skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS)) { 4667 4667 + if (unlikely(skb->sk && sock_flag(skb->sk, SOCK_WIFI_STATUS))) { 4653 4668 info->status_data = ieee80211_store_ack_skb(local, skb, 4654 4669 &info->flags, NULL); 4655 4670 if (info->status_data)

+5 -20

net/mac80211/util.c

reviewed

··· 1204 1204 struct ieee80211_supported_band *sband; 1205 1205 int i, err; 1206 1206 size_t noffset; 1207 1207 - u32 rate_flags; 1208 1207 bool have_80mhz = false; 1209 1208 1210 1209 *offset = 0; ··· 1212 1213 if (WARN_ON_ONCE(!sband)) 1213 1214 return 0; 1214 1215 1215 1215 - rate_flags = ieee80211_chandef_rate_flags(chandef); 1216 1216 - 1217 1216 /* For direct scan add S1G IE and consider its override bits */ 1218 1217 if (band == NL80211_BAND_S1GHZ) 1219 1218 return ieee80211_put_s1g_cap(skb, &sband->s1g_cap); 1220 1219 1221 1221 - err = ieee80211_put_srates_elem(skb, sband, 0, rate_flags, 1220 1220 + err = ieee80211_put_srates_elem(skb, sband, 0, 1222 1221 ~rate_mask, WLAN_EID_SUPP_RATES); 1223 1222 if (err) 1224 1223 return err; ··· 1238 1241 *offset = noffset; 1239 1242 } 1240 1243 1241 1241 - err = ieee80211_put_srates_elem(skb, sband, 0, rate_flags, 1244 1244 + err = ieee80211_put_srates_elem(skb, sband, 0, 1242 1245 ~rate_mask, WLAN_EID_EXT_SUPP_RATES); 1243 1246 if (err) 1244 1247 return err; ··· 1519 1522 { 1520 1523 struct ieee80211_supported_band *sband; 1521 1524 size_t num_rates; 1522 1522 - u32 supp_rates, rate_flags; 1525 1525 + u32 supp_rates; 1523 1526 int i, j; 1524 1527 1525 1528 sband = sdata->local->hw.wiphy->bands[band]; 1526 1529 if (WARN_ON(!sband)) 1527 1530 return 1; 1528 1528 - 1529 1529 - rate_flags = 1530 1530 - ieee80211_chandef_rate_flags(&sdata->vif.bss_conf.chanreq.oper); 1531 1531 1532 1532 num_rates = sband->n_bitrates; 1533 1533 supp_rates = 0; ··· 1545 1551 continue; 1546 1552 1547 1553 for (j = 0; j < num_rates; j++) { 1548 1548 - int brate; 1549 1549 - if ((rate_flags & sband->bitrates[j].flags) 1550 1550 - != rate_flags) 1551 1551 - continue; 1552 1552 - 1553 1553 - brate = sband->bitrates[j].bitrate; 1554 1554 + int brate = sband->bitrates[j].bitrate; 1554 1555 1555 1556 if (brate == own_rate) { 1556 1557 supp_rates |= BIT(j); ··· 3212 3223 3213 3224 int ieee80211_put_srates_elem(struct sk_buff *skb, 3214 3225 const struct ieee80211_supported_band *sband, 3215 3215 - u32 basic_rates, u32 rate_flags, u32 masked_rates, 3226 3226 + u32 basic_rates, u32 masked_rates, 3216 3227 u8 element_id) 3217 3228 { 3218 3229 u8 i, rates, skip; 3219 3230 3220 3231 rates = 0; 3221 3232 for (i = 0; i < sband->n_bitrates; i++) { 3222 3222 - if ((rate_flags & sband->bitrates[i].flags) != rate_flags) 3223 3223 - continue; 3224 3233 if (masked_rates & BIT(i)) 3225 3234 continue; 3226 3235 rates++; ··· 3244 3257 int rate; 3245 3258 u8 basic; 3246 3259 3247 3247 - if ((rate_flags & sband->bitrates[i].flags) != rate_flags) 3248 3248 - continue; 3249 3260 if (masked_rates & BIT(i)) 3250 3261 continue; 3251 3262

+41 -1

net/wireless/nl80211.c

reviewed

··· 469 469 [NL80211_MBSSID_CONFIG_ATTR_INDEX] = { .type = NLA_U8 }, 470 470 [NL80211_MBSSID_CONFIG_ATTR_TX_IFINDEX] = { .type = NLA_U32 }, 471 471 [NL80211_MBSSID_CONFIG_ATTR_EMA] = { .type = NLA_FLAG }, 472 472 + [NL80211_MBSSID_CONFIG_ATTR_TX_LINK_ID] = 473 473 + NLA_POLICY_MAX(NLA_U8, IEEE80211_MLD_MAX_NUM_LINKS), 472 474 }; 473 475 474 476 static const struct nla_policy ··· 835 833 [NL80211_ATTR_MLD_ADDR] = NLA_POLICY_EXACT_LEN(ETH_ALEN), 836 834 [NL80211_ATTR_MLO_SUPPORT] = { .type = NLA_FLAG }, 837 835 [NL80211_ATTR_MAX_NUM_AKM_SUITES] = { .type = NLA_REJECT }, 836 836 + [NL80211_ATTR_EML_CAPABILITY] = { .type = NLA_U16 }, 838 837 [NL80211_ATTR_PUNCT_BITMAP] = 839 838 NLA_POLICY_FULL_RANGE(NLA_U32, &nl80211_punct_bitmap_range), 840 839 ··· 5526 5523 5527 5524 static int nl80211_parse_mbssid_config(struct wiphy *wiphy, 5528 5525 struct net_device *dev, 5526 5526 + unsigned int link_id, 5529 5527 struct nlattr *attrs, 5530 5528 struct cfg80211_mbssid_config *config, 5531 5529 u8 num_elems) 5532 5530 { 5533 5531 struct nlattr *tb[NL80211_MBSSID_CONFIG_ATTR_MAX + 1]; 5532 5532 + int tx_link_id = -1; 5534 5533 5535 5534 if (!wiphy->mbssid_max_interfaces) 5536 5535 return -EOPNOTSUPP; ··· 5556 5551 (!config->index && !num_elems)) 5557 5552 return -EINVAL; 5558 5553 5554 5554 + if (tb[NL80211_MBSSID_CONFIG_ATTR_TX_LINK_ID]) 5555 5555 + tx_link_id = nla_get_u8(tb[NL80211_MBSSID_CONFIG_ATTR_TX_LINK_ID]); 5556 5556 + 5559 5557 if (tb[NL80211_MBSSID_CONFIG_ATTR_TX_IFINDEX]) { 5560 5558 u32 tx_ifindex = 5561 5559 nla_get_u32(tb[NL80211_MBSSID_CONFIG_ATTR_TX_IFINDEX]); ··· 5580 5572 } 5581 5573 5582 5574 config->tx_wdev = tx_netdev->ieee80211_ptr; 5575 5575 + /* Caller should call dev_put(config->tx_wdev) from this point */ 5576 5576 + 5577 5577 + if (config->tx_wdev->valid_links) { 5578 5578 + if (tx_link_id == -1 || 5579 5579 + !(config->tx_wdev->valid_links & BIT(tx_link_id))) 5580 5580 + return -ENOLINK; 5581 5581 + 5582 5582 + config->tx_link_id = tx_link_id; 5583 5583 + } 5583 5584 } else { 5585 5585 + if (tx_link_id >= 0 && tx_link_id != link_id) 5586 5586 + return -EINVAL; 5587 5587 + 5584 5588 config->tx_wdev = dev->ieee80211_ptr; 5585 5589 } 5586 5590 } else if (!config->index) { 5591 5591 + if (tx_link_id >= 0 && tx_link_id != link_id) 5592 5592 + return -EINVAL; 5593 5593 + 5587 5594 config->tx_wdev = dev->ieee80211_ptr; 5588 5595 } else { 5589 5596 return -EINVAL; ··· 6348 6325 } 6349 6326 6350 6327 if (info->attrs[NL80211_ATTR_MBSSID_CONFIG]) { 6351 6351 - err = nl80211_parse_mbssid_config(&rdev->wiphy, dev, 6328 6328 + err = nl80211_parse_mbssid_config(&rdev->wiphy, dev, link_id, 6352 6329 info->attrs[NL80211_ATTR_MBSSID_CONFIG], 6353 6330 &params->mbssid_config, 6354 6331 params->beacon.mbssid_ies ? ··· 7141 7118 return -EINVAL; 7142 7119 } 7143 7120 7121 7121 + /* Accept EMLSR capabilities only for AP client before association */ 7122 7122 + if (statype != CFG80211_STA_AP_CLIENT_UNASSOC && 7123 7123 + params->eml_cap_present) 7124 7124 + return -EINVAL; 7125 7125 + 7144 7126 switch (statype) { 7145 7127 case CFG80211_STA_AP_MLME_CLIENT: 7146 7128 /* Use this only for authorizing/unauthorizing a station */ ··· 7501 7473 params.link_sta_params.he_6ghz_capa = 7502 7474 nla_data(info->attrs[NL80211_ATTR_HE_6GHZ_CAPABILITY]); 7503 7475 7476 7476 + if (info->attrs[NL80211_ATTR_EML_CAPABILITY]) { 7477 7477 + params.eml_cap_present = true; 7478 7478 + params.eml_cap = 7479 7479 + nla_get_u16(info->attrs[NL80211_ATTR_EML_CAPABILITY]); 7480 7480 + } 7481 7481 + 7504 7482 if (info->attrs[NL80211_ATTR_AIRTIME_WEIGHT]) 7505 7483 params.airtime_weight = 7506 7484 nla_get_u16(info->attrs[NL80211_ATTR_AIRTIME_WEIGHT]); ··· 7663 7629 false)) 7664 7630 return -EINVAL; 7665 7631 } 7632 7632 + } 7633 7633 + 7634 7634 + if (info->attrs[NL80211_ATTR_EML_CAPABILITY]) { 7635 7635 + params.eml_cap_present = true; 7636 7636 + params.eml_cap = 7637 7637 + nla_get_u16(info->attrs[NL80211_ATTR_EML_CAPABILITY]); 7666 7638 } 7667 7639 7668 7640 if (info->attrs[NL80211_ATTR_HE_6GHZ_CAPABILITY])