tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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pinctrl: starfive: use dynamic GPIO base allocation

The JH7110 pinctrl driver currently sets a static GPIO base number from
platform data:

sfp->gc.base = info->gc_base;

Static base assignment is deprecated and results in the following warning:

gpio gpiochip0: Static allocation of GPIO base is deprecated,
use dynamic allocation.

Set `sfp->gc.base = -1` to let the GPIO core dynamically allocate
the base number. This removes the warning and aligns the driver
with current GPIO guidelines.

Since the GPIO base is now allocated dynamically, remove `gc_base` field in
`struct jh7110_pinctrl_soc_info` and the associated `JH7110_SYS_GC_BASE`
and `JH7110_AON_GC_BASE` constants as they are no longer used anywhere
in the driver.

Tested on VisionFive 2 (JH7110 SoC).

Signed-off-by: Ali Tariq <alitariq45892@gmail.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>

authored by

Ali Tariq and committed by
Linus Walleij 9dc96679 61d1bb53

+1 -6
-2
drivers/pinctrl/starfive/pinctrl-starfive-jh7110-aon.c
··· 29 29 #include "pinctrl-starfive-jh7110.h" 30 30 31 31 #define JH7110_AON_NGPIO 4 32 - #define JH7110_AON_GC_BASE 64 33 32 34 33 #define JH7110_AON_REGS_NUM 37 35 34 ··· 137 138 .pins = jh7110_aon_pins, 138 139 .npins = ARRAY_SIZE(jh7110_aon_pins), 139 140 .ngpios = JH7110_AON_NGPIO, 140 - .gc_base = JH7110_AON_GC_BASE, 141 141 .dout_reg_base = JH7110_AON_DOUT, 142 142 .dout_mask = GENMASK(3, 0), 143 143 .doen_reg_base = JH7110_AON_DOEN,
-2
drivers/pinctrl/starfive/pinctrl-starfive-jh7110-sys.c
··· 29 29 #include "pinctrl-starfive-jh7110.h" 30 30 31 31 #define JH7110_SYS_NGPIO 64 32 - #define JH7110_SYS_GC_BASE 0 33 32 34 33 #define JH7110_SYS_REGS_NUM 174 35 34 ··· 409 410 .pins = jh7110_sys_pins, 410 411 .npins = ARRAY_SIZE(jh7110_sys_pins), 411 412 .ngpios = JH7110_SYS_NGPIO, 412 - .gc_base = JH7110_SYS_GC_BASE, 413 413 .dout_reg_base = JH7110_SYS_DOUT, 414 414 .dout_mask = GENMASK(6, 0), 415 415 .doen_reg_base = JH7110_SYS_DOEN,
+1 -1
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
··· 938 938 sfp->gc.set = jh7110_gpio_set; 939 939 sfp->gc.set_config = jh7110_gpio_set_config; 940 940 sfp->gc.add_pin_ranges = jh7110_gpio_add_pin_ranges; 941 - sfp->gc.base = info->gc_base; 941 + sfp->gc.base = -1; 942 942 sfp->gc.ngpio = info->ngpios; 943 943 944 944 jh7110_irq_chip.name = sfp->gc.label;
-1
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.h
··· 38 38 const struct pinctrl_pin_desc *pins; 39 39 unsigned int npins; 40 40 unsigned int ngpios; 41 - unsigned int gc_base; 42 41 43 42 /* gpio dout/doen/din/gpioinput register */ 44 43 unsigned int dout_reg_base;