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drm/amdgpu: Add amdgpu_discovery_info

Add amdgpu_discovery_info structure to keep all discovery related
information.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Lijo Lazar and committed by
Alex Deucher
9e2096ba aa6674f2

+129 -97
+4 -6
drivers/gpu/drm/amd/amdgpu/amdgpu.h
··· 839 839 const struct amd_pm_funcs *pp_funcs; 840 840 }; 841 841 842 - struct ip_discovery_top; 843 - 844 842 /* polaris10 kickers */ 845 843 #define ASICID_IS_P20(did, rid) (((did == 0x67DF) && \ 846 844 ((rid == 0xE3) || \ ··· 970 972 struct notifier_block acpi_nb; 971 973 struct notifier_block pm_nb; 972 974 struct amdgpu_i2c_chan *i2c_bus[AMDGPU_MAX_I2C_BUS]; 973 - struct debugfs_blob_wrapper debugfs_vbios_blob; 974 - struct debugfs_blob_wrapper debugfs_discovery_blob; 975 + struct debugfs_blob_wrapper debugfs_vbios_blob; 975 976 struct mutex srbm_mutex; 976 977 /* GRBM index mutex. Protects concurrent access to GRBM index */ 977 978 struct mutex grbm_idx_mutex; ··· 1059 1062 s64 accum_us_vis; /* for visible VRAM */ 1060 1063 u32 log2_max_MBps; 1061 1064 } mm_stats; 1065 + 1066 + /* discovery*/ 1067 + struct amdgpu_discovery_info discovery; 1062 1068 1063 1069 /* display */ 1064 1070 bool enable_virtual_display; ··· 1264 1264 bool ram_is_direct_mapped; 1265 1265 1266 1266 struct list_head ras_list; 1267 - 1268 - struct ip_discovery_top *ip_top; 1269 1267 1270 1268 struct amdgpu_reset_domain *reset_domain; 1271 1269
+3 -4
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
··· 2123 2123 debugfs_create_blob("amdgpu_vbios", 0444, root, 2124 2124 &adev->debugfs_vbios_blob); 2125 2125 2126 - adev->debugfs_discovery_blob.data = adev->mman.discovery_bin; 2127 - adev->debugfs_discovery_blob.size = adev->mman.discovery_tmr_size; 2128 - debugfs_create_blob("amdgpu_discovery", 0444, root, 2129 - &adev->debugfs_discovery_blob); 2126 + if (adev->discovery.debugfs_blob.size) 2127 + debugfs_create_blob("amdgpu_discovery", 0444, root, 2128 + &adev->discovery.debugfs_blob); 2130 2129 2131 2130 return 0; 2132 2131 }
+2 -2
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
··· 2633 2633 chip_name = "arcturus"; 2634 2634 break; 2635 2635 case CHIP_NAVI12: 2636 - if (adev->mman.discovery_bin) 2636 + if (adev->discovery.bin) 2637 2637 return 0; 2638 2638 chip_name = "navi12"; 2639 2639 break; ··· 5059 5059 5060 5060 if (IS_ENABLED(CONFIG_PERF_EVENTS)) 5061 5061 amdgpu_pmu_fini(adev); 5062 - if (adev->mman.discovery_bin) 5062 + if (adev->discovery.bin) 5063 5063 amdgpu_discovery_fini(adev); 5064 5064 5065 5065 amdgpu_reset_put_reset_domain(adev->reset_domain);
+108 -84
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
··· 254 254 pos = tmr_offset + tmr_size - DISCOVERY_TMR_OFFSET; 255 255 256 256 /* This region is read-only and reserved from system use */ 257 - discv_regn = memremap(pos, adev->mman.discovery_tmr_size, MEMREMAP_WC); 257 + discv_regn = memremap(pos, adev->discovery.size, MEMREMAP_WC); 258 258 if (discv_regn) { 259 - memcpy(binary, discv_regn, adev->mman.discovery_tmr_size); 259 + memcpy(binary, discv_regn, adev->discovery.size); 260 260 memunmap(discv_regn); 261 261 return 0; 262 262 } ··· 301 301 if (sz_valid) { 302 302 uint64_t pos = vram_size - DISCOVERY_TMR_OFFSET; 303 303 amdgpu_device_vram_access(adev, pos, (uint32_t *)binary, 304 - adev->mman.discovery_tmr_size, false); 304 + adev->discovery.size, false); 305 305 } else { 306 306 ret = amdgpu_discovery_read_binary_from_sysmem(adev, binary); 307 307 } ··· 389 389 static int amdgpu_discovery_verify_npsinfo(struct amdgpu_device *adev, 390 390 struct binary_header *bhdr) 391 391 { 392 + uint8_t *discovery_bin = adev->discovery.bin; 392 393 struct table_info *info; 393 394 uint16_t checksum; 394 395 uint16_t offset; ··· 399 398 checksum = le16_to_cpu(info->checksum); 400 399 401 400 struct nps_info_header *nhdr = 402 - (struct nps_info_header *)(adev->mman.discovery_bin + offset); 401 + (struct nps_info_header *)(discovery_bin + offset); 403 402 404 403 if (le32_to_cpu(nhdr->table_id) != NPS_INFO_TABLE_ID) { 405 404 dev_dbg(adev->dev, "invalid ip discovery nps info table id\n"); 406 405 return -EINVAL; 407 406 } 408 407 409 - if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, 408 + if (!amdgpu_discovery_verify_checksum(discovery_bin + offset, 410 409 le32_to_cpu(nhdr->size_bytes), 411 410 checksum)) { 412 411 dev_dbg(adev->dev, "invalid nps info data table checksum\n"); ··· 448 447 { 449 448 struct table_info *info; 450 449 struct binary_header *bhdr; 450 + uint8_t *discovery_bin; 451 451 const char *fw_name; 452 452 uint16_t offset; 453 453 uint16_t size; 454 454 uint16_t checksum; 455 455 int r; 456 456 457 - adev->mman.discovery_tmr_size = DISCOVERY_TMR_SIZE; 458 - adev->mman.discovery_bin = kzalloc(adev->mman.discovery_tmr_size, GFP_KERNEL); 459 - if (!adev->mman.discovery_bin) 457 + adev->discovery.bin = kzalloc(DISCOVERY_TMR_SIZE, GFP_KERNEL); 458 + if (!adev->discovery.bin) 460 459 return -ENOMEM; 460 + adev->discovery.size = DISCOVERY_TMR_SIZE; 461 + adev->discovery.debugfs_blob.data = adev->discovery.bin; 462 + adev->discovery.debugfs_blob.size = adev->discovery.size; 461 463 464 + discovery_bin = adev->discovery.bin; 462 465 /* Read from file if it is the preferred option */ 463 466 fw_name = amdgpu_discovery_get_fw_name(adev); 464 467 if (fw_name != NULL) { 465 468 drm_dbg(&adev->ddev, "use ip discovery information from file"); 466 - r = amdgpu_discovery_read_binary_from_file(adev, adev->mman.discovery_bin, fw_name); 469 + r = amdgpu_discovery_read_binary_from_file(adev, discovery_bin, 470 + fw_name); 467 471 if (r) 468 472 goto out; 469 473 } else { 470 474 drm_dbg(&adev->ddev, "use ip discovery information from memory"); 471 - r = amdgpu_discovery_read_binary_from_mem( 472 - adev, adev->mman.discovery_bin); 475 + r = amdgpu_discovery_read_binary_from_mem(adev, discovery_bin); 473 476 if (r) 474 477 goto out; 475 478 } 476 479 477 480 /* check the ip discovery binary signature */ 478 - if (!amdgpu_discovery_verify_binary_signature(adev->mman.discovery_bin)) { 481 + if (!amdgpu_discovery_verify_binary_signature(discovery_bin)) { 479 482 dev_err(adev->dev, 480 483 "get invalid ip discovery binary signature\n"); 481 484 r = -EINVAL; 482 485 goto out; 483 486 } 484 487 485 - bhdr = (struct binary_header *)adev->mman.discovery_bin; 488 + bhdr = (struct binary_header *)discovery_bin; 486 489 487 490 offset = offsetof(struct binary_header, binary_checksum) + 488 491 sizeof(bhdr->binary_checksum); 489 492 size = le16_to_cpu(bhdr->binary_size) - offset; 490 493 checksum = le16_to_cpu(bhdr->binary_checksum); 491 494 492 - if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, 493 - size, checksum)) { 495 + if (!amdgpu_discovery_verify_checksum(discovery_bin + offset, size, 496 + checksum)) { 494 497 dev_err(adev->dev, "invalid ip discovery binary checksum\n"); 495 498 r = -EINVAL; 496 499 goto out; ··· 506 501 507 502 if (offset) { 508 503 struct ip_discovery_header *ihdr = 509 - (struct ip_discovery_header *)(adev->mman.discovery_bin + offset); 504 + (struct ip_discovery_header *)(discovery_bin + offset); 510 505 if (le32_to_cpu(ihdr->signature) != DISCOVERY_TABLE_SIGNATURE) { 511 506 dev_err(adev->dev, "invalid ip discovery data table signature\n"); 512 507 r = -EINVAL; 513 508 goto out; 514 509 } 515 510 516 - if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, 517 - le16_to_cpu(ihdr->size), checksum)) { 511 + if (!amdgpu_discovery_verify_checksum(discovery_bin + offset, 512 + le16_to_cpu(ihdr->size), 513 + checksum)) { 518 514 dev_err(adev->dev, "invalid ip discovery data table checksum\n"); 519 515 r = -EINVAL; 520 516 goto out; ··· 528 522 529 523 if (offset) { 530 524 struct gpu_info_header *ghdr = 531 - (struct gpu_info_header *)(adev->mman.discovery_bin + offset); 525 + (struct gpu_info_header *)(discovery_bin + offset); 532 526 533 527 if (le32_to_cpu(ghdr->table_id) != GC_TABLE_ID) { 534 528 dev_err(adev->dev, "invalid ip discovery gc table id\n"); ··· 536 530 goto out; 537 531 } 538 532 539 - if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, 540 - le32_to_cpu(ghdr->size), checksum)) { 533 + if (!amdgpu_discovery_verify_checksum(discovery_bin + offset, 534 + le32_to_cpu(ghdr->size), 535 + checksum)) { 541 536 dev_err(adev->dev, "invalid gc data table checksum\n"); 542 537 r = -EINVAL; 543 538 goto out; ··· 551 544 552 545 if (offset) { 553 546 struct harvest_info_header *hhdr = 554 - (struct harvest_info_header *)(adev->mman.discovery_bin + offset); 547 + (struct harvest_info_header *)(discovery_bin + offset); 555 548 556 549 if (le32_to_cpu(hhdr->signature) != HARVEST_TABLE_SIGNATURE) { 557 550 dev_err(adev->dev, "invalid ip discovery harvest table signature\n"); ··· 559 552 goto out; 560 553 } 561 554 562 - if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, 563 - sizeof(struct harvest_table), checksum)) { 555 + if (!amdgpu_discovery_verify_checksum( 556 + discovery_bin + offset, 557 + sizeof(struct harvest_table), checksum)) { 564 558 dev_err(adev->dev, "invalid harvest data table checksum\n"); 565 559 r = -EINVAL; 566 560 goto out; ··· 574 566 575 567 if (offset) { 576 568 struct vcn_info_header *vhdr = 577 - (struct vcn_info_header *)(adev->mman.discovery_bin + offset); 569 + (struct vcn_info_header *)(discovery_bin + offset); 578 570 579 571 if (le32_to_cpu(vhdr->table_id) != VCN_INFO_TABLE_ID) { 580 572 dev_err(adev->dev, "invalid ip discovery vcn table id\n"); ··· 582 574 goto out; 583 575 } 584 576 585 - if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, 586 - le32_to_cpu(vhdr->size_bytes), checksum)) { 577 + if (!amdgpu_discovery_verify_checksum( 578 + discovery_bin + offset, 579 + le32_to_cpu(vhdr->size_bytes), checksum)) { 587 580 dev_err(adev->dev, "invalid vcn data table checksum\n"); 588 581 r = -EINVAL; 589 582 goto out; ··· 597 588 598 589 if (0 && offset) { 599 590 struct mall_info_header *mhdr = 600 - (struct mall_info_header *)(adev->mman.discovery_bin + offset); 591 + (struct mall_info_header *)(discovery_bin + offset); 601 592 602 593 if (le32_to_cpu(mhdr->table_id) != MALL_INFO_TABLE_ID) { 603 594 dev_err(adev->dev, "invalid ip discovery mall table id\n"); ··· 605 596 goto out; 606 597 } 607 598 608 - if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, 609 - le32_to_cpu(mhdr->size_bytes), checksum)) { 599 + if (!amdgpu_discovery_verify_checksum( 600 + discovery_bin + offset, 601 + le32_to_cpu(mhdr->size_bytes), checksum)) { 610 602 dev_err(adev->dev, "invalid mall data table checksum\n"); 611 603 r = -EINVAL; 612 604 goto out; ··· 617 607 return 0; 618 608 619 609 out: 620 - kfree(adev->mman.discovery_bin); 621 - adev->mman.discovery_bin = NULL; 610 + kfree(adev->discovery.bin); 611 + adev->discovery.bin = NULL; 622 612 if ((amdgpu_discovery != 2) && 623 613 (RREG32(mmIP_DISCOVERY_VERSION) == 4)) 624 614 amdgpu_ras_query_boot_status(adev, 4); ··· 630 620 void amdgpu_discovery_fini(struct amdgpu_device *adev) 631 621 { 632 622 amdgpu_discovery_sysfs_fini(adev); 633 - kfree(adev->mman.discovery_bin); 634 - adev->mman.discovery_bin = NULL; 623 + kfree(adev->discovery.bin); 624 + adev->discovery.bin = NULL; 635 625 } 636 626 637 627 static int amdgpu_discovery_validate_ip(struct amdgpu_device *adev, ··· 656 646 static void amdgpu_discovery_read_harvest_bit_per_ip(struct amdgpu_device *adev, 657 647 uint32_t *vcn_harvest_count) 658 648 { 649 + uint8_t *discovery_bin = adev->discovery.bin; 659 650 struct binary_header *bhdr; 660 651 struct ip_discovery_header *ihdr; 661 652 struct die_header *dhdr; ··· 666 655 uint8_t inst; 667 656 int i, j; 668 657 669 - bhdr = (struct binary_header *)adev->mman.discovery_bin; 670 - ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + 671 - le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset)); 658 + bhdr = (struct binary_header *)discovery_bin; 659 + ihdr = (struct ip_discovery_header 660 + *)(discovery_bin + 661 + le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset)); 672 662 num_dies = le16_to_cpu(ihdr->num_dies); 673 663 674 664 /* scan harvest bit of all IP data structures */ 675 665 for (i = 0; i < num_dies; i++) { 676 666 die_offset = le16_to_cpu(ihdr->die_info[i].die_offset); 677 - dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset); 667 + dhdr = (struct die_header *)(discovery_bin + die_offset); 678 668 num_ips = le16_to_cpu(dhdr->num_ips); 679 669 ip_offset = die_offset + sizeof(*dhdr); 680 670 681 671 for (j = 0; j < num_ips; j++) { 682 - ip = (struct ip *)(adev->mman.discovery_bin + 683 - ip_offset); 672 + ip = (struct ip *)(discovery_bin + ip_offset); 684 673 inst = ip->number_instance; 685 674 hw_id = le16_to_cpu(ip->hw_id); 686 675 if (amdgpu_discovery_validate_ip(adev, inst, hw_id)) ··· 722 711 uint32_t *vcn_harvest_count, 723 712 uint32_t *umc_harvest_count) 724 713 { 714 + uint8_t *discovery_bin = adev->discovery.bin; 725 715 struct binary_header *bhdr; 726 716 struct harvest_table *harvest_info; 727 717 u16 offset; 728 718 int i; 729 719 uint32_t umc_harvest_config = 0; 730 720 731 - bhdr = (struct binary_header *)adev->mman.discovery_bin; 721 + bhdr = (struct binary_header *)discovery_bin; 732 722 offset = le16_to_cpu(bhdr->table_list[HARVEST_INFO].offset); 733 723 734 724 if (!offset) { ··· 737 725 return; 738 726 } 739 727 740 - harvest_info = (struct harvest_table *)(adev->mman.discovery_bin + offset); 728 + harvest_info = (struct harvest_table *)(discovery_bin + offset); 741 729 742 730 for (i = 0; i < 32; i++) { 743 731 if (le16_to_cpu(harvest_info->list[i].hw_id) == 0) ··· 1033 1021 kobj); 1034 1022 struct amdgpu_device *adev = ip_top->adev; 1035 1023 1036 - adev->ip_top = NULL; 1037 1024 kfree(ip_top); 1025 + adev->discovery.ip_top = NULL; 1038 1026 } 1039 1027 1040 1028 static uint8_t amdgpu_discovery_get_harvest_info(struct amdgpu_device *adev, ··· 1074 1062 const size_t _ip_offset, const int num_ips, 1075 1063 bool reg_base_64) 1076 1064 { 1065 + uint8_t *discovery_bin = adev->discovery.bin; 1077 1066 int ii, jj, kk, res; 1078 1067 uint16_t hw_id; 1079 1068 uint8_t inst; ··· 1092 1079 struct ip_v4 *ip; 1093 1080 struct ip_hw_instance *ip_hw_instance; 1094 1081 1095 - ip = (struct ip_v4 *)(adev->mman.discovery_bin + ip_offset); 1082 + ip = (struct ip_v4 *)(discovery_bin + ip_offset); 1096 1083 inst = ip->instance_number; 1097 1084 hw_id = le16_to_cpu(ip->hw_id); 1098 1085 if (amdgpu_discovery_validate_ip(adev, inst, hw_id) || ··· 1179 1166 1180 1167 static int amdgpu_discovery_sysfs_recurse(struct amdgpu_device *adev) 1181 1168 { 1169 + struct ip_discovery_top *ip_top = adev->discovery.ip_top; 1170 + uint8_t *discovery_bin = adev->discovery.bin; 1182 1171 struct binary_header *bhdr; 1183 1172 struct ip_discovery_header *ihdr; 1184 1173 struct die_header *dhdr; 1185 - struct kset *die_kset = &adev->ip_top->die_kset; 1174 + struct kset *die_kset = &ip_top->die_kset; 1186 1175 u16 num_dies, die_offset, num_ips; 1187 1176 size_t ip_offset; 1188 1177 int ii, res; 1189 1178 1190 - bhdr = (struct binary_header *)adev->mman.discovery_bin; 1191 - ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + 1192 - le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset)); 1179 + bhdr = (struct binary_header *)discovery_bin; 1180 + ihdr = (struct ip_discovery_header 1181 + *)(discovery_bin + 1182 + le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset)); 1193 1183 num_dies = le16_to_cpu(ihdr->num_dies); 1194 1184 1195 1185 DRM_DEBUG("number of dies: %d\n", num_dies); ··· 1201 1185 struct ip_die_entry *ip_die_entry; 1202 1186 1203 1187 die_offset = le16_to_cpu(ihdr->die_info[ii].die_offset); 1204 - dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset); 1188 + dhdr = (struct die_header *)(discovery_bin + die_offset); 1205 1189 num_ips = le16_to_cpu(dhdr->num_ips); 1206 1190 ip_offset = die_offset + sizeof(*dhdr); 1207 1191 ··· 1235 1219 1236 1220 static int amdgpu_discovery_sysfs_init(struct amdgpu_device *adev) 1237 1221 { 1222 + uint8_t *discovery_bin = adev->discovery.bin; 1223 + struct ip_discovery_top *ip_top; 1238 1224 struct kset *die_kset; 1239 1225 int res, ii; 1240 1226 1241 - if (!adev->mman.discovery_bin) 1227 + if (!discovery_bin) 1242 1228 return -EINVAL; 1243 1229 1244 - adev->ip_top = kzalloc(sizeof(*adev->ip_top), GFP_KERNEL); 1245 - if (!adev->ip_top) 1230 + ip_top = kzalloc(sizeof(*ip_top), GFP_KERNEL); 1231 + if (!ip_top) 1246 1232 return -ENOMEM; 1247 1233 1248 - adev->ip_top->adev = adev; 1249 - 1250 - res = kobject_init_and_add(&adev->ip_top->kobj, &ip_discovery_ktype, 1234 + ip_top->adev = adev; 1235 + adev->discovery.ip_top = ip_top; 1236 + res = kobject_init_and_add(&ip_top->kobj, &ip_discovery_ktype, 1251 1237 &adev->dev->kobj, "ip_discovery"); 1252 1238 if (res) { 1253 1239 DRM_ERROR("Couldn't init and add ip_discovery/"); 1254 1240 goto Err; 1255 1241 } 1256 1242 1257 - die_kset = &adev->ip_top->die_kset; 1243 + die_kset = &ip_top->die_kset; 1258 1244 kobject_set_name(&die_kset->kobj, "%s", "die"); 1259 - die_kset->kobj.parent = &adev->ip_top->kobj; 1245 + die_kset->kobj.parent = &ip_top->kobj; 1260 1246 die_kset->kobj.ktype = &die_kobj_ktype; 1261 - res = kset_register(&adev->ip_top->die_kset); 1247 + res = kset_register(&ip_top->die_kset); 1262 1248 if (res) { 1263 1249 DRM_ERROR("Couldn't register die_kset"); 1264 1250 goto Err; ··· 1274 1256 1275 1257 return res; 1276 1258 Err: 1277 - kobject_put(&adev->ip_top->kobj); 1259 + kobject_put(&ip_top->kobj); 1278 1260 return res; 1279 1261 } 1280 1262 ··· 1319 1301 1320 1302 static void amdgpu_discovery_sysfs_fini(struct amdgpu_device *adev) 1321 1303 { 1304 + struct ip_discovery_top *ip_top = adev->discovery.ip_top; 1322 1305 struct list_head *el, *tmp; 1323 1306 struct kset *die_kset; 1324 1307 1325 - die_kset = &adev->ip_top->die_kset; 1308 + die_kset = &ip_top->die_kset; 1326 1309 spin_lock(&die_kset->list_lock); 1327 1310 list_for_each_prev_safe(el, tmp, &die_kset->list) { 1328 1311 list_del_init(el); ··· 1332 1313 spin_lock(&die_kset->list_lock); 1333 1314 } 1334 1315 spin_unlock(&die_kset->list_lock); 1335 - kobject_put(&adev->ip_top->die_kset.kobj); 1336 - kobject_put(&adev->ip_top->kobj); 1316 + kobject_put(&ip_top->die_kset.kobj); 1317 + kobject_put(&ip_top->kobj); 1337 1318 } 1338 1319 1339 1320 /* ================================================== */ ··· 1344 1325 struct binary_header *bhdr; 1345 1326 struct ip_discovery_header *ihdr; 1346 1327 struct die_header *dhdr; 1328 + uint8_t *discovery_bin; 1347 1329 struct ip_v4 *ip; 1348 1330 uint16_t die_offset; 1349 1331 uint16_t ip_offset; ··· 1360 1340 r = amdgpu_discovery_init(adev); 1361 1341 if (r) 1362 1342 return r; 1363 - 1343 + discovery_bin = adev->discovery.bin; 1364 1344 wafl_ver = 0; 1365 1345 adev->gfx.xcc_mask = 0; 1366 1346 adev->sdma.sdma_mask = 0; 1367 1347 adev->vcn.inst_mask = 0; 1368 1348 adev->jpeg.inst_mask = 0; 1369 - bhdr = (struct binary_header *)adev->mman.discovery_bin; 1370 - ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + 1371 - le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset)); 1349 + bhdr = (struct binary_header *)discovery_bin; 1350 + ihdr = (struct ip_discovery_header 1351 + *)(discovery_bin + 1352 + le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset)); 1372 1353 num_dies = le16_to_cpu(ihdr->num_dies); 1373 1354 1374 1355 DRM_DEBUG("number of dies: %d\n", num_dies); 1375 1356 1376 1357 for (i = 0; i < num_dies; i++) { 1377 1358 die_offset = le16_to_cpu(ihdr->die_info[i].die_offset); 1378 - dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset); 1359 + dhdr = (struct die_header *)(discovery_bin + die_offset); 1379 1360 num_ips = le16_to_cpu(dhdr->num_ips); 1380 1361 ip_offset = die_offset + sizeof(*dhdr); 1381 1362 ··· 1390 1369 le16_to_cpu(dhdr->die_id), num_ips); 1391 1370 1392 1371 for (j = 0; j < num_ips; j++) { 1393 - ip = (struct ip_v4 *)(adev->mman.discovery_bin + ip_offset); 1372 + ip = (struct ip_v4 *)(discovery_bin + ip_offset); 1394 1373 1395 1374 inst = ip->instance_number; 1396 1375 hw_id = le16_to_cpu(ip->hw_id); ··· 1540 1519 1541 1520 static void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev) 1542 1521 { 1522 + uint8_t *discovery_bin = adev->discovery.bin; 1543 1523 struct ip_discovery_header *ihdr; 1544 1524 struct binary_header *bhdr; 1545 1525 int vcn_harvest_count = 0; 1546 1526 int umc_harvest_count = 0; 1547 1527 uint16_t offset, ihdr_ver; 1548 1528 1549 - bhdr = (struct binary_header *)adev->mman.discovery_bin; 1529 + bhdr = (struct binary_header *)discovery_bin; 1550 1530 offset = le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset); 1551 - ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + 1552 - offset); 1531 + ihdr = (struct ip_discovery_header *)(discovery_bin + offset); 1553 1532 ihdr_ver = le16_to_cpu(ihdr->version); 1554 1533 /* 1555 1534 * Harvest table does not fit Navi1x and legacy GPUs, ··· 1596 1575 1597 1576 static int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev) 1598 1577 { 1578 + uint8_t *discovery_bin = adev->discovery.bin; 1599 1579 struct binary_header *bhdr; 1600 1580 union gc_info *gc_info; 1601 1581 u16 offset; 1602 1582 1603 - if (!adev->mman.discovery_bin) { 1583 + if (!discovery_bin) { 1604 1584 DRM_ERROR("ip discovery uninitialized\n"); 1605 1585 return -EINVAL; 1606 1586 } 1607 1587 1608 - bhdr = (struct binary_header *)adev->mman.discovery_bin; 1588 + bhdr = (struct binary_header *)discovery_bin; 1609 1589 offset = le16_to_cpu(bhdr->table_list[GC].offset); 1610 1590 1611 1591 if (!offset) 1612 1592 return 0; 1613 1593 1614 - gc_info = (union gc_info *)(adev->mman.discovery_bin + offset); 1594 + gc_info = (union gc_info *)(discovery_bin + offset); 1615 1595 1616 1596 switch (le16_to_cpu(gc_info->v1.header.version_major)) { 1617 1597 case 1: ··· 1705 1683 1706 1684 static int amdgpu_discovery_get_mall_info(struct amdgpu_device *adev) 1707 1685 { 1686 + uint8_t *discovery_bin = adev->discovery.bin; 1708 1687 struct binary_header *bhdr; 1709 1688 union mall_info *mall_info; 1710 1689 u32 u, mall_size_per_umc, m_s_present, half_use; 1711 1690 u64 mall_size; 1712 1691 u16 offset; 1713 1692 1714 - if (!adev->mman.discovery_bin) { 1693 + if (!discovery_bin) { 1715 1694 DRM_ERROR("ip discovery uninitialized\n"); 1716 1695 return -EINVAL; 1717 1696 } 1718 1697 1719 - bhdr = (struct binary_header *)adev->mman.discovery_bin; 1698 + bhdr = (struct binary_header *)discovery_bin; 1720 1699 offset = le16_to_cpu(bhdr->table_list[MALL_INFO].offset); 1721 1700 1722 1701 if (!offset) 1723 1702 return 0; 1724 1703 1725 - mall_info = (union mall_info *)(adev->mman.discovery_bin + offset); 1704 + mall_info = (union mall_info *)(discovery_bin + offset); 1726 1705 1727 1706 switch (le16_to_cpu(mall_info->v1.header.version_major)) { 1728 1707 case 1: ··· 1762 1739 1763 1740 static int amdgpu_discovery_get_vcn_info(struct amdgpu_device *adev) 1764 1741 { 1742 + uint8_t *discovery_bin = adev->discovery.bin; 1765 1743 struct binary_header *bhdr; 1766 1744 union vcn_info *vcn_info; 1767 1745 u16 offset; 1768 1746 int v; 1769 1747 1770 - if (!adev->mman.discovery_bin) { 1748 + if (!discovery_bin) { 1771 1749 DRM_ERROR("ip discovery uninitialized\n"); 1772 1750 return -EINVAL; 1773 1751 } ··· 1783 1759 return -EINVAL; 1784 1760 } 1785 1761 1786 - bhdr = (struct binary_header *)adev->mman.discovery_bin; 1762 + bhdr = (struct binary_header *)discovery_bin; 1787 1763 offset = le16_to_cpu(bhdr->table_list[VCN_INFO].offset); 1788 1764 1789 1765 if (!offset) 1790 1766 return 0; 1791 1767 1792 - vcn_info = (union vcn_info *)(adev->mman.discovery_bin + offset); 1768 + vcn_info = (union vcn_info *)(discovery_bin + offset); 1793 1769 1794 1770 switch (le16_to_cpu(vcn_info->v1.header.version_major)) { 1795 1771 case 1: ··· 1849 1825 struct amdgpu_gmc_memrange **ranges, 1850 1826 int *range_cnt, bool refresh) 1851 1827 { 1828 + uint8_t *discovery_bin = adev->discovery.bin; 1852 1829 struct amdgpu_gmc_memrange *mem_ranges; 1853 1830 struct binary_header *bhdr; 1854 1831 union nps_info *nps_info; ··· 1866 1841 return r; 1867 1842 nps_info = &nps_data; 1868 1843 } else { 1869 - if (!adev->mman.discovery_bin) { 1844 + if (!discovery_bin) { 1870 1845 dev_err(adev->dev, 1871 1846 "fetch mem range failed, ip discovery uninitialized\n"); 1872 1847 return -EINVAL; 1873 1848 } 1874 1849 1875 - bhdr = (struct binary_header *)adev->mman.discovery_bin; 1850 + bhdr = (struct binary_header *)discovery_bin; 1876 1851 offset = le16_to_cpu(bhdr->table_list[NPS_INFO].offset); 1877 1852 1878 1853 if (!offset) ··· 1882 1857 if (amdgpu_discovery_verify_npsinfo(adev, bhdr)) 1883 1858 return -ENOENT; 1884 1859 1885 - nps_info = 1886 - (union nps_info *)(adev->mman.discovery_bin + offset); 1860 + nps_info = (union nps_info *)(discovery_bin + offset); 1887 1861 } 1888 1862 1889 1863 switch (le16_to_cpu(nps_info->v1.header.version_major)) {
+11
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h
··· 24 24 #ifndef __AMDGPU_DISCOVERY__ 25 25 #define __AMDGPU_DISCOVERY__ 26 26 27 + #include <linux/debugfs.h> 28 + 27 29 #define DISCOVERY_TMR_SIZE (10 << 10) 28 30 #define DISCOVERY_TMR_OFFSET (64 << 10) 31 + 32 + struct ip_discovery_top; 33 + 34 + struct amdgpu_discovery_info { 35 + struct debugfs_blob_wrapper debugfs_blob; 36 + struct ip_discovery_top *ip_top; 37 + uint32_t size; 38 + uint8_t *bin; 39 + }; 29 40 30 41 void amdgpu_discovery_fini(struct amdgpu_device *adev); 31 42 int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev);
+1 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
··· 1957 1957 * If IP discovery enabled, a block of memory should be 1958 1958 * reserved for IP discovey. 1959 1959 */ 1960 - if (adev->mman.discovery_bin) { 1960 + if (adev->discovery.bin) { 1961 1961 r = amdgpu_ttm_reserve_tmr(adev); 1962 1962 if (r) 1963 1963 return r;