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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Bluetooth: btintel_pcie: Align shared DMA memory to 128 bytes
Align each descriptor/index/context region to 128 bytes before
calculating the total DMA pool size. This ensures the memory layout
shared with firmware meets the 128-byte alignment requirement.
The DMA pool alignment is also set to 128 bytes to match the firmware
expectation for all shared structures.
Signed-off-by: Kiran K <kiran.k@intel.com>
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
authored by
Kiran K
and committed by
Luiz Augusto von Dentz
9e3d074b
42776497
+53
-44
+53
-41
drivers/bluetooth/btintel_pcie.c
+53
-41
drivers/bluetooth/btintel_pcie.c
···
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#define POLL_INTERVAL_US 10
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+
#define BTINTEL_PCIE_DMA_ALIGN_128B 128 /* 128 byte aligned */
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+
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/* Intel Bluetooth PCIe device id table */
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static const struct pci_device_id btintel_pcie_table[] = {
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/* BlazarI, Wildcat Lake */
···
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return 0;
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}
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-
static void btintel_pcie_setup_ia(struct btintel_pcie_data *data,
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dma_addr_t p_addr, void *v_addr,
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struct ia *ia)
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{
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/* TR Head Index Array */
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ia->tr_hia_p_addr = p_addr;
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ia->tr_hia = v_addr;
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-
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/* TR Tail Index Array */
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ia->tr_tia_p_addr = p_addr + sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES;
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ia->tr_tia = v_addr + sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES;
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-
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/* CR Head index Array */
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ia->cr_hia_p_addr = p_addr + (sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 2);
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ia->cr_hia = v_addr + (sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 2);
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-
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/* CR Tail Index Array */
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ia->cr_tia_p_addr = p_addr + (sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 3);
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ia->cr_tia = v_addr + (sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 3);
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}
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-
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static void btintel_pcie_free(struct btintel_pcie_data *data)
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{
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btintel_pcie_free_rxq_bufs(data, &data->rxq);
···
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size_t total;
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dma_addr_t p_addr;
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void *v_addr;
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size_t tfd_size, frbd_size, ctx_size, ci_size, urbd0_size, urbd1_size;
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/* Allocate the chunk of DMA memory for descriptors, index array, and
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* context information, instead of allocating individually.
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* The DMA memory for data buffer is allocated while setting up the
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* each queue.
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*
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* Total size is sum of the following
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* Total size is sum of the following and each of the individual sizes
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* are aligned to 128 bytes before adding up.
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*
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* + size of TFD * Number of descriptors in queue
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* + size of URBD0 * Number of descriptors in queue
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* + size of FRBD * Number of descriptors in queue
···
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* + size of index * Number of queues(2) * type of index array(4)
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* + size of context information
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*/
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total = (sizeof(struct tfd) + sizeof(struct urbd0)) * BTINTEL_PCIE_TX_DESCS_COUNT;
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total += (sizeof(struct frbd) + sizeof(struct urbd1)) * BTINTEL_PCIE_RX_DESCS_COUNT;
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tfd_size = ALIGN(sizeof(struct tfd) * BTINTEL_PCIE_TX_DESCS_COUNT,
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BTINTEL_PCIE_DMA_ALIGN_128B);
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urbd0_size = ALIGN(sizeof(struct urbd0) * BTINTEL_PCIE_TX_DESCS_COUNT,
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BTINTEL_PCIE_DMA_ALIGN_128B);
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/* Add the sum of size of index array and size of ci struct */
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total += (sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 4) + sizeof(struct ctx_info);
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frbd_size = ALIGN(sizeof(struct frbd) * BTINTEL_PCIE_RX_DESCS_COUNT,
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BTINTEL_PCIE_DMA_ALIGN_128B);
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urbd1_size = ALIGN(sizeof(struct urbd1) * BTINTEL_PCIE_RX_DESCS_COUNT,
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BTINTEL_PCIE_DMA_ALIGN_128B);
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/* Allocate DMA Pool */
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ci_size = ALIGN(sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES,
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BTINTEL_PCIE_DMA_ALIGN_128B);
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ctx_size = ALIGN(sizeof(struct ctx_info), BTINTEL_PCIE_DMA_ALIGN_128B);
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total = tfd_size + urbd0_size + frbd_size + urbd1_size + ctx_size + ci_size * 4;
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+
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data->dma_pool = dma_pool_create(KBUILD_MODNAME, &data->pdev->dev,
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total, BTINTEL_PCIE_DMA_POOL_ALIGNMENT, 0);
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total, BTINTEL_PCIE_DMA_ALIGN_128B, 0);
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if (!data->dma_pool) {
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err = -ENOMEM;
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goto exit_error;
···
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data->txq.tfds_p_addr = p_addr;
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data->txq.tfds = v_addr;
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-
p_addr += (sizeof(struct tfd) * BTINTEL_PCIE_TX_DESCS_COUNT);
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v_addr += (sizeof(struct tfd) * BTINTEL_PCIE_TX_DESCS_COUNT);
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p_addr += tfd_size;
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v_addr += tfd_size;
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/* Setup urbd0 */
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data->txq.urbd0s_p_addr = p_addr;
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data->txq.urbd0s = v_addr;
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p_addr += (sizeof(struct urbd0) * BTINTEL_PCIE_TX_DESCS_COUNT);
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v_addr += (sizeof(struct urbd0) * BTINTEL_PCIE_TX_DESCS_COUNT);
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p_addr += urbd0_size;
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v_addr += urbd0_size;
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/* Setup FRBD*/
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data->rxq.frbds_p_addr = p_addr;
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data->rxq.frbds = v_addr;
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p_addr += (sizeof(struct frbd) * BTINTEL_PCIE_RX_DESCS_COUNT);
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v_addr += (sizeof(struct frbd) * BTINTEL_PCIE_RX_DESCS_COUNT);
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p_addr += frbd_size;
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v_addr += frbd_size;
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/* Setup urbd1 */
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data->rxq.urbd1s_p_addr = p_addr;
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data->rxq.urbd1s = v_addr;
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p_addr += (sizeof(struct urbd1) * BTINTEL_PCIE_RX_DESCS_COUNT);
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v_addr += (sizeof(struct urbd1) * BTINTEL_PCIE_RX_DESCS_COUNT);
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p_addr += urbd1_size;
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v_addr += urbd1_size;
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/* Setup data buffers for txq */
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err = btintel_pcie_setup_txq_bufs(data, &data->txq);
···
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if (err)
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goto exit_error_txq;
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-
/* Setup Index Array */
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btintel_pcie_setup_ia(data, p_addr, v_addr, &data->ia);
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/* TR Head Index Array */
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data->ia.tr_hia_p_addr = p_addr;
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data->ia.tr_hia = v_addr;
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p_addr += ci_size;
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v_addr += ci_size;
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/* TR Tail Index Array */
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data->ia.tr_tia_p_addr = p_addr;
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data->ia.tr_tia = v_addr;
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p_addr += ci_size;
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v_addr += ci_size;
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/* CR Head index Array */
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data->ia.cr_hia_p_addr = p_addr;
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data->ia.cr_hia = v_addr;
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p_addr += ci_size;
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v_addr += ci_size;
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/* CR Tail Index Array */
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data->ia.cr_tia_p_addr = p_addr;
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data->ia.cr_tia = v_addr;
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p_addr += ci_size;
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v_addr += ci_size;
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/* Setup data buffers for dbgc */
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err = btintel_pcie_setup_dbgc(data);
···
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goto exit_error_txq;
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/* Setup Context Information */
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p_addr += sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 4;
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v_addr += sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 4;
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data->ci = v_addr;
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data->ci_p_addr = p_addr;
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-3
drivers/bluetooth/btintel_pcie.h
-3
drivers/bluetooth/btintel_pcie.h
···
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/* The size of DMA buffer for TX and RX in bytes */
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#define BTINTEL_PCIE_BUFFER_SIZE 4096
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/* DMA allocation alignment */
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#define BTINTEL_PCIE_DMA_POOL_ALIGNMENT 256
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-
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#define BTINTEL_PCIE_TX_WAIT_TIMEOUT_MS 500
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/* Doorbell vector for TFD */