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phy: qcom: qmp-combo: drop similar functions

The functions qmp_v5_configure_dp_phy() and qmp_v6_configure_dp_phy()
are now copies of qmp_v4_configure_dp_phy(). Drop them and use the v4
function in all the cases.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230621153317.1025914-6-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Dmitry Baryshkov and committed by
Vinod Koul
9e6a0403 cd1f3343

+2 -121
+2 -121
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
··· 1433 1433 static int qmp_v4_configure_dp_phy(struct qmp_combo *qmp); 1434 1434 static int qmp_v4_calibrate_dp_phy(struct qmp_combo *qmp); 1435 1435 1436 - static int qmp_v5_configure_dp_phy(struct qmp_combo *qmp); 1437 - 1438 1436 static void qmp_v6_dp_aux_init(struct qmp_combo *qmp); 1439 - static int qmp_v6_configure_dp_phy(struct qmp_combo *qmp); 1440 1437 1441 1438 static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val) 1442 1439 { ··· 1683 1686 1684 1687 .dp_aux_init = qmp_v4_dp_aux_init, 1685 1688 .configure_dp_tx = qmp_v4_configure_dp_tx, 1686 - .configure_dp_phy = qmp_v5_configure_dp_phy, 1689 + .configure_dp_phy = qmp_v4_configure_dp_phy, 1687 1690 .calibrate_dp_phy = qmp_v4_calibrate_dp_phy, 1688 1691 1689 1692 .clk_list = qmp_v4_phy_clk_l, ··· 1872 1875 1873 1876 .dp_aux_init = qmp_v6_dp_aux_init, 1874 1877 .configure_dp_tx = qmp_v4_configure_dp_tx, 1875 - .configure_dp_phy = qmp_v6_configure_dp_phy, 1878 + .configure_dp_phy = qmp_v4_configure_dp_phy, 1876 1879 .calibrate_dp_phy = qmp_v4_calibrate_dp_phy, 1877 1880 1878 1881 .regs = qmp_v6_usb3phy_regs_layout, ··· 2379 2382 writel(0x20, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); 2380 2383 2381 2384 return 0; 2382 - 2383 - return 0; 2384 - } 2385 - 2386 - static int qmp_v5_configure_dp_phy(struct qmp_combo *qmp) 2387 - { 2388 - const struct qmp_phy_cfg *cfg = qmp->cfg; 2389 - bool reverse = (qmp->orientation == TYPEC_ORIENTATION_REVERSE); 2390 - const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; 2391 - u32 bias0_en, drvr0_en, bias1_en, drvr1_en; 2392 - u32 status; 2393 - int ret; 2394 - 2395 - ret = qmp_v456_configure_dp_phy(qmp); 2396 - if (ret < 0) 2397 - return ret; 2398 - 2399 - if (dp_opts->lanes == 1) { 2400 - bias0_en = reverse ? 0x3e : 0x15; 2401 - drvr0_en = reverse ? 0x13 : 0x10; 2402 - bias1_en = reverse ? 0x15 : 0x3e; 2403 - drvr1_en = reverse ? 0x10 : 0x13; 2404 - } else if (dp_opts->lanes == 2) { 2405 - bias0_en = reverse ? 0x3f : 0x15; 2406 - drvr0_en = 0x10; 2407 - bias1_en = reverse ? 0x15 : 0x3f; 2408 - drvr1_en = 0x10; 2409 - } else { 2410 - bias0_en = 0x3f; 2411 - bias1_en = 0x3f; 2412 - drvr0_en = 0x10; 2413 - drvr1_en = 0x10; 2414 - } 2415 - 2416 - writel(drvr0_en, qmp->dp_tx + cfg->regs[QPHY_TX_HIGHZ_DRVR_EN]); 2417 - writel(bias0_en, qmp->dp_tx + cfg->regs[QPHY_TX_TRANSCEIVER_BIAS_EN]); 2418 - writel(drvr1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_HIGHZ_DRVR_EN]); 2419 - writel(bias1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_TRANSCEIVER_BIAS_EN]); 2420 - 2421 - writel(0x18, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); 2422 - udelay(2000); 2423 - writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); 2424 - 2425 - if (readl_poll_timeout(qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_STATUS], 2426 - status, 2427 - ((status & BIT(1)) > 0), 2428 - 500, 2429 - 10000)) 2430 - return -ETIMEDOUT; 2431 - 2432 - writel(0x0a, qmp->dp_tx + cfg->regs[QPHY_TX_TX_POL_INV]); 2433 - writel(0x0a, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_POL_INV]); 2434 - 2435 - writel(0x27, qmp->dp_tx + cfg->regs[QPHY_TX_TX_DRV_LVL]); 2436 - writel(0x27, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_DRV_LVL]); 2437 - 2438 - writel(0x20, qmp->dp_tx + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); 2439 - writel(0x20, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); 2440 - 2441 - return 0; 2442 - } 2443 - 2444 - static int qmp_v6_configure_dp_phy(struct qmp_combo *qmp) 2445 - { 2446 - const struct qmp_phy_cfg *cfg = qmp->cfg; 2447 - bool reverse = (qmp->orientation == TYPEC_ORIENTATION_REVERSE); 2448 - const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; 2449 - u32 bias0_en, drvr0_en, bias1_en, drvr1_en; 2450 - u32 status; 2451 - int ret; 2452 - 2453 - ret = qmp_v456_configure_dp_phy(qmp); 2454 - if (ret < 0) 2455 - return ret; 2456 - 2457 - if (dp_opts->lanes == 1) { 2458 - bias0_en = reverse ? 0x3e : 0x15; 2459 - drvr0_en = reverse ? 0x13 : 0x10; 2460 - bias1_en = reverse ? 0x15 : 0x3e; 2461 - drvr1_en = reverse ? 0x10 : 0x13; 2462 - } else if (dp_opts->lanes == 2) { 2463 - bias0_en = reverse ? 0x3f : 0x15; 2464 - drvr0_en = 0x10; 2465 - bias1_en = reverse ? 0x15 : 0x3f; 2466 - drvr1_en = 0x10; 2467 - } else { 2468 - bias0_en = 0x3f; 2469 - bias1_en = 0x3f; 2470 - drvr0_en = 0x10; 2471 - drvr1_en = 0x10; 2472 - } 2473 - 2474 - writel(drvr0_en, qmp->dp_tx + cfg->regs[QPHY_TX_HIGHZ_DRVR_EN]); 2475 - writel(bias0_en, qmp->dp_tx + cfg->regs[QPHY_TX_TRANSCEIVER_BIAS_EN]); 2476 - writel(drvr1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_HIGHZ_DRVR_EN]); 2477 - writel(bias1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_TRANSCEIVER_BIAS_EN]); 2478 - 2479 - writel(0x18, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); 2480 - udelay(2000); 2481 - writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); 2482 - 2483 - if (readl_poll_timeout(qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_STATUS], 2484 - status, 2485 - ((status & BIT(1)) > 0), 2486 - 500, 2487 - 10000)) 2488 - return -ETIMEDOUT; 2489 - 2490 - writel(0x0a, qmp->dp_tx + cfg->regs[QPHY_TX_TX_POL_INV]); 2491 - writel(0x0a, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_POL_INV]); 2492 - 2493 - writel(0x27, qmp->dp_tx + cfg->regs[QPHY_TX_TX_DRV_LVL]); 2494 - writel(0x27, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_DRV_LVL]); 2495 - 2496 - writel(0x20, qmp->dp_tx + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); 2497 - writel(0x20, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); 2498 2385 2499 2386 return 0; 2500 2387 }