Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie:
"All fairly small: radeon stability and a panic path fix.
Mostly radeon fixes, suspend/resume fix, stability on the CIK
chipsets, along with a locking check avoidance patch for panic times
regression"
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/radeon: use the CP DMA on CIK
drm/radeon: sync page table updates
drm/radeon: fix vm buffer size estimation
drm/crtc-helper: skip locking checks in panicking path
drm/radeon/dpm: resume fixes for some systems
+31
-12
+15
-2
drivers/gpu/drm/drm_crtc_helper.c
+15
-2
drivers/gpu/drm/drm_crtc_helper.c
···
29
29
* Jesse Barnes <jesse.barnes@intel.com>
30
30
*/
31
31
32
+
#include <linux/kernel.h>
32
33
#include <linux/export.h>
33
34
#include <linux/moduleparam.h>
34
35
···
89
88
struct drm_connector *connector;
90
89
struct drm_device *dev = encoder->dev;
91
90
92
-
WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
91
+
/*
92
+
* We can expect this mutex to be locked if we are not panicking.
93
+
* Locking is currently fubar in the panic handler.
94
+
*/
95
+
if (!oops_in_progress)
96
+
WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
97
+
93
98
list_for_each_entry(connector, &dev->mode_config.connector_list, head)
94
99
if (connector->encoder == encoder)
95
100
return true;
···
119
112
struct drm_encoder *encoder;
120
113
struct drm_device *dev = crtc->dev;
121
114
122
-
WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
115
+
/*
116
+
* We can expect this mutex to be locked if we are not panicking.
117
+
* Locking is currently fubar in the panic handler.
118
+
*/
119
+
if (!oops_in_progress)
120
+
WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
121
+
123
122
list_for_each_entry(encoder, &dev->mode_config.encoder_list, head)
124
123
if (encoder->crtc == crtc && drm_helper_encoder_in_use(encoder))
125
124
return true;
+2
-4
drivers/gpu/drm/radeon/atombios_crtc.c
+2
-4
drivers/gpu/drm/radeon/atombios_crtc.c
···
270
270
switch (mode) {
271
271
case DRM_MODE_DPMS_ON:
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272
radeon_crtc->enabled = true;
273
-
/* adjust pm to dpms changes BEFORE enabling crtcs */
274
-
radeon_pm_compute_clocks(rdev);
275
273
atombios_enable_crtc(crtc, ATOM_ENABLE);
276
274
if (ASIC_IS_DCE3(rdev) && !ASIC_IS_DCE6(rdev))
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275
atombios_enable_crtc_memreq(crtc, ATOM_ENABLE);
···
287
289
atombios_enable_crtc_memreq(crtc, ATOM_DISABLE);
288
290
atombios_enable_crtc(crtc, ATOM_DISABLE);
289
291
radeon_crtc->enabled = false;
290
-
/* adjust pm to dpms changes AFTER disabling crtcs */
291
-
radeon_pm_compute_clocks(rdev);
292
292
break;
293
293
}
294
+
/* adjust pm to dpms */
295
+
radeon_pm_compute_clocks(rdev);
294
296
}
295
297
296
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static void
+2
-2
drivers/gpu/drm/radeon/radeon_asic.c
+2
-2
drivers/gpu/drm/radeon/radeon_asic.c
···
2049
2049
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
2050
2050
.dma = &cik_copy_dma,
2051
2051
.dma_ring_index = R600_RING_TYPE_DMA_INDEX,
2052
-
.copy = &cik_copy_dma,
2053
-
.copy_ring_index = R600_RING_TYPE_DMA_INDEX,
2052
+
.copy = &cik_copy_cpdma,
2053
+
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
2054
2054
},
2055
2055
.surface = {
2056
2056
.set_reg = r600_set_surface_reg,
+4
drivers/gpu/drm/radeon/radeon_device.c
+4
drivers/gpu/drm/radeon/radeon_device.c
···
1558
1558
1559
1559
drm_kms_helper_poll_enable(dev);
1560
1560
1561
+
/* set the power state here in case we are a PX system or headless */
1562
+
if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled)
1563
+
radeon_pm_compute_clocks(rdev);
1564
+
1561
1565
if (fbcon) {
1562
1566
radeon_fbdev_set_suspend(rdev, 0);
1563
1567
console_unlock();
-1
drivers/gpu/drm/radeon/radeon_pm.c
-1
drivers/gpu/drm/radeon/radeon_pm.c
+8
-3
drivers/gpu/drm/radeon/radeon_vm.c
+8
-3
drivers/gpu/drm/radeon/radeon_vm.c
···
132
132
struct radeon_cs_reloc *list;
133
133
unsigned i, idx;
134
134
135
-
list = kmalloc_array(vm->max_pde_used + 1,
135
+
list = kmalloc_array(vm->max_pde_used + 2,
136
136
sizeof(struct radeon_cs_reloc), GFP_KERNEL);
137
137
if (!list)
138
138
return NULL;
···
585
585
{
586
586
static const uint32_t incr = RADEON_VM_PTE_COUNT * 8;
587
587
588
-
uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory);
588
+
struct radeon_bo *pd = vm->page_directory;
589
+
uint64_t pd_addr = radeon_bo_gpu_offset(pd);
589
590
uint64_t last_pde = ~0, last_pt = ~0;
590
591
unsigned count = 0, pt_idx, ndw;
591
592
struct radeon_ib ib;
···
643
642
incr, R600_PTE_VALID);
644
643
645
644
if (ib.length_dw != 0) {
645
+
radeon_semaphore_sync_to(ib.semaphore, pd->tbo.sync_obj);
646
646
radeon_semaphore_sync_to(ib.semaphore, vm->last_id_use);
647
647
r = radeon_ib_schedule(rdev, &ib, NULL);
648
648
if (r) {
···
691
689
/* walk over the address space and update the page tables */
692
690
for (addr = start; addr < end; ) {
693
691
uint64_t pt_idx = addr >> RADEON_VM_BLOCK_SIZE;
692
+
struct radeon_bo *pt = vm->page_tables[pt_idx].bo;
694
693
unsigned nptes;
695
694
uint64_t pte;
695
+
696
+
radeon_semaphore_sync_to(ib->semaphore, pt->tbo.sync_obj);
696
697
697
698
if ((addr & ~mask) == (end & ~mask))
698
699
nptes = end - addr;
699
700
else
700
701
nptes = RADEON_VM_PTE_COUNT - (addr & mask);
701
702
702
-
pte = radeon_bo_gpu_offset(vm->page_tables[pt_idx].bo);
703
+
pte = radeon_bo_gpu_offset(pt);
703
704
pte += (addr & mask) * 8;
704
705
705
706
if ((last_pte + 8 * count) != pte) {