Merge branch 'lan78xx-preparations-for-phylink'

+433 -352

1 changed file

expand all

drivers

net

usb

lan78xx.c

+433 -352

drivers/net/usb/lan78xx.c

··· 472 472 struct irq_domain_data domain_data; 473 473 }; 474 474 475 - /* define external phy id */ 476 - #define PHY_LAN8835 (0x0007C130) 477 - #define PHY_KSZ9031RNX (0x00221620) 478 - 479 475 /* use ethtool to change the level for any given device */ 480 476 static int msg_level = -1; 481 477 module_param(msg_level, int, 0); ··· 621 625 *data = *buf; 622 626 } else if (net_ratelimit()) { 623 627 netdev_warn(dev->net, 624 - "Failed to read register index 0x%08x. ret = %d", 625 - index, ret); 628 + "Failed to read register index 0x%08x. ret = %pe", 629 + index, ERR_PTR(ret)); 626 630 } 627 631 628 632 kfree(buf); ··· 652 656 if (unlikely(ret < 0) && 653 657 net_ratelimit()) { 654 658 netdev_warn(dev->net, 655 - "Failed to write register index 0x%08x. ret = %d", 656 - index, ret); 659 + "Failed to write register index 0x%08x. ret = %pe", 660 + index, ERR_PTR(ret)); 657 661 } 658 662 659 663 kfree(buf); ··· 808 812 usb_autopm_put_interface(dev->intf); 809 813 } 810 814 815 + static int lan78xx_start_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enable) 816 + { 817 + return lan78xx_update_reg(dev, reg, hw_enable, hw_enable); 818 + } 819 + 820 + static int lan78xx_stop_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enabled, 821 + u32 hw_disabled) 822 + { 823 + unsigned long timeout; 824 + bool stopped = true; 825 + int ret; 826 + u32 buf; 827 + 828 + /* Stop the h/w block (if not already stopped) */ 829 + 830 + ret = lan78xx_read_reg(dev, reg, &buf); 831 + if (ret < 0) 832 + return ret; 833 + 834 + if (buf & hw_enabled) { 835 + buf &= ~hw_enabled; 836 + 837 + ret = lan78xx_write_reg(dev, reg, buf); 838 + if (ret < 0) 839 + return ret; 840 + 841 + stopped = false; 842 + timeout = jiffies + HW_DISABLE_TIMEOUT; 843 + do { 844 + ret = lan78xx_read_reg(dev, reg, &buf); 845 + if (ret < 0) 846 + return ret; 847 + 848 + if (buf & hw_disabled) 849 + stopped = true; 850 + else 851 + msleep(HW_DISABLE_DELAY_MS); 852 + } while (!stopped && !time_after(jiffies, timeout)); 853 + } 854 + 855 + ret = stopped ? 0 : -ETIME; 856 + 857 + return ret; 858 + } 859 + 860 + static int lan78xx_flush_fifo(struct lan78xx_net *dev, u32 reg, u32 fifo_flush) 861 + { 862 + return lan78xx_update_reg(dev, reg, fifo_flush, fifo_flush); 863 + } 864 + 865 + static int lan78xx_start_tx_path(struct lan78xx_net *dev) 866 + { 867 + int ret; 868 + 869 + netif_dbg(dev, drv, dev->net, "start tx path"); 870 + 871 + /* Start the MAC transmitter */ 872 + 873 + ret = lan78xx_start_hw(dev, MAC_TX, MAC_TX_TXEN_); 874 + if (ret < 0) 875 + return ret; 876 + 877 + /* Start the Tx FIFO */ 878 + 879 + ret = lan78xx_start_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_); 880 + if (ret < 0) 881 + return ret; 882 + 883 + return 0; 884 + } 885 + 886 + static int lan78xx_stop_tx_path(struct lan78xx_net *dev) 887 + { 888 + int ret; 889 + 890 + netif_dbg(dev, drv, dev->net, "stop tx path"); 891 + 892 + /* Stop the Tx FIFO */ 893 + 894 + ret = lan78xx_stop_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_, FCT_TX_CTL_DIS_); 895 + if (ret < 0) 896 + return ret; 897 + 898 + /* Stop the MAC transmitter */ 899 + 900 + ret = lan78xx_stop_hw(dev, MAC_TX, MAC_TX_TXEN_, MAC_TX_TXD_); 901 + if (ret < 0) 902 + return ret; 903 + 904 + return 0; 905 + } 906 + 907 + /* The caller must ensure the Tx path is stopped before calling 908 + * lan78xx_flush_tx_fifo(). 909 + */ 910 + static int lan78xx_flush_tx_fifo(struct lan78xx_net *dev) 911 + { 912 + return lan78xx_flush_fifo(dev, FCT_TX_CTL, FCT_TX_CTL_RST_); 913 + } 914 + 915 + static int lan78xx_start_rx_path(struct lan78xx_net *dev) 916 + { 917 + int ret; 918 + 919 + netif_dbg(dev, drv, dev->net, "start rx path"); 920 + 921 + /* Start the Rx FIFO */ 922 + 923 + ret = lan78xx_start_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_); 924 + if (ret < 0) 925 + return ret; 926 + 927 + /* Start the MAC receiver*/ 928 + 929 + ret = lan78xx_start_hw(dev, MAC_RX, MAC_RX_RXEN_); 930 + if (ret < 0) 931 + return ret; 932 + 933 + return 0; 934 + } 935 + 936 + static int lan78xx_stop_rx_path(struct lan78xx_net *dev) 937 + { 938 + int ret; 939 + 940 + netif_dbg(dev, drv, dev->net, "stop rx path"); 941 + 942 + /* Stop the MAC receiver */ 943 + 944 + ret = lan78xx_stop_hw(dev, MAC_RX, MAC_RX_RXEN_, MAC_RX_RXD_); 945 + if (ret < 0) 946 + return ret; 947 + 948 + /* Stop the Rx FIFO */ 949 + 950 + ret = lan78xx_stop_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_, FCT_RX_CTL_DIS_); 951 + if (ret < 0) 952 + return ret; 953 + 954 + return 0; 955 + } 956 + 957 + /* The caller must ensure the Rx path is stopped before calling 958 + * lan78xx_flush_rx_fifo(). 959 + */ 960 + static int lan78xx_flush_rx_fifo(struct lan78xx_net *dev) 961 + { 962 + return lan78xx_flush_fifo(dev, FCT_RX_CTL, FCT_RX_CTL_RST_); 963 + } 964 + 811 965 /* Loop until the read is completed with timeout called with phy_mutex held */ 812 966 static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev) 813 967 { ··· 1000 854 1001 855 do { 1002 856 ret = lan78xx_read_reg(dev, E2P_CMD, &val); 1003 - if (unlikely(ret < 0)) 1004 - return -EIO; 857 + if (ret < 0) 858 + return ret; 1005 859 1006 860 if (!(val & E2P_CMD_EPC_BUSY_) || 1007 861 (val & E2P_CMD_EPC_TIMEOUT_)) ··· 1011 865 1012 866 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) { 1013 867 netdev_warn(dev->net, "EEPROM read operation timeout"); 1014 - return -EIO; 868 + return -ETIMEDOUT; 1015 869 } 1016 870 1017 871 return 0; ··· 1025 879 1026 880 do { 1027 881 ret = lan78xx_read_reg(dev, E2P_CMD, &val); 1028 - if (unlikely(ret < 0)) 1029 - return -EIO; 882 + if (ret < 0) 883 + return ret; 1030 884 1031 885 if (!(val & E2P_CMD_EPC_BUSY_)) 1032 886 return 0; ··· 1035 889 } while (!time_after(jiffies, start_time + HZ)); 1036 890 1037 891 netdev_warn(dev->net, "EEPROM is busy"); 1038 - return -EIO; 892 + return -ETIMEDOUT; 1039 893 } 1040 894 1041 895 static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset, 1042 896 u32 length, u8 *data) 1043 897 { 1044 - u32 val; 1045 - u32 saved; 898 + u32 val, saved; 1046 899 int i, ret; 1047 - int retval; 1048 900 1049 901 /* depends on chip, some EEPROM pins are muxed with LED function. 1050 902 * disable & restore LED function to access EEPROM. 1051 903 */ 1052 904 ret = lan78xx_read_reg(dev, HW_CFG, &val); 905 + if (ret < 0) 906 + return ret; 907 + 1053 908 saved = val; 1054 909 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 1055 910 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_); 1056 911 ret = lan78xx_write_reg(dev, HW_CFG, val); 912 + if (ret < 0) 913 + return ret; 1057 914 } 1058 915 1059 - retval = lan78xx_eeprom_confirm_not_busy(dev); 1060 - if (retval) 1061 - return retval; 916 + ret = lan78xx_eeprom_confirm_not_busy(dev); 917 + if (ret == -ETIMEDOUT) 918 + goto read_raw_eeprom_done; 919 + /* If USB fails, there is nothing to do */ 920 + if (ret < 0) 921 + return ret; 1062 922 1063 923 for (i = 0; i < length; i++) { 1064 924 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_; 1065 925 val |= (offset & E2P_CMD_EPC_ADDR_MASK_); 1066 926 ret = lan78xx_write_reg(dev, E2P_CMD, val); 1067 - if (unlikely(ret < 0)) { 1068 - retval = -EIO; 1069 - goto exit; 1070 - } 927 + if (ret < 0) 928 + return ret; 1071 929 1072 - retval = lan78xx_wait_eeprom(dev); 1073 - if (retval < 0) 1074 - goto exit; 930 + ret = lan78xx_wait_eeprom(dev); 931 + /* Looks like not USB specific error, try to recover */ 932 + if (ret == -ETIMEDOUT) 933 + goto read_raw_eeprom_done; 934 + /* If USB fails, there is nothing to do */ 935 + if (ret < 0) 936 + return ret; 1075 937 1076 938 ret = lan78xx_read_reg(dev, E2P_DATA, &val); 1077 - if (unlikely(ret < 0)) { 1078 - retval = -EIO; 1079 - goto exit; 1080 - } 939 + if (ret < 0) 940 + return ret; 1081 941 1082 942 data[i] = val & 0xFF; 1083 943 offset++; 1084 944 } 1085 945 1086 - retval = 0; 1087 - exit: 946 + read_raw_eeprom_done: 1088 947 if (dev->chipid == ID_REV_CHIP_ID_7800_) 1089 - ret = lan78xx_write_reg(dev, HW_CFG, saved); 948 + return lan78xx_write_reg(dev, HW_CFG, saved); 1090 949 1091 - return retval; 950 + return 0; 1092 951 } 1093 952 1094 953 static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset, 1095 954 u32 length, u8 *data) 1096 955 { 1097 - u8 sig; 1098 956 int ret; 957 + u8 sig; 1099 958 1100 959 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig); 1101 - if ((ret == 0) && (sig == EEPROM_INDICATOR)) 1102 - ret = lan78xx_read_raw_eeprom(dev, offset, length, data); 1103 - else 1104 - ret = -EINVAL; 960 + if (ret < 0) 961 + return ret; 1105 962 1106 - return ret; 963 + if (sig != EEPROM_INDICATOR) 964 + return -ENODATA; 965 + 966 + return lan78xx_read_raw_eeprom(dev, offset, length, data); 1107 967 } 1108 968 1109 969 static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset, ··· 1118 966 u32 val; 1119 967 u32 saved; 1120 968 int i, ret; 1121 - int retval; 1122 969 1123 970 /* depends on chip, some EEPROM pins are muxed with LED function. 1124 971 * disable & restore LED function to access EEPROM. 1125 972 */ 1126 973 ret = lan78xx_read_reg(dev, HW_CFG, &val); 974 + if (ret < 0) 975 + return ret; 976 + 1127 977 saved = val; 1128 978 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 1129 979 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_); 1130 980 ret = lan78xx_write_reg(dev, HW_CFG, val); 981 + if (ret < 0) 982 + return ret; 1131 983 } 1132 984 1133 - retval = lan78xx_eeprom_confirm_not_busy(dev); 1134 - if (retval) 1135 - goto exit; 985 + ret = lan78xx_eeprom_confirm_not_busy(dev); 986 + /* Looks like not USB specific error, try to recover */ 987 + if (ret == -ETIMEDOUT) 988 + goto write_raw_eeprom_done; 989 + /* If USB fails, there is nothing to do */ 990 + if (ret < 0) 991 + return ret; 1136 992 1137 993 /* Issue write/erase enable command */ 1138 994 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_; 1139 995 ret = lan78xx_write_reg(dev, E2P_CMD, val); 1140 - if (unlikely(ret < 0)) { 1141 - retval = -EIO; 1142 - goto exit; 1143 - } 996 + if (ret < 0) 997 + return ret; 1144 998 1145 - retval = lan78xx_wait_eeprom(dev); 1146 - if (retval < 0) 1147 - goto exit; 999 + ret = lan78xx_wait_eeprom(dev); 1000 + /* Looks like not USB specific error, try to recover */ 1001 + if (ret == -ETIMEDOUT) 1002 + goto write_raw_eeprom_done; 1003 + /* If USB fails, there is nothing to do */ 1004 + if (ret < 0) 1005 + return ret; 1148 1006 1149 1007 for (i = 0; i < length; i++) { 1150 1008 /* Fill data register */ 1151 1009 val = data[i]; 1152 1010 ret = lan78xx_write_reg(dev, E2P_DATA, val); 1153 - if (ret < 0) { 1154 - retval = -EIO; 1155 - goto exit; 1156 - } 1011 + if (ret < 0) 1012 + return ret; 1157 1013 1158 1014 /* Send "write" command */ 1159 1015 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_; 1160 1016 val |= (offset & E2P_CMD_EPC_ADDR_MASK_); 1161 1017 ret = lan78xx_write_reg(dev, E2P_CMD, val); 1162 - if (ret < 0) { 1163 - retval = -EIO; 1164 - goto exit; 1165 - } 1018 + if (ret < 0) 1019 + return ret; 1166 1020 1167 - retval = lan78xx_wait_eeprom(dev); 1168 - if (retval < 0) 1169 - goto exit; 1021 + ret = lan78xx_wait_eeprom(dev); 1022 + /* Looks like not USB specific error, try to recover */ 1023 + if (ret == -ETIMEDOUT) 1024 + goto write_raw_eeprom_done; 1025 + /* If USB fails, there is nothing to do */ 1026 + if (ret < 0) 1027 + return ret; 1170 1028 1171 1029 offset++; 1172 1030 } 1173 1031 1174 - retval = 0; 1175 - exit: 1032 + write_raw_eeprom_done: 1176 1033 if (dev->chipid == ID_REV_CHIP_ID_7800_) 1177 - ret = lan78xx_write_reg(dev, HW_CFG, saved); 1034 + return lan78xx_write_reg(dev, HW_CFG, saved); 1178 1035 1179 - return retval; 1036 + return 0; 1180 1037 } 1181 1038 1182 1039 static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset, 1183 1040 u32 length, u8 *data) 1184 1041 { 1185 - int i; 1186 - u32 buf; 1187 1042 unsigned long timeout; 1043 + int ret, i; 1044 + u32 buf; 1188 1045 1189 - lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1046 + ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1047 + if (ret < 0) 1048 + return ret; 1190 1049 1191 1050 if (buf & OTP_PWR_DN_PWRDN_N_) { 1192 1051 /* clear it and wait to be cleared */ 1193 - lan78xx_write_reg(dev, OTP_PWR_DN, 0); 1052 + ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0); 1053 + if (ret < 0) 1054 + return ret; 1194 1055 1195 1056 timeout = jiffies + HZ; 1196 1057 do { 1197 1058 usleep_range(1, 10); 1198 - lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1059 + ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1060 + if (ret < 0) 1061 + return ret; 1062 + 1199 1063 if (time_after(jiffies, timeout)) { 1200 1064 netdev_warn(dev->net, 1201 1065 "timeout on OTP_PWR_DN"); 1202 - return -EIO; 1066 + return -ETIMEDOUT; 1203 1067 } 1204 1068 } while (buf & OTP_PWR_DN_PWRDN_N_); 1205 1069 } 1206 1070 1207 1071 for (i = 0; i < length; i++) { 1208 - lan78xx_write_reg(dev, OTP_ADDR1, 1209 - ((offset + i) >> 8) & OTP_ADDR1_15_11); 1210 - lan78xx_write_reg(dev, OTP_ADDR2, 1211 - ((offset + i) & OTP_ADDR2_10_3)); 1072 + ret = lan78xx_write_reg(dev, OTP_ADDR1, 1073 + ((offset + i) >> 8) & OTP_ADDR1_15_11); 1074 + if (ret < 0) 1075 + return ret; 1212 1076 1213 - lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_); 1214 - lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_); 1077 + ret = lan78xx_write_reg(dev, OTP_ADDR2, 1078 + ((offset + i) & OTP_ADDR2_10_3)); 1079 + if (ret < 0) 1080 + return ret; 1081 + 1082 + ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_); 1083 + if (ret < 0) 1084 + return ret; 1085 + 1086 + ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_); 1087 + if (ret < 0) 1088 + return ret; 1215 1089 1216 1090 timeout = jiffies + HZ; 1217 1091 do { 1218 1092 udelay(1); 1219 - lan78xx_read_reg(dev, OTP_STATUS, &buf); 1093 + ret = lan78xx_read_reg(dev, OTP_STATUS, &buf); 1094 + if (ret < 0) 1095 + return ret; 1096 + 1220 1097 if (time_after(jiffies, timeout)) { 1221 1098 netdev_warn(dev->net, 1222 1099 "timeout on OTP_STATUS"); 1223 - return -EIO; 1100 + return -ETIMEDOUT; 1224 1101 } 1225 1102 } while (buf & OTP_STATUS_BUSY_); 1226 1103 1227 - lan78xx_read_reg(dev, OTP_RD_DATA, &buf); 1104 + ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf); 1105 + if (ret < 0) 1106 + return ret; 1228 1107 1229 1108 data[i] = (u8)(buf & 0xFF); 1230 1109 } ··· 1269 1086 int i; 1270 1087 u32 buf; 1271 1088 unsigned long timeout; 1089 + int ret; 1272 1090 1273 - lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1091 + ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1092 + if (ret < 0) 1093 + return ret; 1274 1094 1275 1095 if (buf & OTP_PWR_DN_PWRDN_N_) { 1276 1096 /* clear it and wait to be cleared */ 1277 - lan78xx_write_reg(dev, OTP_PWR_DN, 0); 1097 + ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0); 1098 + if (ret < 0) 1099 + return ret; 1278 1100 1279 1101 timeout = jiffies + HZ; 1280 1102 do { 1281 1103 udelay(1); 1282 - lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1104 + ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1105 + if (ret < 0) 1106 + return ret; 1107 + 1283 1108 if (time_after(jiffies, timeout)) { 1284 1109 netdev_warn(dev->net, 1285 1110 "timeout on OTP_PWR_DN completion"); 1286 - return -EIO; 1111 + return -ETIMEDOUT; 1287 1112 } 1288 1113 } while (buf & OTP_PWR_DN_PWRDN_N_); 1289 1114 } 1290 1115 1291 1116 /* set to BYTE program mode */ 1292 - lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_); 1117 + ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_); 1118 + if (ret < 0) 1119 + return ret; 1293 1120 1294 1121 for (i = 0; i < length; i++) { 1295 - lan78xx_write_reg(dev, OTP_ADDR1, 1296 - ((offset + i) >> 8) & OTP_ADDR1_15_11); 1297 - lan78xx_write_reg(dev, OTP_ADDR2, 1298 - ((offset + i) & OTP_ADDR2_10_3)); 1299 - lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]); 1300 - lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_); 1301 - lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_); 1122 + ret = lan78xx_write_reg(dev, OTP_ADDR1, 1123 + ((offset + i) >> 8) & OTP_ADDR1_15_11); 1124 + if (ret < 0) 1125 + return ret; 1126 + 1127 + ret = lan78xx_write_reg(dev, OTP_ADDR2, 1128 + ((offset + i) & OTP_ADDR2_10_3)); 1129 + if (ret < 0) 1130 + return ret; 1131 + 1132 + ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]); 1133 + if (ret < 0) 1134 + return ret; 1135 + 1136 + ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_); 1137 + if (ret < 0) 1138 + return ret; 1139 + 1140 + ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_); 1141 + if (ret < 0) 1142 + return ret; 1302 1143 1303 1144 timeout = jiffies + HZ; 1304 1145 do { 1305 1146 udelay(1); 1306 - lan78xx_read_reg(dev, OTP_STATUS, &buf); 1147 + ret = lan78xx_read_reg(dev, OTP_STATUS, &buf); 1148 + if (ret < 0) 1149 + return ret; 1150 + 1307 1151 if (time_after(jiffies, timeout)) { 1308 1152 netdev_warn(dev->net, 1309 1153 "Timeout on OTP_STATUS completion"); 1310 - return -EIO; 1154 + return -ETIMEDOUT; 1311 1155 } 1312 1156 } while (buf & OTP_STATUS_BUSY_); 1313 1157 } ··· 1371 1161 1372 1162 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel); 1373 1163 if (unlikely(ret < 0)) 1374 - return -EIO; 1164 + return ret; 1375 1165 1376 1166 if (dp_sel & DP_SEL_DPRDY_) 1377 1167 return 0; ··· 1381 1171 1382 1172 netdev_warn(dev->net, "%s timed out", __func__); 1383 1173 1384 - return -EIO; 1174 + return -ETIMEDOUT; 1385 1175 } 1386 1176 1387 1177 static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select, 1388 1178 u32 addr, u32 length, u32 *buf) 1389 1179 { 1390 1180 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1391 - u32 dp_sel; 1392 1181 int i, ret; 1393 1182 1394 - if (usb_autopm_get_interface(dev->intf) < 0) 1395 - return 0; 1183 + ret = usb_autopm_get_interface(dev->intf); 1184 + if (ret < 0) 1185 + return ret; 1396 1186 1397 1187 mutex_lock(&pdata->dataport_mutex); 1398 1188 1399 1189 ret = lan78xx_dataport_wait_not_busy(dev); 1400 1190 if (ret < 0) 1401 - goto done; 1191 + goto dataport_write; 1402 1192 1403 - ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel); 1404 - 1405 - dp_sel &= ~DP_SEL_RSEL_MASK_; 1406 - dp_sel |= ram_select; 1407 - ret = lan78xx_write_reg(dev, DP_SEL, dp_sel); 1193 + ret = lan78xx_update_reg(dev, DP_SEL, DP_SEL_RSEL_MASK_, ram_select); 1194 + if (ret < 0) 1195 + goto dataport_write; 1408 1196 1409 1197 for (i = 0; i < length; i++) { 1410 1198 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i); 1199 + if (ret < 0) 1200 + goto dataport_write; 1411 1201 1412 1202 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]); 1203 + if (ret < 0) 1204 + goto dataport_write; 1413 1205 1414 1206 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_); 1207 + if (ret < 0) 1208 + goto dataport_write; 1415 1209 1416 1210 ret = lan78xx_dataport_wait_not_busy(dev); 1417 1211 if (ret < 0) 1418 - goto done; 1212 + goto dataport_write; 1419 1213 } 1420 1214 1421 - done: 1215 + dataport_write: 1216 + if (ret < 0) 1217 + netdev_warn(dev->net, "dataport write failed %pe", ERR_PTR(ret)); 1218 + 1422 1219 mutex_unlock(&pdata->dataport_mutex); 1423 1220 usb_autopm_put_interface(dev->intf); 1424 1221 ··· 1461 1244 struct lan78xx_priv *pdata = 1462 1245 container_of(param, struct lan78xx_priv, set_multicast); 1463 1246 struct lan78xx_net *dev = pdata->dev; 1464 - int i; 1247 + int i, ret; 1465 1248 1466 1249 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n", 1467 1250 pdata->rfe_ctl); 1468 1251 1469 - lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, DP_SEL_VHF_VLAN_LEN, 1470 - DP_SEL_VHF_HASH_LEN, pdata->mchash_table); 1252 + ret = lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 1253 + DP_SEL_VHF_VLAN_LEN, 1254 + DP_SEL_VHF_HASH_LEN, pdata->mchash_table); 1255 + if (ret < 0) 1256 + goto multicast_write_done; 1471 1257 1472 1258 for (i = 1; i < NUM_OF_MAF; i++) { 1473 - lan78xx_write_reg(dev, MAF_HI(i), 0); 1474 - lan78xx_write_reg(dev, MAF_LO(i), 1475 - pdata->pfilter_table[i][1]); 1476 - lan78xx_write_reg(dev, MAF_HI(i), 1477 - pdata->pfilter_table[i][0]); 1259 + ret = lan78xx_write_reg(dev, MAF_HI(i), 0); 1260 + if (ret < 0) 1261 + goto multicast_write_done; 1262 + 1263 + ret = lan78xx_write_reg(dev, MAF_LO(i), 1264 + pdata->pfilter_table[i][1]); 1265 + if (ret < 0) 1266 + goto multicast_write_done; 1267 + 1268 + ret = lan78xx_write_reg(dev, MAF_HI(i), 1269 + pdata->pfilter_table[i][0]); 1270 + if (ret < 0) 1271 + goto multicast_write_done; 1478 1272 } 1479 1273 1480 - lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 1274 + ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 1275 + 1276 + multicast_write_done: 1277 + if (ret < 0) 1278 + netdev_warn(dev->net, "multicast write failed %pe", ERR_PTR(ret)); 1279 + return; 1481 1280 } 1482 1281 1483 1282 static void lan78xx_set_multicast(struct net_device *netdev) ··· 2223 1990 /* set the address, index & direction (read from PHY) */ 2224 1991 addr = mii_access(phy_id, idx, MII_READ); 2225 1992 ret = lan78xx_write_reg(dev, MII_ACC, addr); 1993 + if (ret < 0) 1994 + goto done; 2226 1995 2227 1996 ret = lan78xx_phy_wait_not_busy(dev); 2228 1997 if (ret < 0) 2229 1998 goto done; 2230 1999 2231 2000 ret = lan78xx_read_reg(dev, MII_DATA, &val); 2001 + if (ret < 0) 2002 + goto done; 2232 2003 2233 2004 ret = (int)(val & 0xFFFF); 2234 2005 ··· 2263 2026 2264 2027 val = (u32)regval; 2265 2028 ret = lan78xx_write_reg(dev, MII_DATA, val); 2029 + if (ret < 0) 2030 + goto done; 2266 2031 2267 2032 /* set the address, index & direction (write to PHY) */ 2268 2033 addr = mii_access(phy_id, idx, MII_WRITE); 2269 2034 ret = lan78xx_write_reg(dev, MII_ACC, addr); 2035 + if (ret < 0) 2036 + goto done; 2270 2037 2271 2038 ret = lan78xx_phy_wait_not_busy(dev); 2272 2039 if (ret < 0) ··· 2279 2038 done: 2280 2039 mutex_unlock(&dev->phy_mutex); 2281 2040 usb_autopm_put_interface(dev->intf); 2282 - return 0; 2041 + return ret; 2283 2042 } 2284 2043 2285 2044 static int lan78xx_mdio_init(struct lan78xx_net *dev) ··· 2405 2164 struct lan78xx_net *dev = 2406 2165 container_of(data, struct lan78xx_net, domain_data); 2407 2166 u32 buf; 2167 + int ret; 2408 2168 2409 2169 /* call register access here because irq_bus_lock & irq_bus_sync_unlock 2410 2170 * are only two callbacks executed in non-atomic contex. 2411 2171 */ 2412 - lan78xx_read_reg(dev, INT_EP_CTL, &buf); 2172 + ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf); 2173 + if (ret < 0) 2174 + goto irq_bus_sync_unlock; 2175 + 2413 2176 if (buf != data->irqenable) 2414 - lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable); 2177 + ret = lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable); 2178 + 2179 + irq_bus_sync_unlock: 2180 + if (ret < 0) 2181 + netdev_err(dev->net, "Failed to sync IRQ enable register: %pe\n", 2182 + ERR_PTR(ret)); 2415 2183 2416 2184 mutex_unlock(&data->irq_lock); 2417 2185 } ··· 2484 2234 dev->domain_data.irqdomain = NULL; 2485 2235 } 2486 2236 2487 - static int lan8835_fixup(struct phy_device *phydev) 2488 - { 2489 - int buf; 2490 - struct lan78xx_net *dev = netdev_priv(phydev->attached_dev); 2491 - 2492 - /* LED2/PME_N/IRQ_N/RGMII_ID pin to IRQ_N mode */ 2493 - buf = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8010); 2494 - buf &= ~0x1800; 2495 - buf |= 0x0800; 2496 - phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8010, buf); 2497 - 2498 - /* RGMII MAC TXC Delay Enable */ 2499 - lan78xx_write_reg(dev, MAC_RGMII_ID, 2500 - MAC_RGMII_ID_TXC_DELAY_EN_); 2501 - 2502 - /* RGMII TX DLL Tune Adjust */ 2503 - lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00); 2504 - 2505 - dev->interface = PHY_INTERFACE_MODE_RGMII_TXID; 2506 - 2507 - return 1; 2508 - } 2509 - 2510 - static int ksz9031rnx_fixup(struct phy_device *phydev) 2511 - { 2512 - struct lan78xx_net *dev = netdev_priv(phydev->attached_dev); 2513 - 2514 - /* Micrel9301RNX PHY configuration */ 2515 - /* RGMII Control Signal Pad Skew */ 2516 - phy_write_mmd(phydev, MDIO_MMD_WIS, 4, 0x0077); 2517 - /* RGMII RX Data Pad Skew */ 2518 - phy_write_mmd(phydev, MDIO_MMD_WIS, 5, 0x7777); 2519 - /* RGMII RX Clock Pad Skew */ 2520 - phy_write_mmd(phydev, MDIO_MMD_WIS, 8, 0x1FF); 2521 - 2522 - dev->interface = PHY_INTERFACE_MODE_RGMII_RXID; 2523 - 2524 - return 1; 2525 - } 2526 - 2527 2237 static struct phy_device *lan7801_phy_init(struct lan78xx_net *dev) 2528 2238 { 2529 2239 u32 buf; ··· 2517 2307 netdev_err(dev->net, "no PHY driver found\n"); 2518 2308 return NULL; 2519 2309 } 2520 - dev->interface = PHY_INTERFACE_MODE_RGMII; 2521 - /* external PHY fixup for KSZ9031RNX */ 2522 - ret = phy_register_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0, 2523 - ksz9031rnx_fixup); 2524 - if (ret < 0) { 2525 - netdev_err(dev->net, "Failed to register fixup for PHY_KSZ9031RNX\n"); 2526 - return NULL; 2527 - } 2528 - /* external PHY fixup for LAN8835 */ 2529 - ret = phy_register_fixup_for_uid(PHY_LAN8835, 0xfffffff0, 2530 - lan8835_fixup); 2531 - if (ret < 0) { 2532 - netdev_err(dev->net, "Failed to register fixup for PHY_LAN8835\n"); 2533 - return NULL; 2534 - } 2535 - /* add more external PHY fixup here if needed */ 2310 + dev->interface = PHY_INTERFACE_MODE_RGMII_ID; 2311 + /* The PHY driver is responsible to configure proper RGMII 2312 + * interface delays. Disable RGMII delays on MAC side. 2313 + */ 2314 + lan78xx_write_reg(dev, MAC_RGMII_ID, 0); 2536 2315 2537 2316 phydev->is_internal = false; 2538 2317 } ··· 2580 2381 if (phy_is_pseudo_fixed_link(phydev)) { 2581 2382 fixed_phy_unregister(phydev); 2582 2383 phy_device_free(phydev); 2583 - } else { 2584 - phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 2585 - 0xfffffff0); 2586 - phy_unregister_fixup_for_uid(PHY_LAN8835, 2587 - 0xfffffff0); 2588 2384 } 2589 2385 } 2590 2386 return -EIO; ··· 2631 2437 2632 2438 static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size) 2633 2439 { 2634 - u32 buf; 2635 2440 bool rxenabled; 2441 + u32 buf; 2442 + int ret; 2636 2443 2637 - lan78xx_read_reg(dev, MAC_RX, &buf); 2444 + ret = lan78xx_read_reg(dev, MAC_RX, &buf); 2445 + if (ret < 0) 2446 + return ret; 2638 2447 2639 2448 rxenabled = ((buf & MAC_RX_RXEN_) != 0); 2640 2449 2641 2450 if (rxenabled) { 2642 2451 buf &= ~MAC_RX_RXEN_; 2643 - lan78xx_write_reg(dev, MAC_RX, buf); 2452 + ret = lan78xx_write_reg(dev, MAC_RX, buf); 2453 + if (ret < 0) 2454 + return ret; 2644 2455 } 2645 2456 2646 2457 /* add 4 to size for FCS */ 2647 2458 buf &= ~MAC_RX_MAX_SIZE_MASK_; 2648 2459 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_); 2649 2460 2650 - lan78xx_write_reg(dev, MAC_RX, buf); 2461 + ret = lan78xx_write_reg(dev, MAC_RX, buf); 2462 + if (ret < 0) 2463 + return ret; 2651 2464 2652 2465 if (rxenabled) { 2653 2466 buf |= MAC_RX_RXEN_; 2654 - lan78xx_write_reg(dev, MAC_RX, buf); 2467 + ret = lan78xx_write_reg(dev, MAC_RX, buf); 2468 + if (ret < 0) 2469 + return ret; 2655 2470 } 2656 2471 2657 2472 return 0; ··· 2726 2523 return ret; 2727 2524 2728 2525 ret = lan78xx_set_rx_max_frame_length(dev, max_frame_len); 2729 - if (!ret) 2526 + if (ret < 0) 2527 + netdev_err(dev->net, "MTU changed to %d from %d failed with %pe\n", 2528 + new_mtu, netdev->mtu, ERR_PTR(ret)); 2529 + else 2730 2530 WRITE_ONCE(netdev->mtu, new_mtu); 2731 2531 2732 2532 usb_autopm_put_interface(dev->intf); ··· 2851 2645 return 0; 2852 2646 } 2853 2647 2854 - static void lan78xx_init_ltm(struct lan78xx_net *dev) 2648 + static int lan78xx_init_ltm(struct lan78xx_net *dev) 2855 2649 { 2650 + u32 regs[6] = { 0 }; 2856 2651 int ret; 2857 2652 u32 buf; 2858 - u32 regs[6] = { 0 }; 2859 2653 2860 2654 ret = lan78xx_read_reg(dev, USB_CFG1, &buf); 2655 + if (ret < 0) 2656 + goto init_ltm_failed; 2657 + 2861 2658 if (buf & USB_CFG1_LTM_ENABLE_) { 2862 2659 u8 temp[2]; 2863 2660 /* Get values from EEPROM first */ ··· 2871 2662 24, 2872 2663 (u8 *)regs); 2873 2664 if (ret < 0) 2874 - return; 2665 + return ret; 2875 2666 } 2876 2667 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) { 2877 2668 if (temp[0] == 24) { ··· 2880 2671 24, 2881 2672 (u8 *)regs); 2882 2673 if (ret < 0) 2883 - return; 2674 + return ret; 2884 2675 } 2885 2676 } 2886 2677 } 2887 2678 2888 - lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]); 2889 - lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]); 2890 - lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]); 2891 - lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]); 2892 - lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]); 2893 - lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]); 2679 + ret = lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]); 2680 + if (ret < 0) 2681 + goto init_ltm_failed; 2682 + 2683 + ret = lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]); 2684 + if (ret < 0) 2685 + goto init_ltm_failed; 2686 + 2687 + ret = lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]); 2688 + if (ret < 0) 2689 + goto init_ltm_failed; 2690 + 2691 + ret = lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]); 2692 + if (ret < 0) 2693 + goto init_ltm_failed; 2694 + 2695 + ret = lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]); 2696 + if (ret < 0) 2697 + goto init_ltm_failed; 2698 + 2699 + ret = lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]); 2700 + if (ret < 0) 2701 + goto init_ltm_failed; 2702 + 2703 + return 0; 2704 + 2705 + init_ltm_failed: 2706 + netdev_err(dev->net, "Failed to init LTM with error %pe\n", ERR_PTR(ret)); 2707 + return ret; 2894 2708 } 2895 2709 2896 2710 static int lan78xx_urb_config_init(struct lan78xx_net *dev) ··· 2952 2720 } 2953 2721 2954 2722 return result; 2955 - } 2956 - 2957 - static int lan78xx_start_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enable) 2958 - { 2959 - return lan78xx_update_reg(dev, reg, hw_enable, hw_enable); 2960 - } 2961 - 2962 - static int lan78xx_stop_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enabled, 2963 - u32 hw_disabled) 2964 - { 2965 - unsigned long timeout; 2966 - bool stopped = true; 2967 - int ret; 2968 - u32 buf; 2969 - 2970 - /* Stop the h/w block (if not already stopped) */ 2971 - 2972 - ret = lan78xx_read_reg(dev, reg, &buf); 2973 - if (ret < 0) 2974 - return ret; 2975 - 2976 - if (buf & hw_enabled) { 2977 - buf &= ~hw_enabled; 2978 - 2979 - ret = lan78xx_write_reg(dev, reg, buf); 2980 - if (ret < 0) 2981 - return ret; 2982 - 2983 - stopped = false; 2984 - timeout = jiffies + HW_DISABLE_TIMEOUT; 2985 - do { 2986 - ret = lan78xx_read_reg(dev, reg, &buf); 2987 - if (ret < 0) 2988 - return ret; 2989 - 2990 - if (buf & hw_disabled) 2991 - stopped = true; 2992 - else 2993 - msleep(HW_DISABLE_DELAY_MS); 2994 - } while (!stopped && !time_after(jiffies, timeout)); 2995 - } 2996 - 2997 - ret = stopped ? 0 : -ETIME; 2998 - 2999 - return ret; 3000 - } 3001 - 3002 - static int lan78xx_flush_fifo(struct lan78xx_net *dev, u32 reg, u32 fifo_flush) 3003 - { 3004 - return lan78xx_update_reg(dev, reg, fifo_flush, fifo_flush); 3005 - } 3006 - 3007 - static int lan78xx_start_tx_path(struct lan78xx_net *dev) 3008 - { 3009 - int ret; 3010 - 3011 - netif_dbg(dev, drv, dev->net, "start tx path"); 3012 - 3013 - /* Start the MAC transmitter */ 3014 - 3015 - ret = lan78xx_start_hw(dev, MAC_TX, MAC_TX_TXEN_); 3016 - if (ret < 0) 3017 - return ret; 3018 - 3019 - /* Start the Tx FIFO */ 3020 - 3021 - ret = lan78xx_start_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_); 3022 - if (ret < 0) 3023 - return ret; 3024 - 3025 - return 0; 3026 - } 3027 - 3028 - static int lan78xx_stop_tx_path(struct lan78xx_net *dev) 3029 - { 3030 - int ret; 3031 - 3032 - netif_dbg(dev, drv, dev->net, "stop tx path"); 3033 - 3034 - /* Stop the Tx FIFO */ 3035 - 3036 - ret = lan78xx_stop_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_, FCT_TX_CTL_DIS_); 3037 - if (ret < 0) 3038 - return ret; 3039 - 3040 - /* Stop the MAC transmitter */ 3041 - 3042 - ret = lan78xx_stop_hw(dev, MAC_TX, MAC_TX_TXEN_, MAC_TX_TXD_); 3043 - if (ret < 0) 3044 - return ret; 3045 - 3046 - return 0; 3047 - } 3048 - 3049 - /* The caller must ensure the Tx path is stopped before calling 3050 - * lan78xx_flush_tx_fifo(). 3051 - */ 3052 - static int lan78xx_flush_tx_fifo(struct lan78xx_net *dev) 3053 - { 3054 - return lan78xx_flush_fifo(dev, FCT_TX_CTL, FCT_TX_CTL_RST_); 3055 - } 3056 - 3057 - static int lan78xx_start_rx_path(struct lan78xx_net *dev) 3058 - { 3059 - int ret; 3060 - 3061 - netif_dbg(dev, drv, dev->net, "start rx path"); 3062 - 3063 - /* Start the Rx FIFO */ 3064 - 3065 - ret = lan78xx_start_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_); 3066 - if (ret < 0) 3067 - return ret; 3068 - 3069 - /* Start the MAC receiver*/ 3070 - 3071 - ret = lan78xx_start_hw(dev, MAC_RX, MAC_RX_RXEN_); 3072 - if (ret < 0) 3073 - return ret; 3074 - 3075 - return 0; 3076 - } 3077 - 3078 - static int lan78xx_stop_rx_path(struct lan78xx_net *dev) 3079 - { 3080 - int ret; 3081 - 3082 - netif_dbg(dev, drv, dev->net, "stop rx path"); 3083 - 3084 - /* Stop the MAC receiver */ 3085 - 3086 - ret = lan78xx_stop_hw(dev, MAC_RX, MAC_RX_RXEN_, MAC_RX_RXD_); 3087 - if (ret < 0) 3088 - return ret; 3089 - 3090 - /* Stop the Rx FIFO */ 3091 - 3092 - ret = lan78xx_stop_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_, FCT_RX_CTL_DIS_); 3093 - if (ret < 0) 3094 - return ret; 3095 - 3096 - return 0; 3097 - } 3098 - 3099 - /* The caller must ensure the Rx path is stopped before calling 3100 - * lan78xx_flush_rx_fifo(). 3101 - */ 3102 - static int lan78xx_flush_rx_fifo(struct lan78xx_net *dev) 3103 - { 3104 - return lan78xx_flush_fifo(dev, FCT_RX_CTL, FCT_RX_CTL_RST_); 3105 2723 } 3106 2724 3107 2725 static int lan78xx_reset(struct lan78xx_net *dev) ··· 3009 2927 return ret; 3010 2928 3011 2929 /* Init LTM */ 3012 - lan78xx_init_ltm(dev); 2930 + ret = lan78xx_init_ltm(dev); 2931 + if (ret < 0) 2932 + return ret; 3013 2933 3014 2934 ret = lan78xx_write_reg(dev, BURST_CAP, dev->burst_cap); 3015 2935 if (ret < 0) ··· 4325 4241 cancel_delayed_work_sync(&dev->wq); 4326 4242 4327 4243 phydev = net->phydev; 4328 - 4329 - phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0); 4330 - phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0); 4331 4244 4332 4245 phy_disconnect(net->phydev); 4333 4246

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