tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

RDMA/mlx5: Take qp type from mlx5_ib_qp

Change all the places in the mlx5_ib driver to take the qp type from the
mlx5_ib_qp struct, except the QP initialization flow. It will ensure that
we check the right QP type also for vendor specific QPs.

Link: https://lore.kernel.org/r/b2e16cd65b59cd24fa81c01c7989248da44e58ea.1621413899.git.leonro@nvidia.com
Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

authored by

Maor Gottlieb and committed by
Jason Gunthorpe 9ecf6ac1 331859d3

+31 -36
+1 -1
drivers/infiniband/hw/mlx5/cq.c
··· 227 227 wc->dlid_path_bits = cqe->ml_path; 228 228 g = (be32_to_cpu(cqe->flags_rqpn) >> 28) & 3; 229 229 wc->wc_flags |= g ? IB_WC_GRH : 0; 230 - if (unlikely(is_qp1(qp->ibqp.qp_type))) { 230 + if (is_qp1(qp->type)) { 231 231 u16 pkey = be32_to_cpu(cqe->pkey) & 0xffff; 232 232 233 233 ib_find_cached_pkey(&dev->ib_dev, qp->port, pkey,
-1
drivers/infiniband/hw/mlx5/mlx5_ib.h
··· 512 512 /* 513 513 * IB/core doesn't store low-level QP types, so 514 514 * store both MLX and IBTA types in the field below. 515 - * IB_QPT_DRIVER will be break to DCI/DCT subtypes. 516 515 */ 517 516 enum ib_qp_type type; 518 517 /* A flag to indicate if there's a new counter is configured
+1 -1
drivers/infiniband/hw/mlx5/odp.c
··· 1095 1095 opcode = be32_to_cpu(ctrl->opmod_idx_opcode) & 1096 1096 MLX5_WQE_CTRL_OPCODE_MASK; 1097 1097 1098 - if (qp->ibqp.qp_type == IB_QPT_XRC_INI) 1098 + if (qp->type == IB_QPT_XRC_INI) 1099 1099 *wqe += sizeof(struct mlx5_wqe_xrc_seg); 1100 1100 1101 1101 if (qp->type == IB_QPT_UD || qp->type == MLX5_IB_QPT_DCI) {
+25 -28
drivers/infiniband/hw/mlx5/qp.c
··· 3089 3089 struct mlx5_ib_dev *dev = to_mdev(qp->device); 3090 3090 struct mlx5_ib_qp *mqp = to_mqp(qp); 3091 3091 3092 - if (unlikely(qp->qp_type == IB_QPT_GSI)) 3092 + if (mqp->type == IB_QPT_GSI) 3093 3093 return mlx5_ib_destroy_gsi(mqp); 3094 3094 3095 3095 if (mqp->type == MLX5_IB_QPT_DCT) ··· 3128 3128 if (access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3129 3129 int atomic_mode; 3130 3130 3131 - atomic_mode = get_atomic_mode(dev, qp->ibqp.qp_type); 3131 + atomic_mode = get_atomic_mode(dev, qp->type); 3132 3132 if (atomic_mode < 0) 3133 3133 return -EOPNOTSUPP; 3134 3134 ··· 3300 3300 3301 3301 ether_addr_copy(MLX5_ADDR_OF(ads, path, rmac_47_32), 3302 3302 ah->roce.dmac); 3303 - if ((qp->ibqp.qp_type == IB_QPT_RC || 3304 - qp->ibqp.qp_type == IB_QPT_UC || 3305 - qp->ibqp.qp_type == IB_QPT_XRC_INI || 3306 - qp->ibqp.qp_type == IB_QPT_XRC_TGT) && 3303 + if ((qp->type == IB_QPT_RC || 3304 + qp->type == IB_QPT_UC || 3305 + qp->type == IB_QPT_XRC_INI || 3306 + qp->type == IB_QPT_XRC_TGT) && 3307 3307 (grh->sgid_attr->gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) && 3308 3308 (attr_mask & IB_QP_DEST_QPN)) 3309 3309 mlx5_set_path_udp_sport(path, ah, ··· 3342 3342 MLX5_SET(ads, path, ack_timeout, 3343 3343 alt ? attr->alt_timeout : attr->timeout); 3344 3344 3345 - if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 3345 + if ((qp->type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 3346 3346 return modify_raw_packet_eth_prio(dev->mdev, 3347 3347 &qp->raw_packet_qp.sq, 3348 3348 sl & 0xf, qp->ibqp.pd); ··· 3922 3922 MLX5_CAP_GEN(dev->mdev, init2_lag_tx_port_affinity)) 3923 3923 optpar |= MLX5_QP_OPTPAR_LAG_TX_AFF; 3924 3924 3925 - if (is_sqp(ibqp->qp_type)) { 3925 + if (is_sqp(qp->type)) { 3926 3926 MLX5_SET(qpc, qpc, mtu, IB_MTU_256); 3927 3927 MLX5_SET(qpc, qpc, log_msg_max, 8); 3928 - } else if ((ibqp->qp_type == IB_QPT_UD && 3928 + } else if ((qp->type == IB_QPT_UD && 3929 3929 !(qp->flags & IB_QP_CREATE_SOURCE_QPN)) || 3930 - ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 3930 + qp->type == MLX5_IB_QPT_REG_UMR) { 3931 3931 MLX5_SET(qpc, qpc, mtu, IB_MTU_4096); 3932 3932 MLX5_SET(qpc, qpc, log_msg_max, 12); 3933 3933 } else if (attr_mask & IB_QP_PATH_MTU) { ··· 3953 3953 3954 3954 /* todo implement counter_index functionality */ 3955 3955 3956 - if (is_sqp(ibqp->qp_type)) 3956 + if (is_sqp(qp->type)) 3957 3957 MLX5_SET(ads, pri_path, vhca_port_num, qp->port); 3958 3958 3959 3959 if (attr_mask & IB_QP_PORT) ··· 3981 3981 goto out; 3982 3982 } 3983 3983 3984 - get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 3984 + get_cqs(qp->type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 3985 3985 &send_cq, &recv_cq); 3986 3986 3987 3987 MLX5_SET(qpc, qpc, pd, pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); ··· 4060 4060 optpar |= ib_mask_to_mlx5_opt(attr_mask); 4061 4061 optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 4062 4062 4063 - if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 4063 + if (qp->type == IB_QPT_RAW_PACKET || 4064 4064 qp->flags & IB_QP_CREATE_SOURCE_QPN) { 4065 4065 struct mlx5_modify_raw_qp_param raw_qp_param = {}; 4066 4066 ··· 4133 4133 * entries and reinitialize the QP. 4134 4134 */ 4135 4135 if (new_state == IB_QPS_RESET && 4136 - !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 4136 + !ibqp->uobject && qp->type != IB_QPT_XRC_TGT) { 4137 4137 mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 4138 4138 ibqp->srq ? to_msrq(ibqp->srq) : NULL); 4139 4139 if (send_cq != recv_cq) ··· 4326 4326 } 4327 4327 4328 4328 static bool mlx5_ib_modify_qp_allowed(struct mlx5_ib_dev *dev, 4329 - struct mlx5_ib_qp *qp, 4330 - enum ib_qp_type qp_type) 4329 + struct mlx5_ib_qp *qp) 4331 4330 { 4332 4331 if (dev->profile != &raw_eth_profile) 4333 4332 return true; 4334 4333 4335 - if (qp_type == IB_QPT_RAW_PACKET || qp_type == MLX5_IB_QPT_REG_UMR) 4334 + if (qp->type == IB_QPT_RAW_PACKET || qp->type == MLX5_IB_QPT_REG_UMR) 4336 4335 return true; 4337 4336 4338 4337 /* Internal QP used for wc testing, with NOPs in wq */ ··· 4352 4353 enum ib_qp_state cur_state, new_state; 4353 4354 int err = -EINVAL; 4354 4355 4355 - if (!mlx5_ib_modify_qp_allowed(dev, qp, ibqp->qp_type)) 4356 + if (!mlx5_ib_modify_qp_allowed(dev, qp)) 4356 4357 return -EOPNOTSUPP; 4357 4358 4358 4359 if (attr_mask & ~(IB_QP_ATTR_STANDARD_BITS | IB_QP_RATE_LIMIT)) ··· 4381 4382 4382 4383 } 4383 4384 4384 - if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4385 + if (qp->type == IB_QPT_GSI) 4385 4386 return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 4386 4387 4387 - qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? IB_QPT_GSI : 4388 - qp->type; 4388 + qp_type = (qp->type == MLX5_IB_QPT_HW_GSI) ? IB_QPT_GSI : qp->type; 4389 4389 4390 4390 if (qp_type == MLX5_IB_QPT_DCT) 4391 4391 return mlx5_ib_modify_dct(ibqp, attr, attr_mask, &ucmd, udata); ··· 4405 4407 !ib_modify_qp_is_ok(cur_state, new_state, qp_type, 4406 4408 attr_mask)) { 4407 4409 mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 4408 - cur_state, new_state, ibqp->qp_type, attr_mask); 4410 + cur_state, new_state, qp->type, attr_mask); 4409 4411 goto out; 4410 4412 } else if (qp_type == MLX5_IB_QPT_DCI && 4411 4413 !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { ··· 4678 4680 pri_path = MLX5_ADDR_OF(qpc, qpc, primary_address_path); 4679 4681 alt_path = MLX5_ADDR_OF(qpc, qpc, secondary_address_path); 4680 4682 4681 - if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC || 4682 - qp->ibqp.qp_type == IB_QPT_XRC_INI || 4683 - qp->ibqp.qp_type == IB_QPT_XRC_TGT) { 4683 + if (qp->type == IB_QPT_RC || qp->type == IB_QPT_UC || 4684 + qp->type == IB_QPT_XRC_INI || qp->type == IB_QPT_XRC_TGT) { 4684 4685 to_rdma_ah_attr(dev, &qp_attr->ah_attr, pri_path); 4685 4686 to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, alt_path); 4686 4687 qp_attr->alt_pkey_index = MLX5_GET(ads, alt_path, pkey_index); ··· 4772 4775 if (ibqp->rwq_ind_tbl) 4773 4776 return -ENOSYS; 4774 4777 4775 - if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4778 + if (qp->type == IB_QPT_GSI) 4776 4779 return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 4777 4780 qp_init_attr); 4778 4781 ··· 4786 4789 4787 4790 mutex_lock(&qp->mutex); 4788 4791 4789 - if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 4792 + if (qp->type == IB_QPT_RAW_PACKET || 4790 4793 qp->flags & IB_QP_CREATE_SOURCE_QPN) { 4791 4794 err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 4792 4795 if (err) ··· 4813 4816 qp_attr->cap.max_send_sge = 0; 4814 4817 } 4815 4818 4816 - qp_init_attr->qp_type = ibqp->qp_type; 4819 + qp_init_attr->qp_type = qp->type; 4817 4820 qp_init_attr->recv_cq = ibqp->recv_cq; 4818 4821 qp_init_attr->send_cq = ibqp->send_cq; 4819 4822 qp_init_attr->srq = ibqp->srq;
+4 -5
drivers/infiniband/hw/mlx5/wr.c
··· 1278 1278 struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 1279 1279 struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 1280 1280 struct mlx5_core_dev *mdev = dev->mdev; 1281 - struct mlx5_ib_qp *qp; 1281 + struct mlx5_ib_qp *qp = to_mqp(ibqp); 1282 1282 struct mlx5_wqe_xrc_seg *xrc; 1283 1283 struct mlx5_bf *bf; 1284 1284 void *cur_edge; ··· 1299 1299 return -EIO; 1300 1300 } 1301 1301 1302 - if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 1302 + if (qp->type == IB_QPT_GSI) 1303 1303 return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 1304 1304 1305 - qp = to_mqp(ibqp); 1306 1305 bf = &qp->bf; 1307 1306 1308 1307 spin_lock_irqsave(&qp->sq.lock, flags); ··· 1346 1347 } 1347 1348 } 1348 1349 1349 - switch (ibqp->qp_type) { 1350 + switch (qp->type) { 1350 1351 case IB_QPT_XRC_INI: 1351 1352 xrc = seg; 1352 1353 seg += sizeof(*xrc); ··· 1475 1476 return -EIO; 1476 1477 } 1477 1478 1478 - if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 1479 + if (qp->type == IB_QPT_GSI) 1479 1480 return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 1480 1481 1481 1482 spin_lock_irqsave(&qp->rq.lock, flags);