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dt-bindings: pinctrl: renesas,r9a09g077: Document pin configuration properties

Document the pin configuration properties supported by the RZ/T2H
pinctrl driver.

The RZ/T2H SoC allows configuring several electrical characteristics
through the DRCTLm (I/O Buffer Function Switching) registers. These
registers control drive strength, bias configuration, Schmitt trigger
input, and output slew rate.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260319141515.2053556-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

authored by

Lad Prabhakar and committed by
Geert Uytterhoeven 9efe63b7 fb22bb97

+17
+17
Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml
··· 83 83 input: true 84 84 input-enable: true 85 85 output-enable: true 86 + bias-disable: true 87 + bias-pull-down: true 88 + bias-pull-up: true 89 + input-schmitt-enable: true 90 + input-schmitt-disable: true 91 + slew-rate: 92 + description: 0 is slow slew rate, 1 is fast slew rate 93 + enum: [0, 1] 94 + drive-strength-microamp: 95 + description: | 96 + Four discrete levels are supported (via registers DRCTLm), corresponding 97 + to the following nominal values: 98 + - 2500 (Low strength) 99 + - 5000 (Middle strength) 100 + - 9000 (High strength) 101 + - 11800 (Ultra High strength) 102 + enum: [2500, 5000, 9000, 11800] 86 103 oneOf: 87 104 - required: [pinmux] 88 105 - required: [pins]