Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
gpio: adp5585: add support for the adp5589 expander
Support the adp5589 I/O expander which supports up to 19 pins. We need
to add a chip_info based struct since accessing register "banks"
and "bits" differs between devices.
Also some register addresses are different.
While at it move ADP558X_GPIO_MAX defines to the main header file and
rename them. That information will be needed by the top level device in
a following change.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20250701-dev-adp5589-fw-v7-9-b1fcfe9e9826@analog.com
Signed-off-by: Lee Jones <lee@kernel.org>
+126
-43
+117
-34
drivers/gpio/gpio-adp5585.c
+117
-34
drivers/gpio/gpio-adp5585.c
···
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*
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* Copyright 2022 NXP
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* Copyright 2024 Ideas on Board Oy
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* Copyright 2025 Analog Devices, Inc.
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*/
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#include <linux/device.h>
···
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#include <linux/regmap.h>
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#include <linux/types.h>
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-
#define ADP5585_GPIO_MAX 11
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+
/*
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* Bank 0 covers pins "GPIO 1/R0" to "GPIO 6/R5", numbered 0 to 5 by the
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* driver, and bank 1 covers pins "GPIO 7/C0" to "GPIO 11/C4", numbered 6 to
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* 10. Some variants of the ADP5585 don't support "GPIO 6/R5". As the driver
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* uses identical GPIO numbering for all variants to avoid confusion, GPIO 5 is
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* marked as reserved in the device tree for variants that don't support it.
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*/
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#define ADP5585_BANK(n) ((n) >= 6 ? 1 : 0)
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#define ADP5585_BIT(n) ((n) >= 6 ? BIT((n) - 6) : BIT(n))
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+
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/*
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* Bank 0 covers pins "GPIO 1/R0" to "GPIO 8/R7", numbered 0 to 7 by the
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* driver, bank 1 covers pins "GPIO 9/C0" to "GPIO 16/C7", numbered 8 to
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* 15 and bank 3 covers pins "GPIO 17/C8" to "GPIO 19/C10", numbered 16 to 18.
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*/
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#define ADP5589_BANK(n) ((n) >> 3)
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#define ADP5589_BIT(n) BIT((n) & 0x7)
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+
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struct adp5585_gpio_chip {
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int (*bank)(unsigned int off);
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int (*bit)(unsigned int off);
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unsigned int max_gpio;
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unsigned int debounce_dis_a;
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unsigned int rpull_cfg_a;
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unsigned int gpo_data_a;
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unsigned int gpo_out_a;
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unsigned int gpio_dir_a;
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unsigned int gpi_stat_a;
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bool has_bias_hole;
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};
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struct adp5585_gpio_dev {
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struct gpio_chip gpio_chip;
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const struct adp5585_gpio_chip *info;
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struct regmap *regmap;
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};
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+
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static int adp5585_gpio_bank(unsigned int off)
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{
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return ADP5585_BANK(off);
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}
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+
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static int adp5585_gpio_bit(unsigned int off)
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{
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return ADP5585_BIT(off);
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}
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+
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static int adp5589_gpio_bank(unsigned int off)
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{
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return ADP5589_BANK(off);
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}
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+
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static int adp5589_gpio_bit(unsigned int off)
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{
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return ADP5589_BIT(off);
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}
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static int adp5585_gpio_get_direction(struct gpio_chip *chip, unsigned int off)
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{
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struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(chip);
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unsigned int bank = ADP5585_BANK(off);
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unsigned int bit = ADP5585_BIT(off);
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const struct adp5585_gpio_chip *info = adp5585_gpio->info;
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unsigned int val;
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regmap_read(adp5585_gpio->regmap, ADP5585_GPIO_DIRECTION_A + bank, &val);
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regmap_read(adp5585_gpio->regmap, info->gpio_dir_a + info->bank(off), &val);
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return val & bit ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
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return val & info->bit(off) ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
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}
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static int adp5585_gpio_direction_input(struct gpio_chip *chip, unsigned int off)
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{
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struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(chip);
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unsigned int bank = ADP5585_BANK(off);
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unsigned int bit = ADP5585_BIT(off);
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const struct adp5585_gpio_chip *info = adp5585_gpio->info;
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return regmap_clear_bits(adp5585_gpio->regmap,
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ADP5585_GPIO_DIRECTION_A + bank, bit);
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return regmap_clear_bits(adp5585_gpio->regmap, info->gpio_dir_a + info->bank(off),
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info->bit(off));
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}
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static int adp5585_gpio_direction_output(struct gpio_chip *chip, unsigned int off, int val)
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{
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struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(chip);
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unsigned int bank = ADP5585_BANK(off);
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unsigned int bit = ADP5585_BIT(off);
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const struct adp5585_gpio_chip *info = adp5585_gpio->info;
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unsigned int bank = info->bank(off);
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unsigned int bit = info->bit(off);
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int ret;
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ret = regmap_update_bits(adp5585_gpio->regmap,
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ADP5585_GPO_DATA_OUT_A + bank, bit,
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val ? bit : 0);
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ret = regmap_update_bits(adp5585_gpio->regmap, info->gpo_data_a + bank,
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bit, val ? bit : 0);
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if (ret)
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return ret;
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return regmap_set_bits(adp5585_gpio->regmap,
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ADP5585_GPIO_DIRECTION_A + bank, bit);
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return regmap_set_bits(adp5585_gpio->regmap, info->gpio_dir_a + bank,
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bit);
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}
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static int adp5585_gpio_get_value(struct gpio_chip *chip, unsigned int off)
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{
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struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(chip);
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unsigned int bank = ADP5585_BANK(off);
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unsigned int bit = ADP5585_BIT(off);
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const struct adp5585_gpio_chip *info = adp5585_gpio->info;
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unsigned int bank = info->bank(off);
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unsigned int bit = info->bit(off);
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unsigned int reg;
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unsigned int val;
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···
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* .direction_input(), .direction_output() or .set() operations racing
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* with this.
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*/
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regmap_read(adp5585_gpio->regmap, ADP5585_GPIO_DIRECTION_A + bank, &val);
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reg = val & bit ? ADP5585_GPO_DATA_OUT_A : ADP5585_GPI_STATUS_A;
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regmap_read(adp5585_gpio->regmap, info->gpio_dir_a + bank, &val);
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reg = val & bit ? info->gpo_data_a : info->gpi_stat_a;
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regmap_read(adp5585_gpio->regmap, reg + bank, &val);
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return !!(val & bit);
···
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int val)
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{
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struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(chip);
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unsigned int bank = ADP5585_BANK(off);
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unsigned int bit = ADP5585_BIT(off);
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const struct adp5585_gpio_chip *info = adp5585_gpio->info;
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unsigned int bit = adp5585_gpio->info->bit(off);
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return regmap_update_bits(adp5585_gpio->regmap,
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ADP5585_GPO_DATA_OUT_A + bank,
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return regmap_update_bits(adp5585_gpio->regmap, info->gpo_data_a + info->bank(off),
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bit, val ? bit : 0);
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}
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static int adp5585_gpio_set_bias(struct adp5585_gpio_dev *adp5585_gpio,
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unsigned int off, unsigned int bias)
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{
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const struct adp5585_gpio_chip *info = adp5585_gpio->info;
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unsigned int bit, reg, mask, val;
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/*
···
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* consecutive registers ADP5585_RPULL_CONFIG_*, with a hole of 4 bits
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* after R5.
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*/
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bit = off * 2 + (off > 5 ? 4 : 0);
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reg = ADP5585_RPULL_CONFIG_A + bit / 8;
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bit = off * 2;
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if (info->has_bias_hole)
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bit += (off > 5 ? 4 : 0);
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reg = info->rpull_cfg_a + bit / 8;
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mask = ADP5585_Rx_PULL_CFG_MASK << (bit % 8);
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val = bias << (bit % 8);
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···
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static int adp5585_gpio_set_drive(struct adp5585_gpio_dev *adp5585_gpio,
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unsigned int off, enum pin_config_param drive)
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{
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unsigned int bank = ADP5585_BANK(off);
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unsigned int bit = ADP5585_BIT(off);
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const struct adp5585_gpio_chip *info = adp5585_gpio->info;
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unsigned int bit = adp5585_gpio->info->bit(off);
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return regmap_update_bits(adp5585_gpio->regmap,
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ADP5585_GPO_OUT_MODE_A + bank, bit,
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info->gpo_out_a + info->bank(off), bit,
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drive == PIN_CONFIG_DRIVE_OPEN_DRAIN ? bit : 0);
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}
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static int adp5585_gpio_set_debounce(struct adp5585_gpio_dev *adp5585_gpio,
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unsigned int off, unsigned int debounce)
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{
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unsigned int bank = ADP5585_BANK(off);
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unsigned int bit = ADP5585_BIT(off);
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const struct adp5585_gpio_chip *info = adp5585_gpio->info;
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unsigned int bit = adp5585_gpio->info->bit(off);
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return regmap_update_bits(adp5585_gpio->regmap,
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ADP5585_DEBOUNCE_DIS_A + bank, bit,
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info->debounce_dis_a + info->bank(off), bit,
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debounce ? 0 : bit);
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}
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···
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static int adp5585_gpio_probe(struct platform_device *pdev)
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{
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struct adp5585_dev *adp5585 = dev_get_drvdata(pdev->dev.parent);
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const struct platform_device_id *id = platform_get_device_id(pdev);
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struct adp5585_gpio_dev *adp5585_gpio;
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struct device *dev = &pdev->dev;
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struct gpio_chip *gc;
···
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return -ENOMEM;
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adp5585_gpio->regmap = adp5585->regmap;
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adp5585_gpio->info = (const struct adp5585_gpio_chip *)id->driver_data;
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if (!adp5585_gpio->info)
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return -ENODEV;
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device_set_of_node_from_dev(dev, dev->parent);
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···
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gc->can_sleep = true;
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gc->base = -1;
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gc->ngpio = ADP5585_GPIO_MAX;
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gc->ngpio = adp5585_gpio->info->max_gpio;
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gc->label = pdev->name;
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gc->owner = THIS_MODULE;
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···
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return 0;
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}
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static const struct adp5585_gpio_chip adp5585_gpio_chip_info = {
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.bank = adp5585_gpio_bank,
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.bit = adp5585_gpio_bit,
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.debounce_dis_a = ADP5585_DEBOUNCE_DIS_A,
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.rpull_cfg_a = ADP5585_RPULL_CONFIG_A,
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.gpo_data_a = ADP5585_GPO_DATA_OUT_A,
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.gpo_out_a = ADP5585_GPO_OUT_MODE_A,
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.gpio_dir_a = ADP5585_GPIO_DIRECTION_A,
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.gpi_stat_a = ADP5585_GPI_STATUS_A,
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.max_gpio = ADP5585_PIN_MAX,
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.has_bias_hole = true,
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};
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static const struct adp5585_gpio_chip adp5589_gpio_chip_info = {
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.bank = adp5589_gpio_bank,
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.bit = adp5589_gpio_bit,
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.debounce_dis_a = ADP5589_DEBOUNCE_DIS_A,
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.rpull_cfg_a = ADP5589_RPULL_CONFIG_A,
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.gpo_data_a = ADP5589_GPO_DATA_OUT_A,
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.gpo_out_a = ADP5589_GPO_OUT_MODE_A,
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.gpio_dir_a = ADP5589_GPIO_DIRECTION_A,
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.gpi_stat_a = ADP5589_GPI_STATUS_A,
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.max_gpio = ADP5589_PIN_MAX,
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};
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static const struct platform_device_id adp5585_gpio_id_table[] = {
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{ "adp5585-gpio" },
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{ "adp5585-gpio", (kernel_ulong_t)&adp5585_gpio_chip_info },
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{ "adp5589-gpio", (kernel_ulong_t)&adp5589_gpio_chip_info },
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{ /* Sentinel */ }
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};
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MODULE_DEVICE_TABLE(platform, adp5585_gpio_id_table);
+9
-9
include/linux/mfd/adp5585.h
+9
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include/linux/mfd/adp5585.h
···
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#define ADP5585_MAX_REG ADP5585_INT_EN
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-
/*
111
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* Bank 0 covers pins "GPIO 1/R0" to "GPIO 6/R5", numbered 0 to 5 by the
112
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* driver, and bank 1 covers pins "GPIO 7/C0" to "GPIO 11/C4", numbered 6 to
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* 10. Some variants of the ADP5585 don't support "GPIO 6/R5". As the driver
114
-
* uses identical GPIO numbering for all variants to avoid confusion, GPIO 5 is
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* marked as reserved in the device tree for variants that don't support it.
116
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*/
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#define ADP5585_BANK(n) ((n) >= 6 ? 1 : 0)
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#define ADP5585_BIT(n) ((n) >= 6 ? BIT((n) - 6) : BIT(n))
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+
#define ADP5585_PIN_MAX 11
119
111
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/* ADP5589 */
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#define ADP5589_MAN_ID_VALUE 0x10
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+
#define ADP5589_GPI_STATUS_A 0x16
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#define ADP5589_GPI_STATUS_C 0x18
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#define ADP5589_RPULL_CONFIG_A 0x19
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#define ADP5589_DEBOUNCE_DIS_A 0x27
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#define ADP5589_GPO_DATA_OUT_A 0x2a
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#define ADP5589_GPO_OUT_MODE_A 0x2d
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#define ADP5589_GPIO_DIRECTION_A 0x30
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#define ADP5589_PIN_CONFIG_D 0x4C
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#define ADP5589_INT_EN 0x4e
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#define ADP5589_MAX_REG ADP5589_INT_EN
124
+
125
+
#define ADP5589_PIN_MAX 19
126
126
127
127
struct regmap;
128
128