Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
pinctrl: realtek: Support system suspend and resume
Add system suspend and resume capabilities to the common Realtek pinctrl
library. This enables saving and restoring pin configurations during the
noirq phase for SoCs that define register ranges.
Signed-off-by: Tzuyi Chang <tychang@realtek.com>
Co-developed-by: Yu-Chun Lin <eleanor.lin@realtek.com>
Signed-off-by: Yu-Chun Lin <eleanor.lin@realtek.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
authored by
Tzuyi Chang
and committed by
Linus Walleij
9f6cfc93
aeeac6d3
+111
+98
drivers/pinctrl/realtek/pinctrl-rtd.c
+98
drivers/pinctrl/realtek/pinctrl-rtd.c
···
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struct pinctrl_desc desc;
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const struct rtd_pinctrl_desc *info;
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struct regmap *regmap_pinctrl;
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+
u32 **saved_regs;
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};
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/* custom pinconf parameters */
···
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.use_relaxed_mmio = true,
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};
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+
static int rtd_pinctrl_init_pm(struct rtd_pinctrl *data)
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{
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const struct rtd_pin_range *pin_range = data->info->pin_range;
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struct device *dev = data->pcdev->dev;
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const struct rtd_reg_range *range;
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size_t num_entries;
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int i;
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data->saved_regs = devm_kcalloc(dev, pin_range->num_ranges, sizeof(u32 *), GFP_KERNEL);
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if (!data->saved_regs)
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return -ENOMEM;
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+
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for (i = 0; i < pin_range->num_ranges; i++) {
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range = &pin_range->ranges[i];
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num_entries = range->len / 4;
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+
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data->saved_regs[i] = devm_kzalloc(dev, num_entries * sizeof(u32), GFP_KERNEL);
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if (!data->saved_regs[i])
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return -ENOMEM;
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}
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+
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return 0;
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}
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+
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int rtd_pinctrl_probe(struct platform_device *pdev, const struct rtd_pinctrl_desc *desc)
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{
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struct rtd_pinctrl *data;
···
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dev_dbg(&pdev->dev, "probed\n");
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if (data->info->pin_range) {
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if (rtd_pinctrl_init_pm(data))
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return -ENOMEM;
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}
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return 0;
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}
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EXPORT_SYMBOL(rtd_pinctrl_probe);
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+
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static int realtek_pinctrl_suspend(struct device *dev)
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{
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struct rtd_pinctrl *data = dev_get_drvdata(dev);
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const struct rtd_pin_range *pin_range = data->info->pin_range;
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const struct rtd_reg_range *range;
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u32 *range_regs;
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int count;
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int i, j;
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int ret;
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if (!data->saved_regs)
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return 0;
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+
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for (i = 0; i < pin_range->num_ranges; i++) {
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range = &pin_range->ranges[i];
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range_regs = data->saved_regs[i];
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count = range->len / 4;
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+
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for (j = 0; j < count; j++) {
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ret = regmap_read(data->regmap_pinctrl, range->offset + (j * 4),
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&range_regs[j]);
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if (ret) {
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dev_err(dev, "failed to store register 0x%x: %d\n",
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range->offset + (j * 4), ret);
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return ret;
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}
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}
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}
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return 0;
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}
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+
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static int realtek_pinctrl_resume(struct device *dev)
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{
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struct rtd_pinctrl *data = dev_get_drvdata(dev);
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const struct rtd_pin_range *pin_range = data->info->pin_range;
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const struct rtd_reg_range *range;
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u32 *range_regs;
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int count;
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int i, j;
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int ret;
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if (!data->saved_regs)
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return 0;
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for (i = 0; i < pin_range->num_ranges; i++) {
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range = &pin_range->ranges[i];
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range_regs = data->saved_regs[i];
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count = range->len / 4;
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+
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for (j = 0; j < count; j++) {
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ret = regmap_write(data->regmap_pinctrl, range->offset + (j * 4),
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range_regs[j]);
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if (ret) {
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dev_err(dev, "failed to restore register 0x%x: %d\n",
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range->offset + (j * 4), ret);
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return ret;
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}
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}
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}
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return 0;
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}
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+
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const struct dev_pm_ops realtek_pinctrl_pm_ops = {
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NOIRQ_SYSTEM_SLEEP_PM_OPS(realtek_pinctrl_suspend, realtek_pinctrl_resume)
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};
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EXPORT_SYMBOL_GPL(realtek_pinctrl_pm_ops);
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MODULE_DESCRIPTION("Realtek DHC SoC pinctrl driver");
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MODULE_LICENSE("GPL");
+13
drivers/pinctrl/realtek/pinctrl-rtd.h
+13
drivers/pinctrl/realtek/pinctrl-rtd.h
···
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unsigned int pdrive_maskbits;
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};
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struct rtd_reg_range {
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unsigned int offset;
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size_t len;
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};
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struct rtd_pin_range {
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const struct rtd_reg_range *ranges;
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const int num_ranges;
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};
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struct rtd_pin_desc {
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const char *name;
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unsigned int mux_offset;
···
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unsigned int num_sconfigs;
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struct rtd_pin_reg_list *lists;
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unsigned int num_regs;
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const struct rtd_pin_range *pin_range;
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};
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int rtd_pinctrl_probe(struct platform_device *pdev, const struct rtd_pinctrl_desc *desc);
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extern const struct dev_pm_ops realtek_pinctrl_pm_ops;