Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'alpha-for-v7.0-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/lindholm/alpha
Pull alpha update from Magnus Lindholm:
- alpha: fix user-space corruption during memory compaction
* tag 'alpha-for-v7.0-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/lindholm/alpha:
alpha: fix user-space corruption during memory compaction
+148
-3
+32
-1
arch/alpha/include/asm/pgtable.h
+32
-1
arch/alpha/include/asm/pgtable.h
···
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17
#include <asm/processor.h> /* For TASK_SIZE */
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#include <asm/machvec.h>
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#include <asm/setup.h>
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#include <linux/page_table_check.h>
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struct mm_struct;
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struct vm_area_struct;
···
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{ pud_val(*pudp) = _PAGE_TABLE | ((((unsigned long) pmdp) - PAGE_OFFSET) << (32-PAGE_SHIFT)); }
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extern void migrate_flush_tlb_page(struct vm_area_struct *vma,
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unsigned long addr);
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extern inline unsigned long
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pmd_page_vaddr(pmd_t pmd)
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{
···
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extern inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_VALID; }
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extern inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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{
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-
pte_val(*ptep) = 0;
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WRITE_ONCE(pte_val(*ptep), 0);
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}
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extern inline int pmd_none(pmd_t pmd) { return !pmd_val(pmd); }
···
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extern pgd_t swapper_pg_dir[1024];
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#ifdef CONFIG_COMPACTION
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#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
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static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
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unsigned long address,
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pte_t *ptep)
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{
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pte_t pte = READ_ONCE(*ptep);
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pte_clear(mm, address, ptep);
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return pte;
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}
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#define __HAVE_ARCH_PTEP_CLEAR_FLUSH
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static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
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unsigned long addr, pte_t *ptep)
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{
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struct mm_struct *mm = vma->vm_mm;
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pte_t pte = ptep_get_and_clear(mm, addr, ptep);
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page_table_check_pte_clear(mm, pte);
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migrate_flush_tlb_page(vma, addr);
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return pte;
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}
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#endif
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/*
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* The Alpha doesn't have any external MMU info: the kernel page
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* tables contain all the necessary information.
+3
-1
arch/alpha/include/asm/tlbflush.h
+3
-1
arch/alpha/include/asm/tlbflush.h
+1
-1
arch/alpha/mm/Makefile
+1
-1
arch/alpha/mm/Makefile
+112
arch/alpha/mm/tlbflush.c
+112
arch/alpha/mm/tlbflush.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
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/*
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* Alpha TLB shootdown helpers
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*
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* Copyright (C) 2025 Magnus Lindholm <linmag7@gmail.com>
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*
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* Alpha-specific TLB flush helpers that cannot be expressed purely
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* as inline functions.
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*
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* These helpers provide combined MM context handling (ASN rollover)
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* and immediate TLB invalidation for page migration and memory
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* compaction paths, where lazy shootdowns are insufficient.
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*/
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/sched.h>
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#include <asm/tlbflush.h>
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#include <asm/pal.h>
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#include <asm/mmu_context.h>
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#define asn_locked() (cpu_data[smp_processor_id()].asn_lock)
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/*
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* Migration/compaction helper: combine mm context (ASN) handling with an
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* immediate per-page TLB invalidate and (for exec) an instruction barrier.
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*
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* This mirrors the SMP combined IPI handler semantics, but runs locally on UP.
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*/
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#ifndef CONFIG_SMP
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void migrate_flush_tlb_page(struct vm_area_struct *vma,
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unsigned long addr)
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{
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struct mm_struct *mm = vma->vm_mm;
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int tbi_type = (vma->vm_flags & VM_EXEC) ? 3 : 2;
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+
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/*
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* First do the mm-context side:
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* If we're currently running this mm, reload a fresh context ASN.
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* Otherwise, mark context invalid.
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*
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* On UP, this is mostly about matching the SMP semantics and ensuring
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* exec/i-cache tagging assumptions hold when compaction migrates pages.
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*/
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if (mm == current->active_mm)
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flush_tlb_current(mm);
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else
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flush_tlb_other(mm);
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+
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/*
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* Then do the immediate translation kill for this VA.
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* For exec mappings, order instruction fetch after invalidation.
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*/
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tbi(tbi_type, addr);
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}
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#else
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struct tlb_mm_and_addr {
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struct mm_struct *mm;
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unsigned long addr;
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int tbi_type; /* 2 = DTB, 3 = ITB+DTB */
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};
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static void ipi_flush_mm_and_page(void *x)
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{
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struct tlb_mm_and_addr *d = x;
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/* Part 1: mm context side (Alpha uses ASN/context as a key mechanism). */
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if (d->mm == current->active_mm && !asn_locked())
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__load_new_mm_context(d->mm);
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else
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flush_tlb_other(d->mm);
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+
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/* Part 2: immediate per-VA invalidation on this CPU. */
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tbi(d->tbi_type, d->addr);
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}
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+
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void migrate_flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
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{
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struct mm_struct *mm = vma->vm_mm;
81
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struct tlb_mm_and_addr d = {
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.mm = mm,
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.addr = addr,
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.tbi_type = (vma->vm_flags & VM_EXEC) ? 3 : 2,
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};
86
+
87
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/*
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* One synchronous rendezvous: every CPU runs ipi_flush_mm_and_page().
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* This is the "combined" version of flush_tlb_mm + per-page invalidate.
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*/
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preempt_disable();
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on_each_cpu(ipi_flush_mm_and_page, &d, 1);
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+
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/*
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* mimic flush_tlb_mm()'s mm_users<=1 optimization.
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+
*/
97
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if (atomic_read(&mm->mm_users) <= 1) {
98
+
99
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int cpu, this_cpu;
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this_cpu = smp_processor_id();
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+
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for (cpu = 0; cpu < NR_CPUS; cpu++) {
103
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if (!cpu_online(cpu) || cpu == this_cpu)
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continue;
105
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if (READ_ONCE(mm->context[cpu]))
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WRITE_ONCE(mm->context[cpu], 0);
107
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}
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+
}
109
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preempt_enable();
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}
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#endif