platform/x86/intel/pmc: Cleanup SSRAM discovery

Clean up the code handling SSRAM discovery. Handle all resource allocation
and cleanup in pmc_core_ssram_get_pmc(). Return the error status from this
function but only fail the init if we fail to discover the primary PMC.

Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20231129222132.2331261-14-david.e.box@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

authored by

David E. Box and committed by

Hans de Goede 2 years ago a01486dc 9512920a

+33 -29

1 changed file

expand all

drivers

platform

x86

intel

pmc

core_ssram.c

+33 -29

drivers/platform/x86/intel/pmc/core_ssram.c

··· 8 8 * 9 9 */ 10 10 11 + #include <linux/cleanup.h> 11 12 #include <linux/pci.h> 12 13 #include <linux/io-64-nonatomic-lo-hi.h> 13 14 ··· 21 20 #define SSRAM_PCH_OFFSET 0x60 22 21 #define SSRAM_IOE_OFFSET 0x68 23 22 #define SSRAM_DEVID_OFFSET 0x70 23 + 24 + DEFINE_FREE(pmc_core_iounmap, void __iomem *, iounmap(_T)); 24 25 25 26 static const struct pmc_reg_map *pmc_core_find_regmap(struct pmc_info *list, u16 devid) 26 27 { ··· 68 65 return 0; 69 66 } 70 67 71 - static void 72 - pmc_core_ssram_get_pmc(struct pmc_dev *pmcdev, void __iomem *ssram, u32 offset, 73 - int pmc_idx) 68 + static int 69 + pmc_core_ssram_get_pmc(struct pmc_dev *pmcdev, int pmc_idx, u32 offset) 74 70 { 75 - u64 pwrm_base; 71 + struct pci_dev *ssram_pcidev = pmcdev->ssram_pcidev; 72 + void __iomem __free(pmc_core_iounmap) *tmp_ssram = NULL; 73 + void __iomem __free(pmc_core_iounmap) *ssram = NULL; 74 + const struct pmc_reg_map *map; 75 + u64 ssram_base, pwrm_base; 76 76 u16 devid; 77 77 78 - if (pmc_idx != PMC_IDX_SOC) { 79 - u64 ssram_base = get_base(ssram, offset); 78 + if (!pmcdev->regmap_list) 79 + return -ENOENT; 80 80 81 - if (!ssram_base) 82 - return; 81 + ssram_base = ssram_pcidev->resource[0].start; 82 + tmp_ssram = ioremap(ssram_base, SSRAM_HDR_SIZE); 83 83 84 + if (pmc_idx != PMC_IDX_MAIN) { 85 + /* 86 + * The secondary PMC BARS (which are behind hidden PCI devices) 87 + * are read from fixed offsets in MMIO of the primary PMC BAR. 88 + */ 89 + ssram_base = get_base(tmp_ssram, offset); 84 90 ssram = ioremap(ssram_base, SSRAM_HDR_SIZE); 85 91 if (!ssram) 86 - return; 92 + return -ENOMEM; 93 + 94 + } else { 95 + ssram = no_free_ptr(tmp_ssram); 87 96 } 88 97 89 98 pwrm_base = get_base(ssram, SSRAM_PWRM_OFFSET); 90 99 devid = readw(ssram + SSRAM_DEVID_OFFSET); 91 100 92 - if (pmcdev->regmap_list) { 93 - const struct pmc_reg_map *map; 101 + map = pmc_core_find_regmap(pmcdev->regmap_list, devid); 102 + if (!map) 103 + return -ENODEV; 94 104 95 - map = pmc_core_find_regmap(pmcdev->regmap_list, devid); 96 - if (map) 97 - pmc_core_pmc_add(pmcdev, pwrm_base, map, pmc_idx); 98 - } 99 - 100 - if (pmc_idx != PMC_IDX_SOC) 101 - iounmap(ssram); 105 + return pmc_core_pmc_add(pmcdev, pwrm_base, map, PMC_IDX_MAIN); 102 106 } 103 107 104 108 int pmc_core_ssram_init(struct pmc_dev *pmcdev) 105 109 { 106 - void __iomem *ssram; 107 110 struct pci_dev *pcidev; 108 - u64 ssram_base; 109 111 int ret; 110 112 111 113 pcidev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(20, 2)); ··· 121 113 if (ret) 122 114 goto release_dev; 123 115 124 - ssram_base = pcidev->resource[0].start; 125 - ssram = ioremap(ssram_base, SSRAM_HDR_SIZE); 126 - if (!ssram) 127 - goto disable_dev; 128 - 129 116 pmcdev->ssram_pcidev = pcidev; 130 117 131 - pmc_core_ssram_get_pmc(pmcdev, ssram, 0, PMC_IDX_SOC); 132 - pmc_core_ssram_get_pmc(pmcdev, ssram, SSRAM_IOE_OFFSET, PMC_IDX_IOE); 133 - pmc_core_ssram_get_pmc(pmcdev, ssram, SSRAM_PCH_OFFSET, PMC_IDX_PCH); 118 + ret = pmc_core_ssram_get_pmc(pmcdev, PMC_IDX_MAIN, 0); 119 + if (ret) 120 + goto disable_dev; 134 121 135 - iounmap(ssram); 122 + pmc_core_ssram_get_pmc(pmcdev, PMC_IDX_IOE, SSRAM_IOE_OFFSET); 123 + pmc_core_ssram_get_pmc(pmcdev, PMC_IDX_PCH, SSRAM_PCH_OFFSET); 136 124 137 125 return 0; 138 126

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