tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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powerpc/6xx: set High BAT Enable flag on G2_LE cores

MMU_FTR_USE_HIGH_BATS is set for G2_LE cores and derivatives like e300cX,
but the high BATs need to be enabled in HID2 to work. Add register
definitions and add the needed setup to __setup_cpu_603.

This fixes boot on CPUs like the MPC5200B with STRICT_KERNEL_RWX enabled
on systems where the flag has not been set by the bootloader already.

Fixes: e4d6654ebe6e ("powerpc/mm/32s: rework mmu_mapin_ram()")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20240124103838.43675-1-matthias.schiffer@ew.tq-group.com

authored by

Matthias Schiffer and committed by
Michael Ellerman a038a3ff f0969627

+21 -1
+2
arch/powerpc/include/asm/reg.h
··· 617 617 #endif 618 618 #define SPRN_HID2 0x3F8 /* Hardware Implementation Register 2 */ 619 619 #define SPRN_HID2_GEKKO 0x398 /* Gekko HID2 Register */ 620 + #define SPRN_HID2_G2_LE 0x3F3 /* G2_LE HID2 Register */ 621 + #define HID2_G2_LE_HBE (1<<18) /* High BAT Enable (G2_LE) */ 620 622 #define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ 621 623 #define SPRN_IABR2 0x3FA /* 83xx */ 622 624 #define SPRN_IBCR 0x135 /* 83xx Insn Breakpoint Control Reg */
+19 -1
arch/powerpc/kernel/cpu_setup_6xx.S
··· 26 26 bl __init_fpu_registers 27 27 END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE) 28 28 bl setup_common_caches 29 + 30 + /* 31 + * This assumes that all cores using __setup_cpu_603 with 32 + * MMU_FTR_USE_HIGH_BATS are G2_LE compatible 33 + */ 34 + BEGIN_MMU_FTR_SECTION 35 + bl setup_g2_le_hid2 36 + END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS) 37 + 29 38 mtlr r5 30 39 blr 31 40 _GLOBAL(__setup_cpu_604) ··· 123 114 isync 124 115 blr 125 116 SYM_FUNC_END(setup_604_hid0) 117 + 118 + /* Enable high BATs for G2_LE and derivatives like e300cX */ 119 + SYM_FUNC_START_LOCAL(setup_g2_le_hid2) 120 + mfspr r11,SPRN_HID2_G2_LE 121 + oris r11,r11,HID2_G2_LE_HBE@h 122 + mtspr SPRN_HID2_G2_LE,r11 123 + sync 124 + isync 125 + blr 126 + SYM_FUNC_END(setup_g2_le_hid2) 126 127 127 128 /* 7400 <= rev 2.7 and 7410 rev = 1.0 suffer from some 128 129 * erratas we work around here. ··· 514 495 mtcr r7 515 496 blr 516 497 _ASM_NOKPROBE_SYMBOL(__restore_cpu_setup) 517 -