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dt-bindings: pwm: sprd,ums512-pwm: convert to YAML

Convert the Spreadtrum/Unisoc UMS512 PWM controller bindings to DT schema.
Adjust filename to match compatible. Drop assigned-* properties as these
should not be needed.

Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Chunyan Zhang <zhang.lyra@gmail.com>
Acked-by: Baolin Wang <baolin.wang@linux.alibaba.com>
Link: https://lore.kernel.org/r/ZyH-JASRcpMXYsmH@standask-GA-A55M-S2HP
[Replaced Baolin Wang's email address in maintainers list]
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>

authored by

Stanislav Jakubek and committed by
Uwe Kleine-König a0b67429 10435e0d

+66 -40
-40
Documentation/devicetree/bindings/pwm/pwm-sprd.txt
··· 1 - Spreadtrum PWM controller 2 - 3 - Spreadtrum SoCs PWM controller provides 4 PWM channels. 4 - 5 - Required properties: 6 - - compatible : Should be "sprd,ums512-pwm". 7 - - reg: Physical base address and length of the controller's registers. 8 - - clocks: The phandle and specifier referencing the controller's clocks. 9 - - clock-names: Should contain following entries: 10 - "pwmn": used to derive the functional clock for PWM channel n (n range: 0 ~ 3). 11 - "enablen": for PWM channel n enable clock (n range: 0 ~ 3). 12 - - #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of 13 - the cells format. 14 - 15 - Optional properties: 16 - - assigned-clocks: Reference to the PWM clock entries. 17 - - assigned-clock-parents: The phandle of the parent clock of PWM clock. 18 - 19 - Example: 20 - pwms: pwm@32260000 { 21 - compatible = "sprd,ums512-pwm"; 22 - reg = <0 0x32260000 0 0x10000>; 23 - clock-names = "pwm0", "enable0", 24 - "pwm1", "enable1", 25 - "pwm2", "enable2", 26 - "pwm3", "enable3"; 27 - clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>, 28 - <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>, 29 - <&aon_clk CLK_PWM2>, <&aonapb_gate CLK_PWM2_EB>, 30 - <&aon_clk CLK_PWM3>, <&aonapb_gate CLK_PWM3_EB>; 31 - assigned-clocks = <&aon_clk CLK_PWM0>, 32 - <&aon_clk CLK_PWM1>, 33 - <&aon_clk CLK_PWM2>, 34 - <&aon_clk CLK_PWM3>; 35 - assigned-clock-parents = <&ext_26m>, 36 - <&ext_26m>, 37 - <&ext_26m>, 38 - <&ext_26m>; 39 - #pwm-cells = <2>; 40 - };
+66
Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/pwm/sprd,ums512-pwm.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Spreadtrum/Unisoc UMS512 PWM Controller 8 + 9 + maintainers: 10 + - Orson Zhai <orsonzhai@gmail.com> 11 + - Baolin Wang <baolin.wang@linux.alibaba.com> 12 + - Chunyan Zhang <zhang.lyra@gmail.com> 13 + 14 + properties: 15 + compatible: 16 + const: sprd,ums512-pwm 17 + 18 + reg: 19 + maxItems: 1 20 + 21 + clocks: 22 + maxItems: 8 23 + 24 + clock-names: 25 + items: 26 + - const: pwm0 27 + - const: enable0 28 + - const: pwm1 29 + - const: enable1 30 + - const: pwm2 31 + - const: enable2 32 + - const: pwm3 33 + - const: enable3 34 + 35 + '#pwm-cells': 36 + const: 2 37 + 38 + required: 39 + - compatible 40 + - reg 41 + - clocks 42 + - clock-names 43 + 44 + allOf: 45 + - $ref: pwm.yaml# 46 + 47 + unevaluatedProperties: false 48 + 49 + examples: 50 + - | 51 + #include <dt-bindings/clock/sprd,ums512-clk.h> 52 + 53 + pwm@32260000 { 54 + compatible = "sprd,ums512-pwm"; 55 + reg = <0x32260000 0x10000>; 56 + clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>, 57 + <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>, 58 + <&aon_clk CLK_PWM2>, <&aonapb_gate CLK_PWM2_EB>, 59 + <&aon_clk CLK_PWM3>, <&aonapb_gate CLK_PWM3_EB>; 60 + clock-names = "pwm0", "enable0", 61 + "pwm1", "enable1", 62 + "pwm2", "enable2", 63 + "pwm3", "enable3"; 64 + #pwm-cells = <2>; 65 + }; 66 + ...