Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'r8169-add-support-for-rtl8125d-rev-b'
Heiner Kallweit says:
====================
r8169: add support for RTL8125D rev.b
Add support for RTL8125D rev.b. Its XID is 0x689. It is basically
based on the one with XID 0x688, but with different firmware file.
To avoid a mess with the version numbering, adjust it first.
====================
Link: https://patch.msgid.link/15c4a9fd-a653-4b09-825d-751964832a7a@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+42
-34
+2
-1
drivers/net/ethernet/realtek/r8169.h
+2
-1
drivers/net/ethernet/realtek/r8169.h
+37
-31
drivers/net/ethernet/realtek/r8169_main.c
+37
-31
drivers/net/ethernet/realtek/r8169_main.c
···
57
57
#define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw"
58
58
#define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
59
59
#define FIRMWARE_8125D_1 "rtl_nic/rtl8125d-1.fw"
60
+
#define FIRMWARE_8125D_2 "rtl_nic/rtl8125d-2.fw"
60
61
#define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
61
62
#define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
62
63
···
141
140
/* reserve 62 for CFG_METHOD_4 in the vendor driver */
142
141
[RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
143
142
[RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
144
-
[RTL_GIGA_MAC_VER_65] = {"RTL8126A", FIRMWARE_8126A_2},
145
-
[RTL_GIGA_MAC_VER_66] = {"RTL8126A", FIRMWARE_8126A_3},
143
+
[RTL_GIGA_MAC_VER_65] = {"RTL8125D", FIRMWARE_8125D_2},
144
+
[RTL_GIGA_MAC_VER_70] = {"RTL8126A", FIRMWARE_8126A_2},
145
+
[RTL_GIGA_MAC_VER_71] = {"RTL8126A", FIRMWARE_8126A_3},
146
146
};
147
147
148
148
static const struct pci_device_id rtl8169_pci_tbl[] = {
···
708
706
MODULE_FIRMWARE(FIRMWARE_8125A_3);
709
707
MODULE_FIRMWARE(FIRMWARE_8125B_2);
710
708
MODULE_FIRMWARE(FIRMWARE_8125D_1);
709
+
MODULE_FIRMWARE(FIRMWARE_8125D_2);
711
710
MODULE_FIRMWARE(FIRMWARE_8126A_2);
712
711
MODULE_FIRMWARE(FIRMWARE_8126A_3);
713
712
···
1231
1228
case RTL_GIGA_MAC_VER_31:
1232
1229
r8168dp_2_mdio_write(tp, location, val);
1233
1230
break;
1234
-
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
1231
+
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
1235
1232
r8168g_mdio_write(tp, location, val);
1236
1233
break;
1237
1234
default:
···
1246
1243
case RTL_GIGA_MAC_VER_28:
1247
1244
case RTL_GIGA_MAC_VER_31:
1248
1245
return r8168dp_2_mdio_read(tp, location);
1249
-
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
1246
+
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
1250
1247
return r8168g_mdio_read(tp, location);
1251
1248
default:
1252
1249
return r8169_mdio_read(tp, location);
···
1577
1574
break;
1578
1575
case RTL_GIGA_MAC_VER_34:
1579
1576
case RTL_GIGA_MAC_VER_37:
1580
-
case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
1577
+
case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_71:
1581
1578
r8169_mod_reg8_cond(tp, Config2, PME_SIGNAL, wolopts);
1582
1579
break;
1583
1580
default:
···
2050
2047
tp->tx_lpi_timer = timer_val;
2051
2048
r8168_mac_ocp_write(tp, 0xe048, timer_val);
2052
2049
break;
2053
-
case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
2050
+
case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
2054
2051
tp->tx_lpi_timer = timer_val;
2055
2052
RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
2056
2053
break;
···
2258
2255
enum mac_version ver;
2259
2256
} mac_info[] = {
2260
2257
/* 8126A family. */
2261
-
{ 0x7cf, 0x64a, RTL_GIGA_MAC_VER_66 },
2262
-
{ 0x7cf, 0x649, RTL_GIGA_MAC_VER_65 },
2258
+
{ 0x7cf, 0x64a, RTL_GIGA_MAC_VER_71 },
2259
+
{ 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
2263
2260
2264
2261
/* 8125D family. */
2262
+
{ 0x7cf, 0x689, RTL_GIGA_MAC_VER_65 },
2265
2263
{ 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
2266
2264
2267
2265
/* 8125B family. */
···
2530
2526
case RTL_GIGA_MAC_VER_61:
2531
2527
RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
2532
2528
break;
2533
-
case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
2529
+
case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
2534
2530
RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
2535
2531
RX_PAUSE_SLOT_ON);
2536
2532
break;
···
2662
2658
case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_61:
2663
2659
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
2664
2660
break;
2665
-
case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
2661
+
case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
2666
2662
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
2667
2663
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
2668
2664
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond_2, 100, 42);
···
2905
2901
case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_38:
2906
2902
rtl_eri_set_bits(tp, 0xd4, 0x0c00);
2907
2903
break;
2908
-
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
2904
+
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
2909
2905
r8168_mac_ocp_modify(tp, 0xc0ac, 0, 0x1f80);
2910
2906
break;
2911
2907
default:
···
2919
2915
case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:
2920
2916
rtl_eri_clear_bits(tp, 0xd4, 0x1f00);
2921
2917
break;
2922
-
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
2918
+
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
2923
2919
r8168_mac_ocp_modify(tp, 0xc0ac, 0x1f80, 0);
2924
2920
break;
2925
2921
default:
···
2945
2941
2946
2942
rtl_mod_config5(tp, 0, ASPM_en);
2947
2943
switch (tp->mac_version) {
2948
-
case RTL_GIGA_MAC_VER_65:
2949
-
case RTL_GIGA_MAC_VER_66:
2944
+
case RTL_GIGA_MAC_VER_70:
2945
+
case RTL_GIGA_MAC_VER_71:
2950
2946
val8 = RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKREQEN;
2951
2947
RTL_W8(tp, INT_CFG0_8125, val8);
2952
2948
break;
···
2957
2953
2958
2954
switch (tp->mac_version) {
2959
2955
case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
2960
-
case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
2956
+
case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
2961
2957
/* reset ephy tx/rx disable timer */
2962
2958
r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0);
2963
2959
/* chip can trigger L1.2 */
···
2969
2965
} else {
2970
2966
switch (tp->mac_version) {
2971
2967
case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
2972
-
case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
2968
+
case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
2973
2969
r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0);
2974
2970
break;
2975
2971
default:
···
2977
2973
}
2978
2974
2979
2975
switch (tp->mac_version) {
2980
-
case RTL_GIGA_MAC_VER_65:
2981
-
case RTL_GIGA_MAC_VER_66:
2976
+
case RTL_GIGA_MAC_VER_70:
2977
+
case RTL_GIGA_MAC_VER_71:
2982
2978
val8 = RTL_R8(tp, INT_CFG0_8125) & ~INT_CFG0_CLKREQEN;
2983
2979
RTL_W8(tp, INT_CFG0_8125, val8);
2984
2980
break;
···
3698
3694
/* disable new tx descriptor format */
3699
3695
r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000);
3700
3696
3701
-
if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
3702
-
tp->mac_version == RTL_GIGA_MAC_VER_66)
3697
+
if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
3698
+
tp->mac_version == RTL_GIGA_MAC_VER_71)
3703
3699
RTL_W8(tp, 0xD8, RTL_R8(tp, 0xD8) & ~0x02);
3704
3700
3705
-
if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
3706
-
tp->mac_version == RTL_GIGA_MAC_VER_66)
3701
+
if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
3702
+
tp->mac_version == RTL_GIGA_MAC_VER_71)
3707
3703
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);
3708
3704
else if (tp->mac_version == RTL_GIGA_MAC_VER_63)
3709
3705
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200);
···
3721
3717
r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0030);
3722
3718
r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000);
3723
3719
r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001);
3724
-
if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
3725
-
tp->mac_version == RTL_GIGA_MAC_VER_66)
3720
+
if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
3721
+
tp->mac_version == RTL_GIGA_MAC_VER_71)
3726
3722
r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000);
3727
3723
else
3728
3724
r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000);
···
3841
3837
[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
3842
3838
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
3843
3839
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
3844
-
[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
3845
-
[RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,
3840
+
[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
3841
+
[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
3842
+
[RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
3846
3843
};
3847
3844
3848
3845
if (hw_configs[tp->mac_version])
···
3860
3855
switch (tp->mac_version) {
3861
3856
case RTL_GIGA_MAC_VER_61:
3862
3857
case RTL_GIGA_MAC_VER_64:
3858
+
case RTL_GIGA_MAC_VER_65:
3863
3859
for (i = 0xa00; i < 0xb00; i += 4)
3864
3860
RTL_W32(tp, i, 0);
3865
3861
break;
3866
3862
case RTL_GIGA_MAC_VER_63:
3867
-
case RTL_GIGA_MAC_VER_65:
3868
-
case RTL_GIGA_MAC_VER_66:
3863
+
case RTL_GIGA_MAC_VER_70:
3864
+
case RTL_GIGA_MAC_VER_71:
3869
3865
for (i = 0xa00; i < 0xa80; i += 4)
3870
3866
RTL_W32(tp, i, 0);
3871
3867
RTL_W16(tp, INT_CFG1_8125, 0x0000);
···
4098
4092
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
4099
4093
rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
4100
4094
break;
4101
-
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
4095
+
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
4102
4096
rtl_enable_rxdvgate(tp);
4103
4097
fsleep(2000);
4104
4098
break;
···
4255
4249
4256
4250
switch (tp->mac_version) {
4257
4251
case RTL_GIGA_MAC_VER_34:
4258
-
case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
4252
+
case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
4259
4253
padto = max_t(unsigned int, padto, ETH_ZLEN);
4260
4254
break;
4261
4255
default:
···
5273
5267
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:
5274
5268
rtl_hw_init_8168g(tp);
5275
5269
break;
5276
-
case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
5270
+
case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
5277
5271
rtl_hw_init_8125(tp);
5278
5272
break;
5279
5273
default:
+3
-2
drivers/net/ethernet/realtek/r8169_phy_config.c
+3
-2
drivers/net/ethernet/realtek/r8169_phy_config.c
···
1162
1162
[RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
1163
1163
[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
1164
1164
[RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
1165
-
[RTL_GIGA_MAC_VER_65] = rtl8126a_hw_phy_config,
1166
-
[RTL_GIGA_MAC_VER_66] = rtl8126a_hw_phy_config,
1165
+
[RTL_GIGA_MAC_VER_65] = rtl8125d_hw_phy_config,
1166
+
[RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
1167
+
[RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
1167
1168
};
1168
1169
1169
1170
if (phy_configs[ver])