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crypto: atmel - Remove cfb and ofb

Remove the unused CFB/OFB implementation.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

+8 -411
+2 -212
drivers/crypto/atmel-aes.c
··· 46 46 #define ATMEL_AES_BUFFER_ORDER 2 47 47 #define ATMEL_AES_BUFFER_SIZE (PAGE_SIZE << ATMEL_AES_BUFFER_ORDER) 48 48 49 - #define CFB8_BLOCK_SIZE 1 50 - #define CFB16_BLOCK_SIZE 2 51 - #define CFB32_BLOCK_SIZE 4 52 - #define CFB64_BLOCK_SIZE 8 53 - 54 49 #define SIZE_IN_WORDS(x) ((x) >> 2) 55 50 56 51 /* AES flags */ ··· 55 60 #define AES_FLAGS_OPMODE_MASK (AES_MR_OPMOD_MASK | AES_MR_CFBS_MASK) 56 61 #define AES_FLAGS_ECB AES_MR_OPMOD_ECB 57 62 #define AES_FLAGS_CBC AES_MR_OPMOD_CBC 58 - #define AES_FLAGS_OFB AES_MR_OPMOD_OFB 59 - #define AES_FLAGS_CFB128 (AES_MR_OPMOD_CFB | AES_MR_CFBS_128b) 60 - #define AES_FLAGS_CFB64 (AES_MR_OPMOD_CFB | AES_MR_CFBS_64b) 61 - #define AES_FLAGS_CFB32 (AES_MR_OPMOD_CFB | AES_MR_CFBS_32b) 62 - #define AES_FLAGS_CFB16 (AES_MR_OPMOD_CFB | AES_MR_CFBS_16b) 63 - #define AES_FLAGS_CFB8 (AES_MR_OPMOD_CFB | AES_MR_CFBS_8b) 64 63 #define AES_FLAGS_CTR AES_MR_OPMOD_CTR 65 64 #define AES_FLAGS_GCM AES_MR_OPMOD_GCM 66 65 #define AES_FLAGS_XTS AES_MR_OPMOD_XTS ··· 76 87 77 88 struct atmel_aes_caps { 78 89 bool has_dualbuff; 79 - bool has_cfb64; 80 90 bool has_gcm; 81 91 bool has_xts; 82 92 bool has_authenc; ··· 848 860 int err; 849 861 850 862 switch (dd->ctx->block_size) { 851 - case CFB8_BLOCK_SIZE: 852 - addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 853 - maxburst = 1; 854 - break; 855 - 856 - case CFB16_BLOCK_SIZE: 857 - addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 858 - maxburst = 1; 859 - break; 860 - 861 - case CFB32_BLOCK_SIZE: 862 - case CFB64_BLOCK_SIZE: 863 - addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 864 - maxburst = 1; 865 - break; 866 - 867 863 case AES_BLOCK_SIZE: 868 864 addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 869 865 maxburst = dd->caps.max_burst_size; ··· 1075 1103 } 1076 1104 1077 1105 /* 1078 - * ECB, CBC, CFB, OFB or CTR mode require the plaintext and ciphertext 1106 + * ECB, CBC or CTR mode require the plaintext and ciphertext 1079 1107 * to have a positve integer length. 1080 1108 */ 1081 1109 if (!req->cryptlen && opmode != AES_FLAGS_XTS) ··· 1085 1113 !IS_ALIGNED(req->cryptlen, crypto_skcipher_blocksize(skcipher))) 1086 1114 return -EINVAL; 1087 1115 1088 - switch (mode & AES_FLAGS_OPMODE_MASK) { 1089 - case AES_FLAGS_CFB8: 1090 - ctx->block_size = CFB8_BLOCK_SIZE; 1091 - break; 1092 - 1093 - case AES_FLAGS_CFB16: 1094 - ctx->block_size = CFB16_BLOCK_SIZE; 1095 - break; 1096 - 1097 - case AES_FLAGS_CFB32: 1098 - ctx->block_size = CFB32_BLOCK_SIZE; 1099 - break; 1100 - 1101 - case AES_FLAGS_CFB64: 1102 - ctx->block_size = CFB64_BLOCK_SIZE; 1103 - break; 1104 - 1105 - default: 1106 - ctx->block_size = AES_BLOCK_SIZE; 1107 - break; 1108 - } 1116 + ctx->block_size = AES_BLOCK_SIZE; 1109 1117 ctx->is_aead = false; 1110 1118 1111 1119 rctx = skcipher_request_ctx(req); ··· 1138 1186 static int atmel_aes_cbc_decrypt(struct skcipher_request *req) 1139 1187 { 1140 1188 return atmel_aes_crypt(req, AES_FLAGS_CBC); 1141 - } 1142 - 1143 - static int atmel_aes_ofb_encrypt(struct skcipher_request *req) 1144 - { 1145 - return atmel_aes_crypt(req, AES_FLAGS_OFB | AES_FLAGS_ENCRYPT); 1146 - } 1147 - 1148 - static int atmel_aes_ofb_decrypt(struct skcipher_request *req) 1149 - { 1150 - return atmel_aes_crypt(req, AES_FLAGS_OFB); 1151 - } 1152 - 1153 - static int atmel_aes_cfb_encrypt(struct skcipher_request *req) 1154 - { 1155 - return atmel_aes_crypt(req, AES_FLAGS_CFB128 | AES_FLAGS_ENCRYPT); 1156 - } 1157 - 1158 - static int atmel_aes_cfb_decrypt(struct skcipher_request *req) 1159 - { 1160 - return atmel_aes_crypt(req, AES_FLAGS_CFB128); 1161 - } 1162 - 1163 - static int atmel_aes_cfb64_encrypt(struct skcipher_request *req) 1164 - { 1165 - return atmel_aes_crypt(req, AES_FLAGS_CFB64 | AES_FLAGS_ENCRYPT); 1166 - } 1167 - 1168 - static int atmel_aes_cfb64_decrypt(struct skcipher_request *req) 1169 - { 1170 - return atmel_aes_crypt(req, AES_FLAGS_CFB64); 1171 - } 1172 - 1173 - static int atmel_aes_cfb32_encrypt(struct skcipher_request *req) 1174 - { 1175 - return atmel_aes_crypt(req, AES_FLAGS_CFB32 | AES_FLAGS_ENCRYPT); 1176 - } 1177 - 1178 - static int atmel_aes_cfb32_decrypt(struct skcipher_request *req) 1179 - { 1180 - return atmel_aes_crypt(req, AES_FLAGS_CFB32); 1181 - } 1182 - 1183 - static int atmel_aes_cfb16_encrypt(struct skcipher_request *req) 1184 - { 1185 - return atmel_aes_crypt(req, AES_FLAGS_CFB16 | AES_FLAGS_ENCRYPT); 1186 - } 1187 - 1188 - static int atmel_aes_cfb16_decrypt(struct skcipher_request *req) 1189 - { 1190 - return atmel_aes_crypt(req, AES_FLAGS_CFB16); 1191 - } 1192 - 1193 - static int atmel_aes_cfb8_encrypt(struct skcipher_request *req) 1194 - { 1195 - return atmel_aes_crypt(req, AES_FLAGS_CFB8 | AES_FLAGS_ENCRYPT); 1196 - } 1197 - 1198 - static int atmel_aes_cfb8_decrypt(struct skcipher_request *req) 1199 - { 1200 - return atmel_aes_crypt(req, AES_FLAGS_CFB8); 1201 1189 } 1202 1190 1203 1191 static int atmel_aes_ctr_encrypt(struct skcipher_request *req) ··· 1211 1319 .ivsize = AES_BLOCK_SIZE, 1212 1320 }, 1213 1321 { 1214 - .base.cra_name = "ofb(aes)", 1215 - .base.cra_driver_name = "atmel-ofb-aes", 1216 - .base.cra_blocksize = 1, 1217 - .base.cra_ctxsize = sizeof(struct atmel_aes_ctx), 1218 - 1219 - .init = atmel_aes_init_tfm, 1220 - .min_keysize = AES_MIN_KEY_SIZE, 1221 - .max_keysize = AES_MAX_KEY_SIZE, 1222 - .setkey = atmel_aes_setkey, 1223 - .encrypt = atmel_aes_ofb_encrypt, 1224 - .decrypt = atmel_aes_ofb_decrypt, 1225 - .ivsize = AES_BLOCK_SIZE, 1226 - }, 1227 - { 1228 - .base.cra_name = "cfb(aes)", 1229 - .base.cra_driver_name = "atmel-cfb-aes", 1230 - .base.cra_blocksize = 1, 1231 - .base.cra_ctxsize = sizeof(struct atmel_aes_ctx), 1232 - 1233 - .init = atmel_aes_init_tfm, 1234 - .min_keysize = AES_MIN_KEY_SIZE, 1235 - .max_keysize = AES_MAX_KEY_SIZE, 1236 - .setkey = atmel_aes_setkey, 1237 - .encrypt = atmel_aes_cfb_encrypt, 1238 - .decrypt = atmel_aes_cfb_decrypt, 1239 - .ivsize = AES_BLOCK_SIZE, 1240 - }, 1241 - { 1242 - .base.cra_name = "cfb32(aes)", 1243 - .base.cra_driver_name = "atmel-cfb32-aes", 1244 - .base.cra_blocksize = CFB32_BLOCK_SIZE, 1245 - .base.cra_ctxsize = sizeof(struct atmel_aes_ctx), 1246 - 1247 - .init = atmel_aes_init_tfm, 1248 - .min_keysize = AES_MIN_KEY_SIZE, 1249 - .max_keysize = AES_MAX_KEY_SIZE, 1250 - .setkey = atmel_aes_setkey, 1251 - .encrypt = atmel_aes_cfb32_encrypt, 1252 - .decrypt = atmel_aes_cfb32_decrypt, 1253 - .ivsize = AES_BLOCK_SIZE, 1254 - }, 1255 - { 1256 - .base.cra_name = "cfb16(aes)", 1257 - .base.cra_driver_name = "atmel-cfb16-aes", 1258 - .base.cra_blocksize = CFB16_BLOCK_SIZE, 1259 - .base.cra_ctxsize = sizeof(struct atmel_aes_ctx), 1260 - 1261 - .init = atmel_aes_init_tfm, 1262 - .min_keysize = AES_MIN_KEY_SIZE, 1263 - .max_keysize = AES_MAX_KEY_SIZE, 1264 - .setkey = atmel_aes_setkey, 1265 - .encrypt = atmel_aes_cfb16_encrypt, 1266 - .decrypt = atmel_aes_cfb16_decrypt, 1267 - .ivsize = AES_BLOCK_SIZE, 1268 - }, 1269 - { 1270 - .base.cra_name = "cfb8(aes)", 1271 - .base.cra_driver_name = "atmel-cfb8-aes", 1272 - .base.cra_blocksize = CFB8_BLOCK_SIZE, 1273 - .base.cra_ctxsize = sizeof(struct atmel_aes_ctx), 1274 - 1275 - .init = atmel_aes_init_tfm, 1276 - .min_keysize = AES_MIN_KEY_SIZE, 1277 - .max_keysize = AES_MAX_KEY_SIZE, 1278 - .setkey = atmel_aes_setkey, 1279 - .encrypt = atmel_aes_cfb8_encrypt, 1280 - .decrypt = atmel_aes_cfb8_decrypt, 1281 - .ivsize = AES_BLOCK_SIZE, 1282 - }, 1283 - { 1284 1322 .base.cra_name = "ctr(aes)", 1285 1323 .base.cra_driver_name = "atmel-ctr-aes", 1286 1324 .base.cra_blocksize = 1, ··· 1224 1402 .decrypt = atmel_aes_ctr_decrypt, 1225 1403 .ivsize = AES_BLOCK_SIZE, 1226 1404 }, 1227 - }; 1228 - 1229 - static struct skcipher_alg aes_cfb64_alg = { 1230 - .base.cra_name = "cfb64(aes)", 1231 - .base.cra_driver_name = "atmel-cfb64-aes", 1232 - .base.cra_blocksize = CFB64_BLOCK_SIZE, 1233 - .base.cra_ctxsize = sizeof(struct atmel_aes_ctx), 1234 - 1235 - .init = atmel_aes_init_tfm, 1236 - .min_keysize = AES_MIN_KEY_SIZE, 1237 - .max_keysize = AES_MAX_KEY_SIZE, 1238 - .setkey = atmel_aes_setkey, 1239 - .encrypt = atmel_aes_cfb64_encrypt, 1240 - .decrypt = atmel_aes_cfb64_decrypt, 1241 - .ivsize = AES_BLOCK_SIZE, 1242 1405 }; 1243 1406 1244 1407 ··· 2214 2407 if (dd->caps.has_gcm) 2215 2408 crypto_unregister_aead(&aes_gcm_alg); 2216 2409 2217 - if (dd->caps.has_cfb64) 2218 - crypto_unregister_skcipher(&aes_cfb64_alg); 2219 - 2220 2410 for (i = 0; i < ARRAY_SIZE(aes_algs); i++) 2221 2411 crypto_unregister_skcipher(&aes_algs[i]); 2222 2412 } ··· 2236 2432 err = crypto_register_skcipher(&aes_algs[i]); 2237 2433 if (err) 2238 2434 goto err_aes_algs; 2239 - } 2240 - 2241 - if (dd->caps.has_cfb64) { 2242 - atmel_aes_crypto_alg_init(&aes_cfb64_alg.base); 2243 - 2244 - err = crypto_register_skcipher(&aes_cfb64_alg); 2245 - if (err) 2246 - goto err_aes_cfb64_alg; 2247 2435 } 2248 2436 2249 2437 if (dd->caps.has_gcm) { ··· 2278 2482 err_aes_xts_alg: 2279 2483 crypto_unregister_aead(&aes_gcm_alg); 2280 2484 err_aes_gcm_alg: 2281 - crypto_unregister_skcipher(&aes_cfb64_alg); 2282 - err_aes_cfb64_alg: 2283 2485 i = ARRAY_SIZE(aes_algs); 2284 2486 err_aes_algs: 2285 2487 for (j = 0; j < i; j++) ··· 2289 2495 static void atmel_aes_get_cap(struct atmel_aes_dev *dd) 2290 2496 { 2291 2497 dd->caps.has_dualbuff = 0; 2292 - dd->caps.has_cfb64 = 0; 2293 2498 dd->caps.has_gcm = 0; 2294 2499 dd->caps.has_xts = 0; 2295 2500 dd->caps.has_authenc = 0; ··· 2300 2507 case 0x600: 2301 2508 case 0x500: 2302 2509 dd->caps.has_dualbuff = 1; 2303 - dd->caps.has_cfb64 = 1; 2304 2510 dd->caps.has_gcm = 1; 2305 2511 dd->caps.has_xts = 1; 2306 2512 dd->caps.has_authenc = 1; ··· 2307 2515 break; 2308 2516 case 0x200: 2309 2517 dd->caps.has_dualbuff = 1; 2310 - dd->caps.has_cfb64 = 1; 2311 2518 dd->caps.has_gcm = 1; 2312 2519 dd->caps.max_burst_size = 4; 2313 2520 break; 2314 2521 case 0x130: 2315 2522 dd->caps.has_dualbuff = 1; 2316 - dd->caps.has_cfb64 = 1; 2317 2523 dd->caps.max_burst_size = 4; 2318 2524 break; 2319 2525 case 0x120:
+6 -199
drivers/crypto/atmel-tdes.c
··· 45 45 #define TDES_FLAGS_OPMODE_MASK (TDES_MR_OPMOD_MASK | TDES_MR_CFBS_MASK) 46 46 #define TDES_FLAGS_ECB TDES_MR_OPMOD_ECB 47 47 #define TDES_FLAGS_CBC TDES_MR_OPMOD_CBC 48 - #define TDES_FLAGS_OFB TDES_MR_OPMOD_OFB 49 - #define TDES_FLAGS_CFB64 (TDES_MR_OPMOD_CFB | TDES_MR_CFBS_64b) 50 - #define TDES_FLAGS_CFB32 (TDES_MR_OPMOD_CFB | TDES_MR_CFBS_32b) 51 - #define TDES_FLAGS_CFB16 (TDES_MR_OPMOD_CFB | TDES_MR_CFBS_16b) 52 - #define TDES_FLAGS_CFB8 (TDES_MR_OPMOD_CFB | TDES_MR_CFBS_8b) 53 48 54 49 #define TDES_FLAGS_MODE_MASK (TDES_FLAGS_OPMODE_MASK | TDES_FLAGS_ENCRYPT) 55 50 ··· 55 60 56 61 #define ATMEL_TDES_QUEUE_LENGTH 50 57 62 58 - #define CFB8_BLOCK_SIZE 1 59 - #define CFB16_BLOCK_SIZE 2 60 - #define CFB32_BLOCK_SIZE 4 61 - 62 63 struct atmel_tdes_caps { 63 64 bool has_dma; 64 - u32 has_cfb_3keys; 65 65 }; 66 66 67 67 struct atmel_tdes_dev; ··· 366 376 dma_addr_t dma_addr_in, 367 377 dma_addr_t dma_addr_out, int length) 368 378 { 369 - struct atmel_tdes_reqctx *rctx = skcipher_request_ctx(dd->req); 370 379 int len32; 371 380 372 381 dd->dma_size = length; ··· 375 386 DMA_TO_DEVICE); 376 387 } 377 388 378 - switch (rctx->mode & TDES_FLAGS_OPMODE_MASK) { 379 - case TDES_FLAGS_CFB8: 380 - len32 = DIV_ROUND_UP(length, sizeof(u8)); 381 - break; 382 - 383 - case TDES_FLAGS_CFB16: 384 - len32 = DIV_ROUND_UP(length, sizeof(u16)); 385 - break; 386 - 387 - default: 388 - len32 = DIV_ROUND_UP(length, sizeof(u32)); 389 - break; 390 - } 389 + len32 = DIV_ROUND_UP(length, sizeof(u32)); 391 390 392 391 atmel_tdes_write(dd, TDES_PTCR, TDES_PTCR_TXTDIS|TDES_PTCR_RXTDIS); 393 392 atmel_tdes_write(dd, TDES_TPR, dma_addr_in); ··· 396 419 dma_addr_t dma_addr_in, 397 420 dma_addr_t dma_addr_out, int length) 398 421 { 399 - struct atmel_tdes_reqctx *rctx = skcipher_request_ctx(dd->req); 400 422 struct scatterlist sg[2]; 401 423 struct dma_async_tx_descriptor *in_desc, *out_desc; 402 424 enum dma_slave_buswidth addr_width; ··· 407 431 DMA_TO_DEVICE); 408 432 } 409 433 410 - switch (rctx->mode & TDES_FLAGS_OPMODE_MASK) { 411 - case TDES_FLAGS_CFB8: 412 - addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 413 - break; 414 - 415 - case TDES_FLAGS_CFB16: 416 - addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 417 - break; 418 - 419 - default: 420 - addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 421 - break; 422 - } 434 + addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 423 435 424 436 dd->dma_lch_in.dma_conf.dst_addr_width = addr_width; 425 437 dd->dma_lch_out.dma_conf.src_addr_width = addr_width; ··· 644 680 if (!req->cryptlen) 645 681 return 0; 646 682 647 - switch (mode & TDES_FLAGS_OPMODE_MASK) { 648 - case TDES_FLAGS_CFB8: 649 - if (!IS_ALIGNED(req->cryptlen, CFB8_BLOCK_SIZE)) { 650 - dev_dbg(dev, "request size is not exact amount of CFB8 blocks\n"); 651 - return -EINVAL; 652 - } 653 - ctx->block_size = CFB8_BLOCK_SIZE; 654 - break; 655 - 656 - case TDES_FLAGS_CFB16: 657 - if (!IS_ALIGNED(req->cryptlen, CFB16_BLOCK_SIZE)) { 658 - dev_dbg(dev, "request size is not exact amount of CFB16 blocks\n"); 659 - return -EINVAL; 660 - } 661 - ctx->block_size = CFB16_BLOCK_SIZE; 662 - break; 663 - 664 - case TDES_FLAGS_CFB32: 665 - if (!IS_ALIGNED(req->cryptlen, CFB32_BLOCK_SIZE)) { 666 - dev_dbg(dev, "request size is not exact amount of CFB32 blocks\n"); 667 - return -EINVAL; 668 - } 669 - ctx->block_size = CFB32_BLOCK_SIZE; 670 - break; 671 - 672 - default: 673 - if (!IS_ALIGNED(req->cryptlen, DES_BLOCK_SIZE)) { 674 - dev_dbg(dev, "request size is not exact amount of DES blocks\n"); 675 - return -EINVAL; 676 - } 677 - ctx->block_size = DES_BLOCK_SIZE; 678 - break; 683 + if (!IS_ALIGNED(req->cryptlen, DES_BLOCK_SIZE)) { 684 + dev_dbg(dev, "request size is not exact amount of DES blocks\n"); 685 + return -EINVAL; 679 686 } 687 + ctx->block_size = DES_BLOCK_SIZE; 680 688 681 689 rctx->mode = mode; 682 690 ··· 768 832 { 769 833 return atmel_tdes_crypt(req, TDES_FLAGS_CBC); 770 834 } 771 - static int atmel_tdes_cfb_encrypt(struct skcipher_request *req) 772 - { 773 - return atmel_tdes_crypt(req, TDES_FLAGS_CFB64 | TDES_FLAGS_ENCRYPT); 774 - } 775 - 776 - static int atmel_tdes_cfb_decrypt(struct skcipher_request *req) 777 - { 778 - return atmel_tdes_crypt(req, TDES_FLAGS_CFB64); 779 - } 780 - 781 - static int atmel_tdes_cfb8_encrypt(struct skcipher_request *req) 782 - { 783 - return atmel_tdes_crypt(req, TDES_FLAGS_CFB8 | TDES_FLAGS_ENCRYPT); 784 - } 785 - 786 - static int atmel_tdes_cfb8_decrypt(struct skcipher_request *req) 787 - { 788 - return atmel_tdes_crypt(req, TDES_FLAGS_CFB8); 789 - } 790 - 791 - static int atmel_tdes_cfb16_encrypt(struct skcipher_request *req) 792 - { 793 - return atmel_tdes_crypt(req, TDES_FLAGS_CFB16 | TDES_FLAGS_ENCRYPT); 794 - } 795 - 796 - static int atmel_tdes_cfb16_decrypt(struct skcipher_request *req) 797 - { 798 - return atmel_tdes_crypt(req, TDES_FLAGS_CFB16); 799 - } 800 - 801 - static int atmel_tdes_cfb32_encrypt(struct skcipher_request *req) 802 - { 803 - return atmel_tdes_crypt(req, TDES_FLAGS_CFB32 | TDES_FLAGS_ENCRYPT); 804 - } 805 - 806 - static int atmel_tdes_cfb32_decrypt(struct skcipher_request *req) 807 - { 808 - return atmel_tdes_crypt(req, TDES_FLAGS_CFB32); 809 - } 810 - 811 - static int atmel_tdes_ofb_encrypt(struct skcipher_request *req) 812 - { 813 - return atmel_tdes_crypt(req, TDES_FLAGS_OFB | TDES_FLAGS_ENCRYPT); 814 - } 815 - 816 - static int atmel_tdes_ofb_decrypt(struct skcipher_request *req) 817 - { 818 - return atmel_tdes_crypt(req, TDES_FLAGS_OFB); 819 - } 820 835 821 836 static int atmel_tdes_init_tfm(struct crypto_skcipher *tfm) 822 837 { ··· 819 932 .decrypt = atmel_tdes_cbc_decrypt, 820 933 }, 821 934 { 822 - .base.cra_name = "cfb(des)", 823 - .base.cra_driver_name = "atmel-cfb-des", 824 - .base.cra_blocksize = DES_BLOCK_SIZE, 825 - .base.cra_alignmask = 0x7, 826 - 827 - .min_keysize = DES_KEY_SIZE, 828 - .max_keysize = DES_KEY_SIZE, 829 - .ivsize = DES_BLOCK_SIZE, 830 - .setkey = atmel_des_setkey, 831 - .encrypt = atmel_tdes_cfb_encrypt, 832 - .decrypt = atmel_tdes_cfb_decrypt, 833 - }, 834 - { 835 - .base.cra_name = "cfb8(des)", 836 - .base.cra_driver_name = "atmel-cfb8-des", 837 - .base.cra_blocksize = CFB8_BLOCK_SIZE, 838 - .base.cra_alignmask = 0, 839 - 840 - .min_keysize = DES_KEY_SIZE, 841 - .max_keysize = DES_KEY_SIZE, 842 - .ivsize = DES_BLOCK_SIZE, 843 - .setkey = atmel_des_setkey, 844 - .encrypt = atmel_tdes_cfb8_encrypt, 845 - .decrypt = atmel_tdes_cfb8_decrypt, 846 - }, 847 - { 848 - .base.cra_name = "cfb16(des)", 849 - .base.cra_driver_name = "atmel-cfb16-des", 850 - .base.cra_blocksize = CFB16_BLOCK_SIZE, 851 - .base.cra_alignmask = 0x1, 852 - 853 - .min_keysize = DES_KEY_SIZE, 854 - .max_keysize = DES_KEY_SIZE, 855 - .ivsize = DES_BLOCK_SIZE, 856 - .setkey = atmel_des_setkey, 857 - .encrypt = atmel_tdes_cfb16_encrypt, 858 - .decrypt = atmel_tdes_cfb16_decrypt, 859 - }, 860 - { 861 - .base.cra_name = "cfb32(des)", 862 - .base.cra_driver_name = "atmel-cfb32-des", 863 - .base.cra_blocksize = CFB32_BLOCK_SIZE, 864 - .base.cra_alignmask = 0x3, 865 - 866 - .min_keysize = DES_KEY_SIZE, 867 - .max_keysize = DES_KEY_SIZE, 868 - .ivsize = DES_BLOCK_SIZE, 869 - .setkey = atmel_des_setkey, 870 - .encrypt = atmel_tdes_cfb32_encrypt, 871 - .decrypt = atmel_tdes_cfb32_decrypt, 872 - }, 873 - { 874 - .base.cra_name = "ofb(des)", 875 - .base.cra_driver_name = "atmel-ofb-des", 876 - .base.cra_blocksize = 1, 877 - .base.cra_alignmask = 0x7, 878 - 879 - .min_keysize = DES_KEY_SIZE, 880 - .max_keysize = DES_KEY_SIZE, 881 - .ivsize = DES_BLOCK_SIZE, 882 - .setkey = atmel_des_setkey, 883 - .encrypt = atmel_tdes_ofb_encrypt, 884 - .decrypt = atmel_tdes_ofb_decrypt, 885 - }, 886 - { 887 935 .base.cra_name = "ecb(des3_ede)", 888 936 .base.cra_driver_name = "atmel-ecb-tdes", 889 937 .base.cra_blocksize = DES_BLOCK_SIZE, ··· 841 1019 .setkey = atmel_tdes_setkey, 842 1020 .encrypt = atmel_tdes_cbc_encrypt, 843 1021 .decrypt = atmel_tdes_cbc_decrypt, 844 - .ivsize = DES_BLOCK_SIZE, 845 - }, 846 - { 847 - .base.cra_name = "ofb(des3_ede)", 848 - .base.cra_driver_name = "atmel-ofb-tdes", 849 - .base.cra_blocksize = DES_BLOCK_SIZE, 850 - .base.cra_alignmask = 0x7, 851 - 852 - .min_keysize = DES3_EDE_KEY_SIZE, 853 - .max_keysize = DES3_EDE_KEY_SIZE, 854 - .setkey = atmel_tdes_setkey, 855 - .encrypt = atmel_tdes_ofb_encrypt, 856 - .decrypt = atmel_tdes_ofb_decrypt, 857 1022 .ivsize = DES_BLOCK_SIZE, 858 1023 }, 859 1024 }; ··· 930 1121 { 931 1122 932 1123 dd->caps.has_dma = 0; 933 - dd->caps.has_cfb_3keys = 0; 934 1124 935 1125 /* keep only major version number */ 936 1126 switch (dd->hw_version & 0xf00) { 937 1127 case 0x800: 938 1128 case 0x700: 939 1129 dd->caps.has_dma = 1; 940 - dd->caps.has_cfb_3keys = 1; 941 1130 break; 942 1131 case 0x600: 943 1132 break;