Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/radeon: Do not implement mode_set_base_atomic callback
Remove the implementation of the CRTC helper mode_set_base_atomic
from radeon. It pretends to provide mode setting for kdb debugging,
but has been broken for some time.
Kdb output has been supported only for non-atomic mode setting since
commit 9c79e0b1d096 ("drm/fb-helper: Give up on kgdb for atomic drivers")
from 2017.
While radeon provides non-atomic mode setting, kdb assumes that the GEM
buffer object is at a fixed location in video memory. This assumption
currently blocks radeon from converting to generic fbdev emulation.
Fbdev-ttm helpers use a shadow buffer with a movable GEM buffer object.
Triggering kdb does therefore not update the display.
Another problem is that the current implementation does not handle
USB keyboard input. Therefore a serial terminal is required. Then when
continuing from the debugger, radeon fails with an error:
[7]kdb> go
[ 40.345523][ C7] BUG: scheduling while atomic: bash/1580/0x00110003
[...]
[ 40.345613][ C7] schedule+0x27/0xd0
[ 40.345615][ C7] schedule_timeout+0x7b/0x100
[ 40.345617][ C7] ? __pfx_process_timeout+0x10/0x10
[ 40.345619][ C7] msleep+0x31/0x50
[ 40.345621][ C7] radeon_crtc_load_lut+0x2e4/0xcb0 [radeon 31c1ee785de120fcfd0babcc09babb3770252b4e]
[ 40.345698][ C7] radeon_crtc_gamma_set+0xe/0x20 [radeon 31c1ee785de120fcfd0babcc09babb3770252b4e]
[ 40.345760][ C7] drm_fb_helper_debug_leave+0xd8/0x130
[ 40.345763][ C7] kgdboc_post_exp_handler+0x54/0x70
[...]
and the system hangs.
Support for kdb feels pretty much broken. Hence remove the whole kdb
support from radeon.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Simona Vetter <simona.vetter@ffwll.ch>
Acked-by: Daniel Thompson (RISCstar) <danielt@kernel.org>
Link: https://patch.msgid.link/20251125130634.1080966-4-tzimmermann@suse.de
+26
-81
+19
-55
drivers/gpu/drm/radeon/atombios_crtc.c
+19
-55
drivers/gpu/drm/radeon/atombios_crtc.c
···
1133
1133
1134
1134
static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
1135
1135
struct drm_framebuffer *fb,
1136
-
int x, int y, int atomic)
1136
+
int x, int y)
1137
1137
{
1138
1138
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
1139
1139
struct drm_device *dev = crtc->dev;
···
1150
1150
bool bypass_lut = false;
1151
1151
1152
1152
/* no fb bound */
1153
-
if (!atomic && !crtc->primary->fb) {
1153
+
if (!crtc->primary->fb) {
1154
1154
DRM_DEBUG_KMS("No FB bound\n");
1155
1155
return 0;
1156
1156
}
1157
1157
1158
-
if (atomic)
1159
-
target_fb = fb;
1160
-
else
1161
-
target_fb = crtc->primary->fb;
1158
+
target_fb = crtc->primary->fb;
1162
1159
1163
-
/* If atomic, assume fb object is pinned & idle & fenced and
1164
-
* just update base pointers
1165
-
*/
1166
1160
obj = target_fb->obj[0];
1167
1161
rbo = gem_to_radeon_bo(obj);
1168
1162
r = radeon_bo_reserve(rbo, false);
1169
1163
if (unlikely(r != 0))
1170
1164
return r;
1171
1165
1172
-
if (atomic)
1173
-
fb_location = radeon_bo_gpu_offset(rbo);
1174
-
else {
1175
-
r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_location);
1176
-
if (unlikely(r != 0)) {
1177
-
radeon_bo_unreserve(rbo);
1178
-
return -EINVAL;
1179
-
}
1166
+
r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_location);
1167
+
if (unlikely(r != 0)) {
1168
+
radeon_bo_unreserve(rbo);
1169
+
return -EINVAL;
1180
1170
}
1181
1171
1182
1172
radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL);
···
1427
1437
/* set pageflip to happen anywhere in vblank interval */
1428
1438
WREG32(EVERGREEN_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 0);
1429
1439
1430
-
if (!atomic && fb && fb != crtc->primary->fb) {
1440
+
if (fb && fb != crtc->primary->fb) {
1431
1441
rbo = gem_to_radeon_bo(fb->obj[0]);
1432
1442
r = radeon_bo_reserve(rbo, false);
1433
1443
if (unlikely(r != 0))
···
1444
1454
1445
1455
static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
1446
1456
struct drm_framebuffer *fb,
1447
-
int x, int y, int atomic)
1457
+
int x, int y)
1448
1458
{
1449
1459
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
1450
1460
struct drm_device *dev = crtc->dev;
···
1460
1470
bool bypass_lut = false;
1461
1471
1462
1472
/* no fb bound */
1463
-
if (!atomic && !crtc->primary->fb) {
1473
+
if (!crtc->primary->fb) {
1464
1474
DRM_DEBUG_KMS("No FB bound\n");
1465
1475
return 0;
1466
1476
}
1467
1477
1468
-
if (atomic)
1469
-
target_fb = fb;
1470
-
else
1471
-
target_fb = crtc->primary->fb;
1478
+
target_fb = crtc->primary->fb;
1472
1479
1473
1480
obj = target_fb->obj[0];
1474
1481
rbo = gem_to_radeon_bo(obj);
···
1473
1486
if (unlikely(r != 0))
1474
1487
return r;
1475
1488
1476
-
/* If atomic, assume fb object is pinned & idle & fenced and
1477
-
* just update base pointers
1478
-
*/
1479
-
if (atomic)
1480
-
fb_location = radeon_bo_gpu_offset(rbo);
1481
-
else {
1482
-
r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_location);
1483
-
if (unlikely(r != 0)) {
1484
-
radeon_bo_unreserve(rbo);
1485
-
return -EINVAL;
1486
-
}
1489
+
r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_location);
1490
+
if (unlikely(r != 0)) {
1491
+
radeon_bo_unreserve(rbo);
1492
+
return -EINVAL;
1487
1493
}
1488
1494
radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL);
1489
1495
radeon_bo_unreserve(rbo);
···
1625
1645
/* set pageflip to happen only at start of vblank interval (front porch) */
1626
1646
WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 3);
1627
1647
1628
-
if (!atomic && fb && fb != crtc->primary->fb) {
1648
+
if (fb && fb != crtc->primary->fb) {
1629
1649
rbo = gem_to_radeon_bo(fb->obj[0]);
1630
1650
r = radeon_bo_reserve(rbo, false);
1631
1651
if (unlikely(r != 0))
···
1647
1667
struct radeon_device *rdev = dev->dev_private;
1648
1668
1649
1669
if (ASIC_IS_DCE4(rdev))
1650
-
return dce4_crtc_do_set_base(crtc, old_fb, x, y, 0);
1670
+
return dce4_crtc_do_set_base(crtc, old_fb, x, y);
1651
1671
else if (ASIC_IS_AVIVO(rdev))
1652
-
return avivo_crtc_do_set_base(crtc, old_fb, x, y, 0);
1672
+
return avivo_crtc_do_set_base(crtc, old_fb, x, y);
1653
1673
else
1654
-
return radeon_crtc_do_set_base(crtc, old_fb, x, y, 0);
1655
-
}
1656
-
1657
-
int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
1658
-
struct drm_framebuffer *fb,
1659
-
int x, int y, enum mode_set_atomic state)
1660
-
{
1661
-
struct drm_device *dev = crtc->dev;
1662
-
struct radeon_device *rdev = dev->dev_private;
1663
-
1664
-
if (ASIC_IS_DCE4(rdev))
1665
-
return dce4_crtc_do_set_base(crtc, fb, x, y, 1);
1666
-
else if (ASIC_IS_AVIVO(rdev))
1667
-
return avivo_crtc_do_set_base(crtc, fb, x, y, 1);
1668
-
else
1669
-
return radeon_crtc_do_set_base(crtc, fb, x, y, 1);
1674
+
return radeon_crtc_do_set_base(crtc, old_fb, x, y);
1670
1675
}
1671
1676
1672
1677
/* properly set additional regs when using atombios */
···
2180
2215
.mode_fixup = atombios_crtc_mode_fixup,
2181
2216
.mode_set = atombios_crtc_mode_set,
2182
2217
.mode_set_base = atombios_crtc_set_base,
2183
-
.mode_set_base_atomic = atombios_crtc_set_base_atomic,
2184
2218
.prepare = atombios_crtc_prepare,
2185
2219
.commit = atombios_crtc_commit,
2186
2220
.disable = atombios_crtc_disable,
+6
-17
drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+6
-17
drivers/gpu/drm/radeon/radeon_legacy_crtc.c
···
360
360
int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
361
361
struct drm_framebuffer *old_fb)
362
362
{
363
-
return radeon_crtc_do_set_base(crtc, old_fb, x, y, 0);
364
-
}
365
-
366
-
int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
367
-
struct drm_framebuffer *fb,
368
-
int x, int y, enum mode_set_atomic state)
369
-
{
370
-
return radeon_crtc_do_set_base(crtc, fb, x, y, 1);
363
+
return radeon_crtc_do_set_base(crtc, old_fb, x, y);
371
364
}
372
365
373
366
int radeon_crtc_do_set_base(struct drm_crtc *crtc,
374
367
struct drm_framebuffer *fb,
375
-
int x, int y, int atomic)
368
+
int x, int y)
376
369
{
377
370
struct drm_device *dev = crtc->dev;
378
371
struct radeon_device *rdev = dev->dev_private;
···
383
390
384
391
DRM_DEBUG_KMS("\n");
385
392
/* no fb bound */
386
-
if (!atomic && !crtc->primary->fb) {
393
+
if (!crtc->primary->fb) {
387
394
DRM_DEBUG_KMS("No FB bound\n");
388
395
return 0;
389
396
}
390
397
391
-
if (atomic)
392
-
target_fb = fb;
393
-
else
394
-
target_fb = crtc->primary->fb;
398
+
target_fb = crtc->primary->fb;
395
399
396
400
switch (target_fb->format->cpp[0] * 8) {
397
401
case 8:
···
435
445
* We don't shutdown the display controller because new buffer
436
446
* will end up in same spot.
437
447
*/
438
-
if (!atomic && fb && fb != crtc->primary->fb) {
448
+
if (fb && fb != crtc->primary->fb) {
439
449
struct radeon_bo *old_rbo;
440
450
unsigned long nsize, osize;
441
451
···
545
555
WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, crtc_offset);
546
556
WREG32(RADEON_CRTC_PITCH + radeon_crtc->crtc_offset, crtc_pitch);
547
557
548
-
if (!atomic && fb && fb != crtc->primary->fb) {
558
+
if (fb && fb != crtc->primary->fb) {
549
559
rbo = gem_to_radeon_bo(fb->obj[0]);
550
560
r = radeon_bo_reserve(rbo, false);
551
561
if (unlikely(r != 0))
···
1098
1108
.mode_fixup = radeon_crtc_mode_fixup,
1099
1109
.mode_set = radeon_crtc_mode_set,
1100
1110
.mode_set_base = radeon_crtc_set_base,
1101
-
.mode_set_base_atomic = radeon_crtc_set_base_atomic,
1102
1111
.prepare = radeon_crtc_prepare,
1103
1112
.commit = radeon_crtc_commit,
1104
1113
.disable = radeon_crtc_disable,
+1
-9
drivers/gpu/drm/radeon/radeon_mode.h
+1
-9
drivers/gpu/drm/radeon/radeon_mode.h
···
804
804
extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
805
805
extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
806
806
struct drm_framebuffer *old_fb);
807
-
extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
808
-
struct drm_framebuffer *fb,
809
-
int x, int y,
810
-
enum mode_set_atomic state);
811
807
extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
812
808
struct drm_display_mode *mode,
813
809
struct drm_display_mode *adjusted_mode,
···
813
817
814
818
extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
815
819
struct drm_framebuffer *old_fb);
816
-
extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
817
-
struct drm_framebuffer *fb,
818
-
int x, int y,
819
-
enum mode_set_atomic state);
820
820
extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
821
821
struct drm_framebuffer *fb,
822
-
int x, int y, int atomic);
822
+
int x, int y);
823
823
extern int radeon_crtc_cursor_set2(struct drm_crtc *crtc,
824
824
struct drm_file *file_priv,
825
825
uint32_t handle,