+10 -2

arch/s390/kernel/entry.S

reviewed

··· 535 535 l %r3,__LC_PGM_ILC # load program interruption code 536 536 la %r8,0x7f 537 537 nr %r8,%r3 # clear per-event-bit and ilc 538 538 - be BASED(pgm_exit) # only per or per+check ? 539 539 - b BASED(pgm_do_call) 538 538 + be BASED(pgm_exit2) # only per or per+check ? 539 539 + l %r7,BASED(.Ljump_table) 540 540 + sll %r8,2 541 541 + l %r7,0(%r8,%r7) # load address of handler routine 542 542 + la %r2,SP_PTREGS(%r15) # address of register-save area 543 543 + basr %r14,%r7 # branch to interrupt-handler 544 544 + pgm_exit2: 545 545 + TRACE_IRQS_ON 546 546 + stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 547 547 + b BASED(sysc_return) 540 548 541 549 # 542 550 # it was a single stepped SVC that is causing all the trouble

+10 -2

arch/s390/kernel/entry64.S

reviewed

··· 544 544 lgf %r3,__LC_PGM_ILC # load program interruption code 545 545 lghi %r8,0x7f 546 546 ngr %r8,%r3 # clear per-event-bit and ilc 547 547 - je pgm_exit 548 548 - j pgm_do_call 547 547 + je pgm_exit2 548 548 + sll %r8,3 549 549 + larl %r1,pgm_check_table 550 550 + lg %r1,0(%r8,%r1) # load address of handler routine 551 551 + la %r2,SP_PTREGS(%r15) # address of register-save area 552 552 + basr %r14,%r1 # branch to interrupt-handler 553 553 + pgm_exit2: 554 554 + TRACE_IRQS_ON 555 555 + stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 556 556 + j sysc_return 549 557 550 558 # 551 559 # it was a single stepped SVC that is causing all the trouble

+12 -6

arch/s390/kernel/time.c

reviewed

··· 524 524 if (!etr_eacr.sl) 525 525 return; 526 526 disable_sync_clock(NULL); 527 527 - set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events); 528 528 - queue_work(time_sync_wq, &etr_work); 527 527 + if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) { 528 528 + etr_eacr.es = etr_eacr.sl = 0; 529 529 + etr_setr(&etr_eacr); 530 530 + queue_work(time_sync_wq, &etr_work); 531 531 + } 529 532 } 530 533 531 534 /* ··· 542 539 if (!etr_eacr.es) 543 540 return; 544 541 disable_sync_clock(NULL); 545 545 - set_bit(ETR_EVENT_SYNC_CHECK, &etr_events); 546 546 - queue_work(time_sync_wq, &etr_work); 542 542 + if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) { 543 543 + etr_eacr.es = 0; 544 544 + etr_setr(&etr_eacr); 545 545 + queue_work(time_sync_wq, &etr_work); 546 546 + } 547 547 } 548 548 549 549 /* ··· 908 902 * Do not try to get the alternate port aib if the clock 909 903 * is not in sync yet. 910 904 */ 911 911 - if (!check_sync_clock()) 905 905 + if (!eacr.es || !check_sync_clock()) 912 906 return eacr; 913 907 914 908 /* ··· 1070 1064 * If the clock is in sync just update the eacr and return. 1071 1065 * If there is no valid sync port wait for a port update. 1072 1066 */ 1073 1073 - if (check_sync_clock() || sync_port < 0) { 1067 1067 + if ((eacr.es && check_sync_clock()) || sync_port < 0) { 1074 1068 etr_update_eacr(eacr); 1075 1069 etr_set_tolec_timeout(now); 1076 1070 goto out_unlock;