tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge tag 'gpio-fixes-for-v6.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio fixes from Bartosz Golaszewski:

- fix the level-low interrupt type support in gpio-mpc8xxx

- convert another two drivers to using immutable irq chips

- MAINTAINERS update

* tag 'gpio-fixes-for-v6.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
gpio: mt7621: Make the irqchip immutable
gpio: ixp4xx: Make irqchip immutable
MAINTAINERS: Update HiSilicon GPIO Driver maintainer
gpio: mpc8xxx: Fix support for IRQ_TYPE_LEVEL_LOW flow_type in mpc85xx

Linus Torvalds a335366b 6879c2d3

+31 -10
+1 -1
MAINTAINERS
··· 9122 9122 F: drivers/dma/hisi_dma.c 9123 9123 9124 9124 HISILICON GPIO DRIVER 9125 - M: Luo Jiaxing <luojiaxing@huawei.com> 9125 + M: Jay Fang <f.fangjian@huawei.com> 9126 9126 L: linux-gpio@vger.kernel.org 9127 9127 S: Maintained 9128 9128 F: drivers/gpio/gpio-hisi.c
+14 -3
drivers/gpio/gpio-ixp4xx.c
··· 63 63 __raw_writel(BIT(d->hwirq), g->base + IXP4XX_REG_GPIS); 64 64 } 65 65 66 + static void ixp4xx_gpio_mask_irq(struct irq_data *d) 67 + { 68 + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 69 + 70 + irq_chip_mask_parent(d); 71 + gpiochip_disable_irq(gc, d->hwirq); 72 + } 73 + 66 74 static void ixp4xx_gpio_irq_unmask(struct irq_data *d) 67 75 { 68 76 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); ··· 80 72 if (!(g->irq_edge & BIT(d->hwirq))) 81 73 ixp4xx_gpio_irq_ack(d); 82 74 75 + gpiochip_enable_irq(gc, d->hwirq); 83 76 irq_chip_unmask_parent(d); 84 77 } 85 78 ··· 158 149 return irq_chip_set_type_parent(d, IRQ_TYPE_LEVEL_HIGH); 159 150 } 160 151 161 - static struct irq_chip ixp4xx_gpio_irqchip = { 152 + static const struct irq_chip ixp4xx_gpio_irqchip = { 162 153 .name = "IXP4GPIO", 163 154 .irq_ack = ixp4xx_gpio_irq_ack, 164 - .irq_mask = irq_chip_mask_parent, 155 + .irq_mask = ixp4xx_gpio_mask_irq, 165 156 .irq_unmask = ixp4xx_gpio_irq_unmask, 166 157 .irq_set_type = ixp4xx_gpio_irq_set_type, 158 + .flags = IRQCHIP_IMMUTABLE, 159 + GPIOCHIP_IRQ_RESOURCE_HELPERS, 167 160 }; 168 161 169 162 static int ixp4xx_gpio_child_to_parent_hwirq(struct gpio_chip *gc, ··· 274 263 g->gc.owner = THIS_MODULE; 275 264 276 265 girq = &g->gc.irq; 277 - girq->chip = &ixp4xx_gpio_irqchip; 266 + gpio_irq_chip_set_chip(girq, &ixp4xx_gpio_irqchip); 278 267 girq->fwnode = g->fwnode; 279 268 girq->parent_domain = parent; 280 269 girq->child_to_parent_hwirq = ixp4xx_gpio_child_to_parent_hwirq;
+1
drivers/gpio/gpio-mpc8xxx.c
··· 169 169 170 170 switch (flow_type) { 171 171 case IRQ_TYPE_EDGE_FALLING: 172 + case IRQ_TYPE_LEVEL_LOW: 172 173 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); 173 174 gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR, 174 175 gc->read_reg(mpc8xxx_gc->regs + GPIO_ICR)
+15 -6
drivers/gpio/gpio-mt7621.c
··· 112 112 unsigned long flags; 113 113 u32 rise, fall, high, low; 114 114 115 + gpiochip_enable_irq(gc, d->hwirq); 116 + 115 117 spin_lock_irqsave(&rg->lock, flags); 116 118 rise = mtk_gpio_r32(rg, GPIO_REG_REDGE); 117 119 fall = mtk_gpio_r32(rg, GPIO_REG_FEDGE); ··· 145 143 mtk_gpio_w32(rg, GPIO_REG_HLVL, high & ~BIT(pin)); 146 144 mtk_gpio_w32(rg, GPIO_REG_LLVL, low & ~BIT(pin)); 147 145 spin_unlock_irqrestore(&rg->lock, flags); 146 + 147 + gpiochip_disable_irq(gc, d->hwirq); 148 148 } 149 149 150 150 static int ··· 208 204 return gpio % MTK_BANK_WIDTH; 209 205 } 210 206 207 + static const struct irq_chip mt7621_irq_chip = { 208 + .name = "mt7621-gpio", 209 + .irq_mask_ack = mediatek_gpio_irq_mask, 210 + .irq_mask = mediatek_gpio_irq_mask, 211 + .irq_unmask = mediatek_gpio_irq_unmask, 212 + .irq_set_type = mediatek_gpio_irq_type, 213 + .flags = IRQCHIP_IMMUTABLE, 214 + GPIOCHIP_IRQ_RESOURCE_HELPERS, 215 + }; 216 + 211 217 static int 212 218 mediatek_gpio_bank_probe(struct device *dev, int bank) 213 219 { ··· 252 238 return -ENOMEM; 253 239 254 240 rg->chip.offset = bank * MTK_BANK_WIDTH; 255 - rg->irq_chip.name = dev_name(dev); 256 - rg->irq_chip.irq_unmask = mediatek_gpio_irq_unmask; 257 - rg->irq_chip.irq_mask = mediatek_gpio_irq_mask; 258 - rg->irq_chip.irq_mask_ack = mediatek_gpio_irq_mask; 259 - rg->irq_chip.irq_set_type = mediatek_gpio_irq_type; 260 241 261 242 if (mtk->gpio_irq) { 262 243 struct gpio_irq_chip *girq; ··· 271 262 } 272 263 273 264 girq = &rg->chip.irq; 274 - girq->chip = &rg->irq_chip; 265 + gpio_irq_chip_set_chip(girq, &mt7621_irq_chip); 275 266 /* This will let us handle the parent IRQ in the driver */ 276 267 girq->parent_handler = NULL; 277 268 girq->num_parents = 0;