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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
RISC-V: KVM: Implement VCPU create, init and destroy functions
This patch implements VCPU create, init and destroy functions
required by generic KVM module. We don't have much dynamic
resources in struct kvm_vcpu_arch so these functions are quite
simple for KVM RISC-V.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Alexander Graf <graf@amazon.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
authored by
Anup Patel
and committed by
Anup Patel
a33c72fa
99cdc6c1
+115
-9
+69
arch/riscv/include/asm/kvm_host.h
+69
arch/riscv/include/asm/kvm_host.h
···
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unsigned long htinst;
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};
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struct kvm_cpu_context {
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unsigned long zero;
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unsigned long ra;
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unsigned long sp;
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unsigned long gp;
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unsigned long tp;
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unsigned long t0;
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unsigned long t1;
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unsigned long t2;
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unsigned long s0;
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unsigned long s1;
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unsigned long a0;
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unsigned long a1;
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unsigned long a2;
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unsigned long a3;
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unsigned long a4;
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unsigned long a5;
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unsigned long a6;
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unsigned long a7;
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unsigned long s2;
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unsigned long s3;
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unsigned long s4;
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unsigned long s5;
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unsigned long s6;
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unsigned long s7;
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unsigned long s8;
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unsigned long s9;
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unsigned long s10;
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unsigned long s11;
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unsigned long t3;
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unsigned long t4;
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unsigned long t5;
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unsigned long t6;
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unsigned long sepc;
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unsigned long sstatus;
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unsigned long hstatus;
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};
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struct kvm_vcpu_csr {
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unsigned long vsstatus;
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unsigned long vsie;
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unsigned long vstvec;
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unsigned long vsscratch;
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unsigned long vsepc;
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unsigned long vscause;
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unsigned long vstval;
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unsigned long hvip;
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unsigned long vsatp;
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unsigned long scounteren;
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};
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struct kvm_vcpu_arch {
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/* VCPU ran at least once */
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bool ran_atleast_once;
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/* ISA feature bits (similar to MISA) */
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unsigned long isa;
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/* CPU context of Guest VCPU */
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struct kvm_cpu_context guest_context;
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/* CPU CSR context of Guest VCPU */
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struct kvm_vcpu_csr guest_csr;
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/* CPU context upon Guest VCPU reset */
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struct kvm_cpu_context guest_reset_context;
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/* CPU CSR context upon Guest VCPU reset */
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struct kvm_vcpu_csr guest_reset_csr;
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/* Don't run the VCPU (blocked) */
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bool pause;
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+46
-9
arch/riscv/kvm/vcpu.c
+46
-9
arch/riscv/kvm/vcpu.c
···
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sizeof(kvm_vcpu_stats_desc),
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};
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#define KVM_RISCV_ISA_ALLOWED (riscv_isa_extension_mask(a) | \
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riscv_isa_extension_mask(c) | \
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riscv_isa_extension_mask(d) | \
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riscv_isa_extension_mask(f) | \
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riscv_isa_extension_mask(i) | \
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riscv_isa_extension_mask(m) | \
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riscv_isa_extension_mask(s) | \
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riscv_isa_extension_mask(u))
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static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
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{
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struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
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struct kvm_vcpu_csr *reset_csr = &vcpu->arch.guest_reset_csr;
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struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;
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struct kvm_cpu_context *reset_cntx = &vcpu->arch.guest_reset_context;
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memcpy(csr, reset_csr, sizeof(*csr));
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memcpy(cntx, reset_cntx, sizeof(*cntx));
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}
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int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
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{
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return 0;
···
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int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
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{
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-
/* TODO: */
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struct kvm_cpu_context *cntx;
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/* Mark this VCPU never ran */
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vcpu->arch.ran_atleast_once = false;
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/* Setup ISA features available to VCPU */
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vcpu->arch.isa = riscv_isa_extension_base(NULL) & KVM_RISCV_ISA_ALLOWED;
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/* Setup reset state of shadow SSTATUS and HSTATUS CSRs */
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cntx = &vcpu->arch.guest_reset_context;
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cntx->sstatus = SR_SPP | SR_SPIE;
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cntx->hstatus = 0;
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cntx->hstatus |= HSTATUS_VTW;
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cntx->hstatus |= HSTATUS_SPVP;
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cntx->hstatus |= HSTATUS_SPV;
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/* Reset VCPU */
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kvm_riscv_reset_vcpu(vcpu);
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return 0;
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}
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···
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{
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}
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-
int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
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{
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/* TODO: */
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return 0;
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}
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-
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void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
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{
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/* TODO: */
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/* Flush the pages pre-allocated for Stage2 page table mappings */
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kvm_riscv_stage2_flush_cache(vcpu);
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}
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int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
···
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struct kvm_cpu_trap trap;
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struct kvm_run *run = vcpu->run;
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/* Mark this VCPU ran at least once */
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vcpu->arch.ran_atleast_once = true;
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vcpu->arch.srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
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/* Process MMIO value returned from user-space */
···
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* get an interrupt between __kvm_riscv_switch_to() and
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* local_irq_enable() which can potentially change CSRs.
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*/
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trap.sepc = 0;
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trap.sepc = vcpu->arch.guest_context.sepc;
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trap.scause = csr_read(CSR_SCAUSE);
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trap.stval = csr_read(CSR_STVAL);
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trap.htval = csr_read(CSR_HTVAL);