Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'mmc-v4.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC fixes from Ulf Hansson:
"This contains fixes to make the WiFi work again for the ARM64 Hikey
board.
Together with a couple of DTS updates for the Hikey board we have also
extended the mmc pwrseq_simple, to support a new power-off-delay-us DT
property, as that was required to enable a graceful power off sequence
for the WiFi chip"
* tag 'mmc-v4.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
arm64: dts: hikey: Fix WiFi support
arm64: dts: hi6220: Move board data from the dwmmc nodes to hikey dts
arm64: dts: hikey: Add the SYS_5V and the VDD_3V3 regulators
arm64: dts: hi6220: Move the fixed_5v_hub regulator to the hikey dts
arm64: dts: hikey: Add clock for the pmic mfd
mfd: dts: hi655x: Add clock binding for the pmic
mmc: pwrseq_simple: Parse DTS for the power-off-delay-us property
mmc: dt: pwrseq-simple: Invent power-off-delay-us
+80
-46
+6
Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt
+6
Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt
···
16
16
- reg: Base address of PMIC on Hi6220 SoC.
17
17
- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain).
18
18
- pmic-gpios: The GPIO used by PMIC IRQ.
19
+
- #clock-cells: From common clock binding; shall be set to 0
20
+
21
+
Optional properties:
22
+
- clock-output-names: From common clock binding to override the
23
+
default output clock name
19
24
20
25
Example:
21
26
pmic: pmic@f8000000 {
···
29
24
interrupt-controller;
30
25
#interrupt-cells = <2>;
31
26
pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
27
+
#clock-cells = <0>;
32
28
}
+2
Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt
+2
Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt
···
18
18
"ext_clock" (External clock provided to the card).
19
19
- post-power-on-delay-ms : Delay in ms after powering the card and
20
20
de-asserting the reset-gpios (if any)
21
+
- power-off-delay-us : Delay in us after asserting the reset-gpios (if any)
22
+
during power off of the card.
21
23
22
24
Example:
23
25
+64
-16
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+64
-16
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
···
81
81
};
82
82
};
83
83
84
+
reg_sys_5v: regulator@0 {
85
+
compatible = "regulator-fixed";
86
+
regulator-name = "SYS_5V";
87
+
regulator-min-microvolt = <5000000>;
88
+
regulator-max-microvolt = <5000000>;
89
+
regulator-boot-on;
90
+
regulator-always-on;
91
+
};
92
+
93
+
reg_vdd_3v3: regulator@1 {
94
+
compatible = "regulator-fixed";
95
+
regulator-name = "VDD_3V3";
96
+
regulator-min-microvolt = <3300000>;
97
+
regulator-max-microvolt = <3300000>;
98
+
regulator-boot-on;
99
+
regulator-always-on;
100
+
vin-supply = <®_sys_5v>;
101
+
};
102
+
103
+
reg_5v_hub: regulator@2 {
104
+
compatible = "regulator-fixed";
105
+
regulator-name = "5V_HUB";
106
+
regulator-min-microvolt = <5000000>;
107
+
regulator-max-microvolt = <5000000>;
108
+
regulator-boot-on;
109
+
gpio = <&gpio0 7 0>;
110
+
regulator-always-on;
111
+
vin-supply = <®_sys_5v>;
112
+
};
113
+
114
+
wl1835_pwrseq: wl1835-pwrseq {
115
+
compatible = "mmc-pwrseq-simple";
116
+
/* WLAN_EN GPIO */
117
+
reset-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
118
+
clocks = <&pmic>;
119
+
clock-names = "ext_clock";
120
+
power-off-delay-us = <10>;
121
+
};
122
+
84
123
soc {
85
124
spi0: spi@f7106000 {
86
125
status = "ok";
···
295
256
296
257
/* GPIO blocks 16 thru 19 do not appear to be routed to pins */
297
258
298
-
dwmmc_2: dwmmc2@f723f000 {
299
-
ti,non-removable;
259
+
dwmmc_0: dwmmc0@f723d000 {
260
+
cap-mmc-highspeed;
300
261
non-removable;
301
-
/* WL_EN */
302
-
vmmc-supply = <&wlan_en_reg>;
262
+
bus-width = <0x8>;
263
+
vmmc-supply = <&ldo19>;
264
+
};
265
+
266
+
dwmmc_1: dwmmc1@f723e000 {
267
+
card-detect-delay = <200>;
268
+
cap-sd-highspeed;
269
+
sd-uhs-sdr12;
270
+
sd-uhs-sdr25;
271
+
sd-uhs-sdr50;
272
+
vqmmc-supply = <&ldo7>;
273
+
vmmc-supply = <&ldo10>;
274
+
bus-width = <0x4>;
275
+
disable-wp;
276
+
cd-gpios = <&gpio1 0 1>;
277
+
};
278
+
279
+
dwmmc_2: dwmmc2@f723f000 {
280
+
bus-width = <0x4>;
281
+
non-removable;
282
+
vmmc-supply = <®_vdd_3v3>;
283
+
mmc-pwrseq = <&wl1835_pwrseq>;
303
284
304
285
#address-cells = <0x1>;
305
286
#size-cells = <0x0>;
···
330
271
interrupt-parent = <&gpio1>;
331
272
interrupts = <3 IRQ_TYPE_EDGE_RISING>;
332
273
};
333
-
};
334
-
335
-
wlan_en_reg: regulator@1 {
336
-
compatible = "regulator-fixed";
337
-
regulator-name = "wlan-en-regulator";
338
-
regulator-min-microvolt = <1800000>;
339
-
regulator-max-microvolt = <1800000>;
340
-
/* WLAN_EN GPIO */
341
-
gpio = <&gpio0 5 0>;
342
-
/* WLAN card specific delay */
343
-
startup-delay-us = <70000>;
344
-
enable-active-high;
345
274
};
346
275
};
347
276
···
377
330
pmic: pmic@f8000000 {
378
331
compatible = "hisilicon,hi655x-pmic";
379
332
reg = <0x0 0xf8000000 0x0 0x1000>;
333
+
#clock-cells = <0>;
380
334
interrupt-controller;
381
335
#interrupt-cells = <2>;
382
336
pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+1
-30
arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+1
-30
arch/arm64/boot/dts/hisilicon/hi6220.dtsi
···
725
725
status = "disabled";
726
726
};
727
727
728
-
fixed_5v_hub: regulator@0 {
729
-
compatible = "regulator-fixed";
730
-
regulator-name = "fixed_5v_hub";
731
-
regulator-min-microvolt = <5000000>;
732
-
regulator-max-microvolt = <5000000>;
733
-
regulator-boot-on;
734
-
gpio = <&gpio0 7 0>;
735
-
regulator-always-on;
736
-
};
737
-
738
728
usb_phy: usbphy {
739
729
compatible = "hisilicon,hi6220-usb-phy";
740
730
#phy-cells = <0>;
741
-
phy-supply = <&fixed_5v_hub>;
731
+
phy-supply = <®_5v_hub>;
742
732
hisilicon,peripheral-syscon = <&sys_ctrl>;
743
733
};
744
734
···
756
766
757
767
dwmmc_0: dwmmc0@f723d000 {
758
768
compatible = "hisilicon,hi6220-dw-mshc";
759
-
num-slots = <0x1>;
760
-
cap-mmc-highspeed;
761
-
non-removable;
762
769
reg = <0x0 0xf723d000 0x0 0x1000>;
763
770
interrupts = <0x0 0x48 0x4>;
764
771
clocks = <&sys_ctrl 2>, <&sys_ctrl 1>;
765
772
clock-names = "ciu", "biu";
766
773
resets = <&sys_ctrl PERIPH_RSTDIS0_MMC0>;
767
774
reset-names = "reset";
768
-
bus-width = <0x8>;
769
-
vmmc-supply = <&ldo19>;
770
775
pinctrl-names = "default";
771
776
pinctrl-0 = <&emmc_pmx_func &emmc_clk_cfg_func
772
777
&emmc_cfg_func &emmc_rst_cfg_func>;
···
769
784
770
785
dwmmc_1: dwmmc1@f723e000 {
771
786
compatible = "hisilicon,hi6220-dw-mshc";
772
-
num-slots = <0x1>;
773
-
card-detect-delay = <200>;
774
787
hisilicon,peripheral-syscon = <&ao_ctrl>;
775
-
cap-sd-highspeed;
776
-
sd-uhs-sdr12;
777
-
sd-uhs-sdr25;
778
-
sd-uhs-sdr50;
779
788
reg = <0x0 0xf723e000 0x0 0x1000>;
780
789
interrupts = <0x0 0x49 0x4>;
781
790
#address-cells = <0x1>;
···
778
799
clock-names = "ciu", "biu";
779
800
resets = <&sys_ctrl PERIPH_RSTDIS0_MMC1>;
780
801
reset-names = "reset";
781
-
vqmmc-supply = <&ldo7>;
782
-
vmmc-supply = <&ldo10>;
783
-
bus-width = <0x4>;
784
-
disable-wp;
785
-
cd-gpios = <&gpio1 0 1>;
786
802
pinctrl-names = "default", "idle";
787
803
pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>;
788
804
pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>;
···
785
811
786
812
dwmmc_2: dwmmc2@f723f000 {
787
813
compatible = "hisilicon,hi6220-dw-mshc";
788
-
num-slots = <0x1>;
789
814
reg = <0x0 0xf723f000 0x0 0x1000>;
790
815
interrupts = <0x0 0x4a 0x4>;
791
816
clocks = <&sys_ctrl HI6220_MMC2_CIUCLK>, <&sys_ctrl HI6220_MMC2_CLK>;
792
817
clock-names = "ciu", "biu";
793
818
resets = <&sys_ctrl PERIPH_RSTDIS0_MMC2>;
794
819
reset-names = "reset";
795
-
bus-width = <0x4>;
796
-
broken-cd;
797
820
pinctrl-names = "default", "idle";
798
821
pinctrl-0 = <&sdio_pmx_func &sdio_clk_cfg_func &sdio_cfg_func>;
799
822
pinctrl-1 = <&sdio_pmx_idle &sdio_clk_cfg_idle &sdio_cfg_idle>;
+7
drivers/mmc/core/pwrseq_simple.c
+7
drivers/mmc/core/pwrseq_simple.c
···
27
27
struct mmc_pwrseq pwrseq;
28
28
bool clk_enabled;
29
29
u32 post_power_on_delay_ms;
30
+
u32 power_off_delay_us;
30
31
struct clk *ext_clk;
31
32
struct gpio_descs *reset_gpios;
32
33
};
···
79
78
80
79
mmc_pwrseq_simple_set_gpios_value(pwrseq, 1);
81
80
81
+
if (pwrseq->power_off_delay_us)
82
+
usleep_range(pwrseq->power_off_delay_us,
83
+
2 * pwrseq->power_off_delay_us);
84
+
82
85
if (!IS_ERR(pwrseq->ext_clk) && pwrseq->clk_enabled) {
83
86
clk_disable_unprepare(pwrseq->ext_clk);
84
87
pwrseq->clk_enabled = false;
···
124
119
125
120
device_property_read_u32(dev, "post-power-on-delay-ms",
126
121
&pwrseq->post_power_on_delay_ms);
122
+
device_property_read_u32(dev, "power-off-delay-us",
123
+
&pwrseq->power_off_delay_us);
127
124
128
125
pwrseq->pwrseq.dev = dev;
129
126
pwrseq->pwrseq.ops = &mmc_pwrseq_simple_ops;