tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/amd/display: export get_power_profile interface for later use

[why]
export dcn401 get_power_profile for later asic.

Reviewed-by: Roman Li <roman.li@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Charlene Liu and committed by
Alex Deucher a3c7ab16 fc259117

+4 -1
+1 -1
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
··· 1790 1790 } 1791 1791 } 1792 1792 1793 - static int dcn401_get_power_profile(const struct dc_state *context) 1793 + int dcn401_get_power_profile(const struct dc_state *context) 1794 1794 { 1795 1795 int uclk_mhz = context->bw_ctx.bw.dcn.clk.dramclk_khz / 1000; 1796 1796 int dpm_level = 0;
+1
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
··· 32 32 33 33 unsigned int dcn401_get_vstartup_for_pipe(struct pipe_ctx *pipe_ctx); 34 34 35 + int dcn401_get_power_profile(const struct dc_state *context); 35 36 /* Following are definitions for run time init of reg offsets */ 36 37 37 38 /* HUBP */
+1
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
··· 1791 1791 .calculate_mall_ways_from_bytes = dcn32_calculate_mall_ways_from_bytes, 1792 1792 .prepare_mcache_programming = dcn42_prepare_mcache_programming, 1793 1793 .build_pipe_pix_clk_params = dcn42_build_pipe_pix_clk_params, 1794 + .get_power_profile = dcn401_get_power_profile, 1794 1795 .get_vstartup_for_pipe = dcn401_get_vstartup_for_pipe, 1795 1796 .get_max_hw_cursor_size = dcn42_get_max_hw_cursor_size, 1796 1797 .get_default_tiling_info = dcn10_get_default_tiling_info
+1
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.h
··· 586 586 enum dc_validate_mode validate_mode); 587 587 588 588 void dcn42_prepare_mcache_programming(struct dc *dc, struct dc_state *context); 589 + int dcn42_get_power_profile(const struct dc_state *context); 589 590 590 591 #endif /* _DCN42_RESOURCE_H_ */