tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/amdgpu: Add vcn and jpeg ras support flag

Add vcn and jpeg ras support options

V2: vcn and jpeg ras flag enabled for aldebaran asic only

V3: vcn and jpeg ras flag disabled for error counter query
Generic poison query interface added
VCN and JPEG ras enabled based on IP version check

V4: vcn and jpeg ras flag moved under ecc flag for dGPU

Signed-off-by: Mohammad Zafar Ziya <Mohammadzafar.ziya@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Mohammad Zafar Ziya and committed by
Alex Deucher a3d63c62 425d7a87

+11
+9
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
··· 66 66 "mp1", 67 67 "fuse", 68 68 "mca", 69 + "vcn", 70 + "jpeg", 69 71 }; 70 72 71 73 const char *ras_mca_block_string[] = { ··· 2207 2205 dev_info(adev->dev, "SRAM ECC is active.\n"); 2208 2206 adev->ras_hw_enabled |= ~(1 << AMDGPU_RAS_BLOCK__UMC | 2209 2207 1 << AMDGPU_RAS_BLOCK__DF); 2208 + 2209 + if (adev->ip_versions[VCN_HWIP][0] == IP_VERSION(2, 6, 0)) 2210 + adev->ras_hw_enabled |= (1 << AMDGPU_RAS_BLOCK__VCN | 2211 + 1 << AMDGPU_RAS_BLOCK__JPEG); 2212 + else 2213 + adev->ras_hw_enabled &= ~(1 << AMDGPU_RAS_BLOCK__VCN | 2214 + 1 << AMDGPU_RAS_BLOCK__JPEG); 2210 2215 } else { 2211 2216 dev_info(adev->dev, "SRAM ECC is not presented.\n"); 2212 2217 }
+2
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
··· 49 49 AMDGPU_RAS_BLOCK__MP1, 50 50 AMDGPU_RAS_BLOCK__FUSE, 51 51 AMDGPU_RAS_BLOCK__MCA, 52 + AMDGPU_RAS_BLOCK__VCN, 53 + AMDGPU_RAS_BLOCK__JPEG, 52 54 53 55 AMDGPU_RAS_BLOCK__LAST 54 56 };