+1

drivers/net/phy/phy-c45.c

reviewed

··· 9 9 #include <linux/phy.h> 10 10 11 11 #include "mdio-open-alliance.h" 12 12 + #include "phylib-internal.h" 12 13 13 14 /** 14 15 * genphy_c45_baset1_able - checks if the PMA has BASE-T1 extended abilities

+2 -1

drivers/net/phy/phy-core.c

reviewed

··· 6 6 #include <linux/phy.h> 7 7 #include <linux/of.h> 8 8 9 9 + #include "phylib-internal.h" 10 10 + 9 11 /** 10 12 * phy_speed_to_str - Return a string representing the PHY link speed 11 13 * ··· 546 544 547 545 phydev->downshifted_rate = 1; 548 546 } 549 549 - EXPORT_SYMBOL_GPL(phy_check_downshift); 550 547 551 548 static int phy_resolve_min_speed(struct phy_device *phydev, bool fdx_only) 552 549 {

+2

drivers/net/phy/phy.c

reviewed

··· 36 36 #include <net/genetlink.h> 37 37 #include <net/sock.h> 38 38 39 39 + #include "phylib-internal.h" 40 40 + 39 41 #define PHY_STATE_TIME HZ 40 42 41 43 #define PHY_STATE_STR(_state) \

+2

drivers/net/phy/phy_device.c

reviewed

··· 41 41 #include <linux/uaccess.h> 42 42 #include <linux/unistd.h> 43 43 44 44 + #include "phylib-internal.h" 45 45 + 44 46 MODULE_DESCRIPTION("PHY library"); 45 47 MODULE_AUTHOR("Andy Fleming"); 46 48 MODULE_LICENSE("GPL");

+2

drivers/net/phy/phy_led_triggers.c

reviewed

··· 5 5 #include <linux/phy_led_triggers.h> 6 6 #include <linux/netdevice.h> 7 7 8 8 + #include "phylib-internal.h" 9 9 + 8 10 static struct phy_led_trigger *phy_speed_to_led_trigger(struct phy_device *phy, 9 11 unsigned int speed) 10 12 {

+25

drivers/net/phy/phylib-internal.h

reviewed

··· 1 1 + /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 2 + /* 3 3 + * phylib-internal header 4 4 + */ 5 5 + 6 6 + #ifndef __PHYLIB_INTERNAL_H 7 7 + #define __PHYLIB_INTERNAL_H 8 8 + 9 9 + struct phy_device; 10 10 + 11 11 + /* 12 12 + * phy_supported_speeds - return all speeds currently supported by a PHY device 13 13 + */ 14 14 + unsigned int phy_supported_speeds(struct phy_device *phy, 15 15 + unsigned int *speeds, 16 16 + unsigned int size); 17 17 + void of_set_phy_supported(struct phy_device *phydev); 18 18 + void of_set_phy_eee_broken(struct phy_device *phydev); 19 19 + void of_set_phy_timing_role(struct phy_device *phydev); 20 20 + int phy_speed_down_core(struct phy_device *phydev); 21 21 + void phy_check_downshift(struct phy_device *phydev); 22 22 + 23 23 + int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 24 24 + 25 25 + #endif /* __PHYLIB_INTERNAL_H */

-13

include/linux/phy.h

reviewed

··· 181 181 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 182 182 } 183 183 184 184 - /* 185 185 - * phy_supported_speeds - return all speeds currently supported by a PHY device 186 186 - */ 187 187 - unsigned int phy_supported_speeds(struct phy_device *phy, 188 188 - unsigned int *speeds, 189 189 - unsigned int size); 190 190 - 191 184 /** 192 185 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 193 186 * @interface: enum phy_interface_t value ··· 1324 1331 bool exact); 1325 1332 size_t phy_speeds(unsigned int *speeds, size_t size, 1326 1333 unsigned long *mask); 1327 1327 - void of_set_phy_supported(struct phy_device *phydev); 1328 1328 - void of_set_phy_eee_broken(struct phy_device *phydev); 1329 1329 - void of_set_phy_timing_role(struct phy_device *phydev); 1330 1330 - int phy_speed_down_core(struct phy_device *phydev); 1331 1334 1332 1335 /** 1333 1336 * phy_is_started - Convenience function to check whether PHY is started ··· 1349 1360 1350 1361 void phy_resolve_aneg_pause(struct phy_device *phydev); 1351 1362 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1352 1352 - void phy_check_downshift(struct phy_device *phydev); 1353 1363 1354 1364 /** 1355 1365 * phy_read - Convenience function for reading a given PHY register ··· 2023 2035 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 2024 2036 struct ethtool_keee *data); 2025 2037 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 2026 2026 - int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 2027 2038 2028 2039 /* Generic C45 PHY driver */ 2029 2040 extern struct phy_driver genphy_c45_driver;