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drm/xe/reg_sr: Don't process gt/hwe lists in VF

There are a few different reg_sr lists managed by the driver for
workarounds/tuning:

- gt->reg_sr
- hwe->reg_sr
- hwe->reg_lrc

The first two are not relevant to SRIOV VFs; a VF KMD does not have
access to the registers that appear on this list and it is the PF KMD's
responsibility to apply such programming on behalf of the entire system.
However the third list contains per-client values that the VF KMD needs
to ensure are incorporated whenever a new LRC is created.

Handling of reg_sr lists comes in two steps: processing an RTP table to
build a reg_sr from the relevant entries, and then applying the contents
of the reg_sr. Skipping the RTP processing (resulting in an empty
reg_sr) or skipping the application of a reg_sr are both valid ways to
avoid having a VF accidentally try to write registers it doesn't have
access to. In commit c19e705ec981 ("drm/xe/vf: Stop applying
save-restore MMIOs if VF") and commit 92a5bd302458 ("drm/xe/vf: Unblock
xe_rtp_process_to_sr for VFs") we adjusted the drivers behavior to
always process the RTP table into a reg_sr and just skipped the
application step. This works fine functionally, but can lead to
confusion during debugging since facilities like the debugfs
'register-save-restore' will still report a bunch of registers that the
VF KMD isn't actually trying to handle. It will also mislead other
upcoming debug changes.

Let's go back to skipping the RTP => reg_sr processing step, but only
for GT / hwe tables this time. This will allow LRC reg_sr handling to
continue to work, but will ensure that gt->reg_sr and hwe->reg_sr remain
empty and that debugfs reporting more accurately reflects the KMD's
behavior.

v2:
- Also skip the hwe processing in hw_engine_setup_default_state() and
xe_reg_whitelist_process_engine().

v3:
- Handle skipping via an additional parameter passed to
xe_rtp_process_to_sr() rather than adding conditions at each
callsite. (Ashutosh)

Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Harish Chegondi <harish.chegondi@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Link: https://patch.msgid.link/20260218-sr_verify-v4-1-35d6deeb3421@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

Matt Roper a41ee215 6c2e331c

+34 -14
+2 -1
drivers/gpu/drm/xe/tests/xe_rtp_test.c
··· 322 322 count_rtp_entries++; 323 323 324 324 xe_rtp_process_ctx_enable_active_tracking(&ctx, &active, count_rtp_entries); 325 - xe_rtp_process_to_sr(&ctx, param->entries, count_rtp_entries, reg_sr); 325 + xe_rtp_process_to_sr(&ctx, param->entries, count_rtp_entries, 326 + reg_sr, false); 326 327 327 328 xa_for_each(&reg_sr->xa, idx, sre) { 328 329 if (idx == param->expected_reg.addr)
+4 -2
drivers/gpu/drm/xe/xe_hw_engine.c
··· 408 408 }, 409 409 }; 410 410 411 - xe_rtp_process_to_sr(&ctx, lrc_setup, ARRAY_SIZE(lrc_setup), &hwe->reg_lrc); 411 + xe_rtp_process_to_sr(&ctx, lrc_setup, ARRAY_SIZE(lrc_setup), 412 + &hwe->reg_lrc, true); 412 413 } 413 414 414 415 static void ··· 473 472 }, 474 473 }; 475 474 476 - xe_rtp_process_to_sr(&ctx, engine_entries, ARRAY_SIZE(engine_entries), &hwe->reg_sr); 475 + xe_rtp_process_to_sr(&ctx, engine_entries, ARRAY_SIZE(engine_entries), 476 + &hwe->reg_sr, false); 477 477 } 478 478 479 479 static const struct engine_info *find_engine_info(enum xe_engine_class class, int instance)
+6 -2
drivers/gpu/drm/xe/xe_reg_sr.c
··· 13 13 #include <drm/drm_managed.h> 14 14 #include <drm/drm_print.h> 15 15 16 + #include "xe_assert.h" 16 17 #include "xe_device.h" 17 18 #include "xe_device_types.h" 18 19 #include "xe_force_wake.h" ··· 170 169 if (xa_empty(&sr->xa)) 171 170 return; 172 171 173 - if (IS_SRIOV_VF(gt_to_xe(gt))) 174 - return; 172 + /* 173 + * We don't process non-LRC reg_sr lists in VF, so they should have 174 + * been empty in the check above. 175 + */ 176 + xe_gt_assert(gt, !IS_SRIOV_VF(gt_to_xe(gt))); 175 177 176 178 xe_gt_dbg(gt, "Applying %s save-restore MMIOs\n", sr->name); 177 179
+1 -1
drivers/gpu/drm/xe/xe_reg_whitelist.c
··· 189 189 struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe); 190 190 191 191 xe_rtp_process_to_sr(&ctx, register_whitelist, ARRAY_SIZE(register_whitelist), 192 - &hwe->reg_whitelist); 192 + &hwe->reg_whitelist, false); 193 193 whitelist_apply_to_hwe(hwe); 194 194 } 195 195
+7 -1
drivers/gpu/drm/xe/xe_rtp.c
··· 270 270 * @sr: Save-restore struct where matching rules execute the action. This can be 271 271 * viewed as the "coalesced view" of multiple the tables. The bits for each 272 272 * register set are expected not to collide with previously added entries 273 + * @process_in_vf: Whether this RTP table should get processed for SR-IOV VF 274 + * devices. Should generally only be 'true' for LRC tables. 273 275 * 274 276 * Walk the table pointed by @entries (with an empty sentinel) and add all 275 277 * entries with matching rules to @sr. If @hwe is not NULL, its mmio_base is ··· 280 278 void xe_rtp_process_to_sr(struct xe_rtp_process_ctx *ctx, 281 279 const struct xe_rtp_entry_sr *entries, 282 280 size_t n_entries, 283 - struct xe_reg_sr *sr) 281 + struct xe_reg_sr *sr, 282 + bool process_in_vf) 284 283 { 285 284 const struct xe_rtp_entry_sr *entry; 286 285 struct xe_hw_engine *hwe = NULL; ··· 289 286 struct xe_device *xe = NULL; 290 287 291 288 rtp_get_context(ctx, &hwe, &gt, &xe); 289 + 290 + if (!process_in_vf && IS_SRIOV_VF(xe)) 291 + return; 292 292 293 293 xe_assert(xe, entries); 294 294
+2 -1
drivers/gpu/drm/xe/xe_rtp.h
··· 431 431 432 432 void xe_rtp_process_to_sr(struct xe_rtp_process_ctx *ctx, 433 433 const struct xe_rtp_entry_sr *entries, 434 - size_t n_entries, struct xe_reg_sr *sr); 434 + size_t n_entries, struct xe_reg_sr *sr, 435 + bool process_in_vf); 435 436 436 437 void xe_rtp_process(struct xe_rtp_process_ctx *ctx, 437 438 const struct xe_rtp_entry *entries);
+6 -3
drivers/gpu/drm/xe/xe_tuning.c
··· 15 15 #include "xe_gt_types.h" 16 16 #include "xe_platform_types.h" 17 17 #include "xe_rtp.h" 18 + #include "xe_sriov.h" 18 19 19 20 #undef XE_REG_MCR 20 21 #define XE_REG_MCR(...) XE_REG(__VA_ARGS__, .mcr = 1) ··· 201 200 xe_rtp_process_ctx_enable_active_tracking(&ctx, 202 201 gt->tuning_active.gt, 203 202 ARRAY_SIZE(gt_tunings)); 204 - xe_rtp_process_to_sr(&ctx, gt_tunings, ARRAY_SIZE(gt_tunings), &gt->reg_sr); 203 + xe_rtp_process_to_sr(&ctx, gt_tunings, ARRAY_SIZE(gt_tunings), 204 + &gt->reg_sr, false); 205 205 } 206 206 EXPORT_SYMBOL_IF_KUNIT(xe_tuning_process_gt); 207 207 ··· 214 212 hwe->gt->tuning_active.engine, 215 213 ARRAY_SIZE(engine_tunings)); 216 214 xe_rtp_process_to_sr(&ctx, engine_tunings, ARRAY_SIZE(engine_tunings), 217 - &hwe->reg_sr); 215 + &hwe->reg_sr, false); 218 216 } 219 217 EXPORT_SYMBOL_IF_KUNIT(xe_tuning_process_engine); 220 218 ··· 233 231 xe_rtp_process_ctx_enable_active_tracking(&ctx, 234 232 hwe->gt->tuning_active.lrc, 235 233 ARRAY_SIZE(lrc_tunings)); 236 - xe_rtp_process_to_sr(&ctx, lrc_tunings, ARRAY_SIZE(lrc_tunings), &hwe->reg_lrc); 234 + xe_rtp_process_to_sr(&ctx, lrc_tunings, ARRAY_SIZE(lrc_tunings), 235 + &hwe->reg_lrc, true); 237 236 } 238 237 239 238 /**
+6 -3
drivers/gpu/drm/xe/xe_wa.c
··· 1005 1005 1006 1006 xe_rtp_process_ctx_enable_active_tracking(&ctx, gt->wa_active.gt, 1007 1007 ARRAY_SIZE(gt_was)); 1008 - xe_rtp_process_to_sr(&ctx, gt_was, ARRAY_SIZE(gt_was), &gt->reg_sr); 1008 + xe_rtp_process_to_sr(&ctx, gt_was, ARRAY_SIZE(gt_was), 1009 + &gt->reg_sr, false); 1009 1010 } 1010 1011 EXPORT_SYMBOL_IF_KUNIT(xe_wa_process_gt); 1011 1012 ··· 1024 1023 1025 1024 xe_rtp_process_ctx_enable_active_tracking(&ctx, hwe->gt->wa_active.engine, 1026 1025 ARRAY_SIZE(engine_was)); 1027 - xe_rtp_process_to_sr(&ctx, engine_was, ARRAY_SIZE(engine_was), &hwe->reg_sr); 1026 + xe_rtp_process_to_sr(&ctx, engine_was, ARRAY_SIZE(engine_was), 1027 + &hwe->reg_sr, false); 1028 1028 } 1029 1029 1030 1030 /** ··· 1042 1040 1043 1041 xe_rtp_process_ctx_enable_active_tracking(&ctx, hwe->gt->wa_active.lrc, 1044 1042 ARRAY_SIZE(lrc_was)); 1045 - xe_rtp_process_to_sr(&ctx, lrc_was, ARRAY_SIZE(lrc_was), &hwe->reg_lrc); 1043 + xe_rtp_process_to_sr(&ctx, lrc_was, ARRAY_SIZE(lrc_was), 1044 + &hwe->reg_lrc, true); 1046 1045 } 1047 1046 1048 1047 /**