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ASoC: SOF: amd: Fix for acp init sequence

When ACP is not powered on by default, acp power on sequence explicitly
invoked by programming pgfsm control mask. The existing implementation
checks the same PGFSM status mask and programs the same PGFSM control mask
in all ACP variants which breaks acp power on sequence for ACP6.0 and
ACP6.3 variants. So to fix this issue, update ACP pgfsm control mask and
status mask based on acp descriptor rev field, which will vary based on
acp variant.

Fixes: 846aef1d7cc0 ("ASoC: SOF: amd: Add Renoir ACP HW support")
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Link: https://patch.msgid.link/20240816070328.610360-1-Vijendar.Mukunda@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Vijendar Mukunda and committed by
Mark Brown a42db293 16419961

+22 -4
+17 -2
sound/soc/sof/amd/acp.c
··· 433 433 const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); 434 434 unsigned int base = desc->pgfsm_base; 435 435 unsigned int val; 436 + unsigned int acp_pgfsm_status_mask, acp_pgfsm_cntl_mask; 436 437 int ret; 437 438 438 439 val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, base + PGFSM_STATUS_OFFSET); ··· 441 440 if (val == ACP_POWERED_ON) 442 441 return 0; 443 442 444 - if (val & ACP_PGFSM_STATUS_MASK) 443 + switch (desc->rev) { 444 + case 3: 445 + case 5: 446 + acp_pgfsm_status_mask = ACP3X_PGFSM_STATUS_MASK; 447 + acp_pgfsm_cntl_mask = ACP3X_PGFSM_CNTL_POWER_ON_MASK; 448 + break; 449 + case 6: 450 + acp_pgfsm_status_mask = ACP6X_PGFSM_STATUS_MASK; 451 + acp_pgfsm_cntl_mask = ACP6X_PGFSM_CNTL_POWER_ON_MASK; 452 + break; 453 + default: 454 + return -EINVAL; 455 + } 456 + 457 + if (val & acp_pgfsm_status_mask) 445 458 snd_sof_dsp_write(sdev, ACP_DSP_BAR, base + PGFSM_CONTROL_OFFSET, 446 - ACP_PGFSM_CNTL_POWER_ON_MASK); 459 + acp_pgfsm_cntl_mask); 447 460 448 461 ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, base + PGFSM_STATUS_OFFSET, val, 449 462 !val, ACP_REG_POLL_INTERVAL, ACP_REG_POLL_TIMEOUT_US);
+5 -2
sound/soc/sof/amd/acp.h
··· 25 25 #define ACP_REG_POLL_TIMEOUT_US 2000 26 26 #define ACP_DMA_COMPLETE_TIMEOUT_US 5000 27 27 28 - #define ACP_PGFSM_CNTL_POWER_ON_MASK 0x01 29 - #define ACP_PGFSM_STATUS_MASK 0x03 28 + #define ACP3X_PGFSM_CNTL_POWER_ON_MASK 0x01 29 + #define ACP3X_PGFSM_STATUS_MASK 0x03 30 + #define ACP6X_PGFSM_CNTL_POWER_ON_MASK 0x07 31 + #define ACP6X_PGFSM_STATUS_MASK 0x0F 32 + 30 33 #define ACP_POWERED_ON 0x00 31 34 #define ACP_ASSERT_RESET 0x01 32 35 #define ACP_RELEASE_RESET 0x00