drm/amdgpu: device: fix spellos and punctuation

+15 -15

1 changed file

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drivers

gpu

drm

amd

amdgpu

amdgpu_device.c

+15 -15

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

··· 206 206 * DOC: pcie_replay_count 207 207 * 208 208 * The amdgpu driver provides a sysfs API for reporting the total number 209 - * of PCIe replays (NAKs) 209 + * of PCIe replays (NAKs). 210 210 * The file pcie_replay_count is used for this and returns the total 211 - * number of replays as a sum of the NAKs generated and NAKs received 211 + * number of replays as a sum of the NAKs generated and NAKs received. 212 212 */ 213 213 214 214 static ssize_t amdgpu_device_get_pcie_replay_count(struct device *dev, ··· 431 431 * @dev: drm_device pointer 432 432 * 433 433 * Return: 434 - * 1 if the device supporte BACO; 435 - * 3 if the device support MACO (only works if BACO is supported) 434 + * 1 if the device supports BACO; 435 + * 3 if the device supports MACO (only works if BACO is supported) 436 436 * otherwise return 0. 437 437 */ 438 438 int amdgpu_device_supports_baco(struct drm_device *dev) ··· 579 579 } 580 580 581 581 /** 582 - * amdgpu_device_aper_access - access vram by vram aperature 582 + * amdgpu_device_aper_access - access vram by vram aperture 583 583 * 584 584 * @adev: amdgpu_device pointer 585 585 * @pos: offset of the buffer in vram ··· 670 670 * here is that the GPU reset is not running on another thread in parallel. 671 671 * 672 672 * For this we trylock the read side of the reset semaphore, if that succeeds 673 - * we know that the reset is not running in paralell. 673 + * we know that the reset is not running in parallel. 674 674 * 675 675 * If the trylock fails we assert that we are either already holding the read 676 676 * side of the lock or are the reset thread itself and hold the write side of ··· 1735 1735 uint32_t fw_ver; 1736 1736 1737 1737 err = request_firmware(&adev->pm.fw, "amdgpu/fiji_smc.bin", adev->dev); 1738 - /* force vPost if error occured */ 1738 + /* force vPost if error occurred */ 1739 1739 if (err) 1740 1740 return true; 1741 1741 ··· 2380 2380 * the module parameter virtual_display. This feature provides a virtual 2381 2381 * display hardware on headless boards or in virtualized environments. 2382 2382 * This function parses and validates the configuration string specified by 2383 - * the user and configues the virtual display configuration (number of 2383 + * the user and configures the virtual display configuration (number of 2384 2384 * virtual connectors, crtcs, etc.) specified. 2385 2385 */ 2386 2386 static void amdgpu_device_enable_virtual_display(struct amdgpu_device *adev) ··· 2443 2443 * @adev: amdgpu_device pointer 2444 2444 * 2445 2445 * Parses the asic configuration parameters specified in the gpu info 2446 - * firmware and makes them availale to the driver for use in configuring 2446 + * firmware and makes them available to the driver for use in configuring 2447 2447 * the asic. 2448 2448 * Returns 0 on success, -EINVAL on failure. 2449 2449 */ ··· 2503 2503 le32_to_cpu(hdr->header.ucode_array_offset_bytes)); 2504 2504 2505 2505 /* 2506 - * Should be droped when DAL no longer needs it. 2506 + * Should be dropped when DAL no longer needs it. 2507 2507 */ 2508 2508 if (adev->asic_type == CHIP_NAVI12) 2509 2509 goto parse_soc_bounding_box; ··· 3063 3063 * 3064 3064 * Writes a reset magic value to the gart pointer in VRAM. The driver calls 3065 3065 * this function before a GPU reset. If the value is retained after a 3066 - * GPU reset, VRAM has not been lost. Some GPU resets may destry VRAM contents. 3066 + * GPU reset, VRAM has not been lost. Some GPU resets may destroy VRAM contents. 3067 3067 */ 3068 3068 static void amdgpu_device_fill_reset_magic(struct amdgpu_device *adev) 3069 3069 { ··· 3378 3378 3379 3379 amdgpu_amdkfd_suspend(adev, false); 3380 3380 3381 - /* Workaroud for ASICs need to disable SMC first */ 3381 + /* Workaround for ASICs need to disable SMC first */ 3382 3382 amdgpu_device_smu_fini_early(adev); 3383 3383 3384 3384 for (i = adev->num_ip_blocks - 1; i >= 0; i--) { ··· 4308 4308 4309 4309 /* 4310 4310 * Reset domain needs to be present early, before XGMI hive discovered 4311 - * (if any) and intitialized to use reset sem and in_gpu reset flag 4311 + * (if any) and initialized to use reset sem and in_gpu reset flag 4312 4312 * early on during init and before calling to RREG32. 4313 4313 */ 4314 4314 adev->reset_domain = amdgpu_reset_create_reset_domain(SINGLE_DEVICE, "amdgpu-reset-dev"); ··· 5953 5953 amdgpu_amdkfd_pre_reset(tmp_adev, reset_context); 5954 5954 5955 5955 /* 5956 - * Mark these ASICs to be reseted as untracked first 5956 + * Mark these ASICs to be reset as untracked first 5957 5957 * And add them back after reset completed 5958 5958 */ 5959 5959 amdgpu_unregister_gpu_instance(tmp_adev); ··· 6156 6156 * 6157 6157 * @adev: amdgpu_device pointer 6158 6158 * 6159 - * Fetchs and stores in the driver the PCIE capabilities (gen speed 6159 + * Fetches and stores in the driver the PCIE capabilities (gen speed 6160 6160 * and lanes) of the slot the device is in. Handles APUs and 6161 6161 * virtualized environments where PCIE config space may not be available. 6162 6162 */

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