Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'mtd/fixes-for-4.16-rc7' of git://git.infradead.org/linux-mtd
Pull MTD fixes from Boris Brezillon:
- Fix several problems in the fsl_ifc NAND controller driver
- Fix misuse of mtd_ooblayout_ecc() in mtdchar.c
* tag 'mtd/fixes-for-4.16-rc7' of git://git.infradead.org/linux-mtd:
mtd: nand: fsl_ifc: Read ECCSTAT0 and ECCSTAT1 registers for IFC 2.0
mtd: nand: fsl_ifc: Fix eccstat array overflow for IFC ver >= 2.0.0
mtd: nand: fsl_ifc: Fix nand waitfunc return value
mtdchar: fix usage of mtd_ooblayout_ecc()
+16
-26
+2
-2
drivers/mtd/mtdchar.c
+2
-2
drivers/mtd/mtdchar.c
···
479
479
for (i = 0; i < MTD_MAX_ECCPOS_ENTRIES;) {
480
480
u32 eccpos;
481
481
482
-
ret = mtd_ooblayout_ecc(mtd, section, &oobregion);
482
+
ret = mtd_ooblayout_ecc(mtd, section++, &oobregion);
483
483
if (ret < 0) {
484
484
if (ret != -ERANGE)
485
485
return ret;
···
526
526
for (i = 0; i < ARRAY_SIZE(to->eccpos);) {
527
527
u32 eccpos;
528
528
529
-
ret = mtd_ooblayout_ecc(mtd, section, &oobregion);
529
+
ret = mtd_ooblayout_ecc(mtd, section++, &oobregion);
530
530
if (ret < 0) {
531
531
if (ret != -ERANGE)
532
532
return ret;
+13
-19
drivers/mtd/nand/fsl_ifc_nand.c
+13
-19
drivers/mtd/nand/fsl_ifc_nand.c
···
173
173
174
174
/* returns nonzero if entire page is blank */
175
175
static int check_read_ecc(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl,
176
-
u32 *eccstat, unsigned int bufnum)
176
+
u32 eccstat, unsigned int bufnum)
177
177
{
178
-
u32 reg = eccstat[bufnum / 4];
179
-
int errors;
180
-
181
-
errors = (reg >> ((3 - bufnum % 4) * 8)) & 15;
182
-
183
-
return errors;
178
+
return (eccstat >> ((3 - bufnum % 4) * 8)) & 15;
184
179
}
185
180
186
181
/*
···
188
193
struct fsl_ifc_ctrl *ctrl = priv->ctrl;
189
194
struct fsl_ifc_nand_ctrl *nctrl = ifc_nand_ctrl;
190
195
struct fsl_ifc_runtime __iomem *ifc = ctrl->rregs;
191
-
u32 eccstat[4];
196
+
u32 eccstat;
192
197
int i;
193
198
194
199
/* set the chip select for NAND Transaction */
···
223
228
if (nctrl->eccread) {
224
229
int errors;
225
230
int bufnum = nctrl->page & priv->bufnum_mask;
226
-
int sector = bufnum * chip->ecc.steps;
227
-
int sector_end = sector + chip->ecc.steps - 1;
231
+
int sector_start = bufnum * chip->ecc.steps;
232
+
int sector_end = sector_start + chip->ecc.steps - 1;
228
233
__be32 *eccstat_regs;
229
234
230
-
if (ctrl->version >= FSL_IFC_VERSION_2_0_0)
231
-
eccstat_regs = ifc->ifc_nand.v2_nand_eccstat;
232
-
else
233
-
eccstat_regs = ifc->ifc_nand.v1_nand_eccstat;
235
+
eccstat_regs = ifc->ifc_nand.nand_eccstat;
236
+
eccstat = ifc_in32(&eccstat_regs[sector_start / 4]);
234
237
235
-
for (i = sector / 4; i <= sector_end / 4; i++)
236
-
eccstat[i] = ifc_in32(&eccstat_regs[i]);
238
+
for (i = sector_start; i <= sector_end; i++) {
239
+
if (i != sector_start && !(i % 4))
240
+
eccstat = ifc_in32(&eccstat_regs[i / 4]);
237
241
238
-
for (i = sector; i <= sector_end; i++) {
239
242
errors = check_read_ecc(mtd, ctrl, eccstat, i);
240
243
241
244
if (errors == 15) {
···
619
626
struct fsl_ifc_ctrl *ctrl = priv->ctrl;
620
627
struct fsl_ifc_runtime __iomem *ifc = ctrl->rregs;
621
628
u32 nand_fsr;
629
+
int status;
622
630
623
631
/* Use READ_STATUS command, but wait for the device to be ready */
624
632
ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
···
634
640
fsl_ifc_run_command(mtd);
635
641
636
642
nand_fsr = ifc_in32(&ifc->ifc_nand.nand_fsr);
637
-
643
+
status = nand_fsr >> 24;
638
644
/*
639
645
* The chip always seems to report that it is
640
646
* write-protected, even when it is not.
641
647
*/
642
-
return nand_fsr | NAND_STATUS_WP;
648
+
return status | NAND_STATUS_WP;
643
649
}
644
650
645
651
/*
+1
-5
include/linux/fsl_ifc.h
+1
-5
include/linux/fsl_ifc.h
···
734
734
u32 res19[0x10];
735
735
__be32 nand_fsr;
736
736
u32 res20;
737
-
/* The V1 nand_eccstat is actually 4 words that overlaps the
738
-
* V2 nand_eccstat.
739
-
*/
740
-
__be32 v1_nand_eccstat[2];
741
-
__be32 v2_nand_eccstat[6];
737
+
__be32 nand_eccstat[8];
742
738
u32 res21[0x1c];
743
739
__be32 nanndcr;
744
740
u32 res22[0x2];