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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
Revert "drm/amd/display: Optimize cursor position updates"
This reverts commit 88c7c56d07c108ed4de319c8dba44aa4b8a38dd1.
SW and HW state are not always matching in some cases causing cursor to
be disabled.
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Aurabindo Pillai
and committed by
Alex Deucher
a5d258a0
8b248b90
+12
-19
+3
-4
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c
+3
-4
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c
···
480
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if (src_y_offset + cursor_height <= 0)
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cur_en = 0; /* not visible beyond top edge*/
482
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483
-
if (dpp_base->pos.cur0_ctl.bits.cur0_enable != cur_en) {
484
-
REG_UPDATE(CURSOR0_CONTROL, CUR0_ENABLE, cur_en);
483
+
REG_UPDATE(CURSOR0_CONTROL,
484
+
CUR0_ENABLE, cur_en);
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486
-
dpp_base->pos.cur0_ctl.bits.cur0_enable = cur_en;
487
-
}
486
+
dpp_base->pos.cur0_ctl.bits.cur0_enable = cur_en;
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}
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void dpp1_cnv_set_optional_cursor_attributes(
+2
-4
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
+2
-4
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
···
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struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base);
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uint32_t cur_en = pos->enable ? 1 : 0;
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157
-
if (dpp_base->pos.cur0_ctl.bits.cur0_enable != cur_en) {
158
-
REG_UPDATE(CURSOR0_CONTROL, CUR0_ENABLE, cur_en);
157
+
REG_UPDATE(CURSOR0_CONTROL, CUR0_ENABLE, cur_en);
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-
dpp_base->pos.cur0_ctl.bits.cur0_enable = cur_en;
161
-
}
159
+
dpp_base->pos.cur0_ctl.bits.cur0_enable = cur_en;
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}
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void dpp401_set_optional_cursor_attributes(
+3
-5
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
+3
-5
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
···
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if (src_y_offset + cursor_height <= 0)
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cur_en = 0; /* not visible beyond top edge*/
1060
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1061
-
if (hubp->pos.cur_ctl.bits.cur_enable != cur_en) {
1062
-
if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0)
1063
-
hubp->funcs->set_cursor_attributes(hubp, &hubp->curs_attr);
1061
+
if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0)
1062
+
hubp->funcs->set_cursor_attributes(hubp, &hubp->curs_attr);
1064
1063
1065
-
REG_UPDATE(CURSOR_CONTROL,
1064
+
REG_UPDATE(CURSOR_CONTROL,
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CURSOR_ENABLE, cur_en);
1067
-
}
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REG_SET_2(CURSOR_POSITION, 0,
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CURSOR_X_POSITION, pos->x,
+4
-6
drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
+4
-6
drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
···
730
730
dc_fixpt_from_int(dst_x_offset),
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param->h_scale_ratio));
732
732
733
-
if (hubp->pos.cur_ctl.bits.cur_enable != cur_en) {
734
-
if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0)
735
-
hubp->funcs->set_cursor_attributes(hubp, &hubp->curs_attr);
733
+
if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0)
734
+
hubp->funcs->set_cursor_attributes(hubp, &hubp->curs_attr);
736
735
737
-
REG_UPDATE(CURSOR_CONTROL,
738
-
CURSOR_ENABLE, cur_en);
739
-
}
736
+
REG_UPDATE(CURSOR_CONTROL,
737
+
CURSOR_ENABLE, cur_en);
740
738
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REG_SET_2(CURSOR_POSITION, 0,
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CURSOR_X_POSITION, x_pos,