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PCI: cadence: Configure LM_EP_FUNC_CFG based on epc->function_num_map

The number of functions supported by the endpoint controller is configured
in LM_EP_FUNC_CFG based on func_no member of struct pci_epf. Now that an
endpoint function can be associated with two endpoint controllers (primary
and secondary), just using func_no will not suffice as that will take into
account only if the endpoint controller is associated with the primary
interface of endpoint function. Instead use epc->function_num_map which
will already have the configured functions information (irrespective of
whether the endpoint controller is associated with primary or secondary
interface).

Link: https://lore.kernel.org/r/20210201195809.7342-13-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Tom Joseph <tjoseph@cadence.com>

authored by

Kishon Vijay Abraham I and committed by
Bjorn Helgaas a62074a9 dbcc542f

+1 -6
+1 -6
drivers/pci/controller/cadence/pcie-cadence-ep.c
··· 506 506 struct cdns_pcie_ep *ep = epc_get_drvdata(epc); 507 507 struct cdns_pcie *pcie = &ep->pcie; 508 508 struct device *dev = pcie->dev; 509 - struct pci_epf *epf; 510 - u32 cfg; 511 509 int ret; 512 510 513 511 /* 514 512 * BIT(0) is hardwired to 1, hence function 0 is always enabled 515 513 * and can't be disabled anyway. 516 514 */ 517 - cfg = BIT(0); 518 - list_for_each_entry(epf, &epc->pci_epf, list) 519 - cfg |= BIT(epf->func_no); 520 - cdns_pcie_writel(pcie, CDNS_PCIE_LM_EP_FUNC_CFG, cfg); 515 + cdns_pcie_writel(pcie, CDNS_PCIE_LM_EP_FUNC_CFG, epc->function_num_map); 521 516 522 517 ret = cdns_pcie_start_link(pcie); 523 518 if (ret) {