Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
tools/nolibc: MIPS: add support for N64 and N32 ABIs
Add support for the MIPS 64bit N64 and ILP32 N32 ABIs.
In addition to different byte orders and ABIs there are also different
releases of the MIPS architecture. To avoid blowing up the test matrix,
only add a subset of all possible test combinations.
Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
Tested-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
Link: https://lore.kernel.org/r/20250623-nolibc-mips-n32-v3-4-6ae2d89f4259@weissschuh.net
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tools/include/nolibc/arch-mips.h
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tools/include/nolibc/arch-mips.h
···
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#include "compiler.h"
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#include "crt.h"
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#if !defined(_ABIO32)
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#if !defined(_ABIO32) && !defined(_ABIN32) && !defined(_ABI64)
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#error Unsupported MIPS ABI
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#endif
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···
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* - the arguments are cast to long and assigned into the target registers
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* which are then simply passed as registers to the asm code, so that we
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* don't have to experience issues with register constraints.
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*
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* Syscalls for MIPS ABI N32, same as ABI O32 with the following differences :
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* - arguments are in a0, a1, a2, a3, t0, t1, t2, t3.
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* t0..t3 are also known as a4..a7.
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* - stack is 16-byte aligned
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*/
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#if defined(_ABIO32)
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#define _NOLIBC_SYSCALL_CLOBBERLIST \
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"memory", "cc", "at", "v1", "hi", "lo", \
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"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9"
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#define _NOLIBC_SYSCALL_STACK_RESERVE "addiu $sp, $sp, -32\n"
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#define _NOLIBC_SYSCALL_STACK_UNRESERVE "addiu $sp, $sp, 32\n"
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#else /* _ABIN32 || _ABI64 */
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/* binutils, GCC and clang disagree about register aliases, use numbers instead. */
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#define _NOLIBC_SYSCALL_CLOBBERLIST \
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"memory", "cc", "at", "v1", \
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"10", "11", "12", "13", "14", "15", "24", "25"
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#define _NOLIBC_SYSCALL_STACK_RESERVE
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#define _NOLIBC_SYSCALL_STACK_UNRESERVE
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#endif /* _ABIO32 */
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#define my_syscall0(num) \
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({ \
···
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register long _arg4 __asm__ ("a3"); \
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\
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__asm__ volatile ( \
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"addiu $sp, $sp, -32\n" \
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_NOLIBC_SYSCALL_STACK_RESERVE \
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"syscall\n" \
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"addiu $sp, $sp, 32\n" \
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_NOLIBC_SYSCALL_STACK_UNRESERVE \
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: "=r"(_num), "=r"(_arg4) \
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: "r"(_num) \
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: _NOLIBC_SYSCALL_CLOBBERLIST \
···
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register long _arg4 __asm__ ("a3"); \
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\
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__asm__ volatile ( \
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"addiu $sp, $sp, -32\n" \
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_NOLIBC_SYSCALL_STACK_RESERVE \
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"syscall\n" \
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"addiu $sp, $sp, 32\n" \
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_NOLIBC_SYSCALL_STACK_UNRESERVE \
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: "=r"(_num), "=r"(_arg4) \
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: "0"(_num), \
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"r"(_arg1) \
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register long _arg4 __asm__ ("a3"); \
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\
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__asm__ volatile ( \
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"addiu $sp, $sp, -32\n" \
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_NOLIBC_SYSCALL_STACK_RESERVE \
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"syscall\n" \
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"addiu $sp, $sp, 32\n" \
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_NOLIBC_SYSCALL_STACK_UNRESERVE \
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: "=r"(_num), "=r"(_arg4) \
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: "0"(_num), \
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"r"(_arg1), "r"(_arg2) \
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register long _arg4 __asm__ ("a3"); \
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\
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__asm__ volatile ( \
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"addiu $sp, $sp, -32\n" \
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_NOLIBC_SYSCALL_STACK_RESERVE \
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"syscall\n" \
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"addiu $sp, $sp, 32\n" \
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_NOLIBC_SYSCALL_STACK_UNRESERVE \
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: "=r"(_num), "=r"(_arg4) \
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: "0"(_num), \
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"r"(_arg1), "r"(_arg2), "r"(_arg3) \
···
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register long _arg4 __asm__ ("a3") = (long)(arg4); \
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\
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__asm__ volatile ( \
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"addiu $sp, $sp, -32\n" \
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_NOLIBC_SYSCALL_STACK_RESERVE \
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"syscall\n" \
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"addiu $sp, $sp, 32\n" \
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_NOLIBC_SYSCALL_STACK_UNRESERVE \
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: "=r" (_num), "=r"(_arg4) \
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: "0"(_num), \
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"r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4) \
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); \
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_arg4 ? -_num : _num; \
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})
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#if defined(_ABIO32)
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#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
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({ \
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register long _arg5 = (long)(arg5); \
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\
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__asm__ volatile ( \
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"addiu $sp, $sp, -32\n" \
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_NOLIBC_SYSCALL_STACK_RESERVE \
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"sw %7, 16($sp)\n" \
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"syscall\n" \
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"addiu $sp, $sp, 32\n" \
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_NOLIBC_SYSCALL_STACK_UNRESERVE \
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: "=r" (_num), "=r"(_arg4) \
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: "0"(_num), \
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"r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5) \
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register long _arg6 = (long)(arg6); \
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\
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__asm__ volatile ( \
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"addiu $sp, $sp, -32\n" \
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_NOLIBC_SYSCALL_STACK_RESERVE \
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"sw %7, 16($sp)\n" \
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"sw %8, 20($sp)\n" \
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"syscall\n" \
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"addiu $sp, $sp, 32\n" \
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_NOLIBC_SYSCALL_STACK_UNRESERVE \
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: "=r" (_num), "=r"(_arg4) \
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: "0"(_num), \
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"r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
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_arg4 ? -_num : _num; \
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})
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#else /* _ABIN32 || _ABI64 */
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#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
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({ \
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register long _num __asm__ ("v0") = (num); \
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register long _arg1 __asm__ ("$4") = (long)(arg1); \
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register long _arg2 __asm__ ("$5") = (long)(arg2); \
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register long _arg3 __asm__ ("$6") = (long)(arg3); \
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register long _arg4 __asm__ ("$7") = (long)(arg4); \
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register long _arg5 __asm__ ("$8") = (long)(arg5); \
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\
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__asm__ volatile ( \
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"syscall\n" \
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: "=r" (_num), "=r"(_arg4) \
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: "0"(_num), \
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"r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5) \
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: _NOLIBC_SYSCALL_CLOBBERLIST \
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); \
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_arg4 ? -_num : _num; \
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})
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#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
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({ \
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register long _num __asm__ ("v0") = (num); \
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register long _arg1 __asm__ ("$4") = (long)(arg1); \
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register long _arg2 __asm__ ("$5") = (long)(arg2); \
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register long _arg3 __asm__ ("$6") = (long)(arg3); \
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register long _arg4 __asm__ ("$7") = (long)(arg4); \
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register long _arg5 __asm__ ("$8") = (long)(arg5); \
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register long _arg6 __asm__ ("$9") = (long)(arg6); \
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\
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__asm__ volatile ( \
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"syscall\n" \
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: "=r" (_num), "=r"(_arg4) \
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: "0"(_num), \
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"r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
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"r"(_arg6) \
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: _NOLIBC_SYSCALL_CLOBBERLIST \
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); \
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_arg4 ? -_num : _num; \
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})
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#endif /* _ABIO32 */
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/* startup code, note that it's called __start on MIPS */
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void __start(void);
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void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector __start(void)
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{
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__asm__ volatile (
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"move $a0, $sp\n" /* save stack pointer to $a0, as arg1 of _start_c */
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#if defined(_ABIO32)
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"addiu $sp, $sp, -16\n" /* the callee expects to save a0..a3 there */
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#endif /* _ABIO32 */
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"lui $t9, %hi(_start_c)\n" /* ABI requires current function address in $t9 */
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"ori $t9, %lo(_start_c)\n"
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#if defined(_ABI64)
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"lui $t0, %highest(_start_c)\n"
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"ori $t0, %higher(_start_c)\n"
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"dsll $t0, 0x20\n"
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"or $t9, $t0\n"
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#endif /* _ABI64 */
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"jalr $t9\n" /* transfer to c runtime */
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);
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__nolibc_entrypoint_epilogue();
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tools/testing/selftests/nolibc/Makefile.nolibc
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tools/testing/selftests/nolibc/Makefile.nolibc
···
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ARCH_ppc64le = powerpc
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ARCH_mips32le = mips
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ARCH_mips32be = mips
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ARCH_mipsn32le = mips
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ARCH_mipsn32be = mips
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ARCH_mips64le = mips
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ARCH_mips64be = mips
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ARCH_riscv32 = riscv
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ARCH_riscv64 = riscv
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ARCH_s390x = s390
···
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IMAGE_armthumb = arch/arm/boot/zImage
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IMAGE_mips32le = vmlinuz
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IMAGE_mips32be = vmlinuz
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IMAGE_mipsn32le = vmlinuz
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IMAGE_mipsn32be = vmlinuz
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IMAGE_mips64le = vmlinuz
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IMAGE_mips64be = vmlinuz
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IMAGE_ppc = vmlinux
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IMAGE_ppc64 = vmlinux
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IMAGE_ppc64le = arch/powerpc/boot/zImage
···
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DEFCONFIG_armthumb = multi_v7_defconfig
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DEFCONFIG_mips32le = malta_defconfig
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DEFCONFIG_mips32be = malta_defconfig generic/eb.config
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DEFCONFIG_mipsn32le = malta_defconfig generic/64r2.config
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DEFCONFIG_mipsn32be = malta_defconfig generic/64r6.config generic/eb.config
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DEFCONFIG_mips64le = malta_defconfig generic/64r6.config
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DEFCONFIG_mips64be = malta_defconfig generic/64r2.config generic/eb.config
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DEFCONFIG_ppc = pmac32_defconfig
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DEFCONFIG_ppc64 = powernv_be_defconfig
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DEFCONFIG_ppc64le = powernv_defconfig
···
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QEMU_ARCH_armthumb = arm
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QEMU_ARCH_mips32le = mipsel # works with malta_defconfig
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QEMU_ARCH_mips32be = mips
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QEMU_ARCH_mipsn32le = mips64el
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QEMU_ARCH_mipsn32be = mips64
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QEMU_ARCH_mips64le = mips64el
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QEMU_ARCH_mips64be = mips64
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QEMU_ARCH_ppc = ppc
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QEMU_ARCH_ppc64 = ppc64
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QEMU_ARCH_ppc64le = ppc64
···
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QEMU_ARCH = $(QEMU_ARCH_$(XARCH))
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QEMU_ARCH_USER_ppc64le = ppc64le
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QEMU_ARCH_USER_mipsn32le = mipsn32el
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QEMU_ARCH_USER_mipsn32be = mipsn32
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QEMU_ARCH_USER = $(or $(QEMU_ARCH_USER_$(XARCH)),$(QEMU_ARCH_$(XARCH)))
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QEMU_BIOS_DIR = /usr/share/edk2/
···
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QEMU_ARGS_armthumb = -M virt -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)"
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QEMU_ARGS_mips32le = -M malta -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)"
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QEMU_ARGS_mips32be = -M malta -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)"
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QEMU_ARGS_mipsn32le = -M malta -cpu 5KEc -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)"
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QEMU_ARGS_mipsn32be = -M malta -cpu I6400 -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)"
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QEMU_ARGS_mips64le = -M malta -cpu I6400 -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)"
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QEMU_ARGS_mips64be = -M malta -cpu 5KEc -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)"
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QEMU_ARGS_ppc = -M g3beige -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)"
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QEMU_ARGS_ppc64 = -M powernv -append "console=hvc0 panic=-1 $(TEST:%=NOLIBC_TEST=%)"
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QEMU_ARGS_ppc64le = -M powernv -append "console=hvc0 panic=-1 $(TEST:%=NOLIBC_TEST=%)"
···
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CFLAGS_s390 = -m31
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CFLAGS_mips32le = -EL -mabi=32 -fPIC
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CFLAGS_mips32be = -EB -mabi=32
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CFLAGS_mipsn32le = -EL -mabi=n32 -fPIC -march=mips64r2
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CFLAGS_mipsn32be = -EB -mabi=n32 -march=mips64r6
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CFLAGS_mips64le = -EL -mabi=64 -march=mips64r6
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CFLAGS_mips64be = -EB -mabi=64 -march=mips64r2
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CFLAGS_sparc32 = $(call cc-option,-m32)
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ifeq ($(origin XARCH),command line)
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CFLAGS_XARCH = $(CFLAGS_$(XARCH))