memory: ti-aemif: Create aemif_set_cs_timings()

Create an aemif_set_cs_timings() function to isolate the setting of a
chip select timing configuration and ease its exportation.

Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20241204094319.1050826-6-bastien.curutchet@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

authored by

Bastien Curutchet and committed by

Krzysztof Kozlowski 2 years ago a6d60e33 2c7b585d

+49 -16

1 changed file

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drivers

memory

ti-aemif.c

+49 -16

drivers/memory/ti-aemif.c

··· 69 69 #define ACR_SSTROBE_MASK BIT(31) 70 70 #define ASIZE_16BIT 1 71 71 72 - #define CONFIG_MASK (TA(TA_MAX) | \ 73 - RHOLD(RHOLD_MAX) | \ 74 - RSTROBE(RSTROBE_MAX) | \ 75 - RSETUP(RSETUP_MAX) | \ 76 - WHOLD(WHOLD_MAX) | \ 77 - WSTROBE(WSTROBE_MAX) | \ 78 - WSETUP(WSETUP_MAX) | \ 79 - EW(EW_MAX) | SSTROBE(SSTROBE_MAX) | \ 80 - ASIZE_MAX) 72 + #define TIMINGS_MASK (TA(TA_MAX) | \ 73 + RHOLD(RHOLD_MAX) | \ 74 + RSTROBE(RSTROBE_MAX) | \ 75 + RSETUP(RSETUP_MAX) | \ 76 + WHOLD(WHOLD_MAX) | \ 77 + WSTROBE(WSTROBE_MAX) | \ 78 + WSETUP(WSETUP_MAX)) 79 + 80 + #define CONFIG_MASK (EW(EW_MAX) | SSTROBE(SSTROBE_MAX) | ASIZE_MAX) 81 81 82 82 /** 83 83 * struct aemif_cs_timings: structure to hold CS timings ··· 166 166 } 167 167 168 168 /** 169 + * aemif_set_cs_timings() - Set the timing configuration of a given chip select. 170 + * @aemif: aemif device to configure 171 + * @cs: index of the chip select to configure 172 + * @timings: timings configuration to set 173 + * 174 + * @return: 0 on success, else negative errno. 175 + */ 176 + static int aemif_set_cs_timings(struct aemif_device *aemif, u8 cs, struct aemif_cs_timings *timings) 177 + { 178 + unsigned int offset; 179 + u32 val, set; 180 + int ret; 181 + 182 + if (!timings || !aemif) 183 + return -EINVAL; 184 + 185 + if (cs > aemif->num_cs) 186 + return -EINVAL; 187 + 188 + ret = aemif_check_cs_timings(timings); 189 + if (ret) 190 + return ret; 191 + 192 + set = TA(timings->ta) | RHOLD(timings->rhold) | RSTROBE(timings->rstrobe) | 193 + RSETUP(timings->rsetup) | WHOLD(timings->whold) | 194 + WSTROBE(timings->wstrobe) | WSETUP(timings->wsetup); 195 + 196 + offset = A1CR_OFFSET + cs * 4; 197 + 198 + val = readl(aemif->base + offset); 199 + val &= ~TIMINGS_MASK; 200 + val |= set; 201 + writel(val, aemif->base + offset); 202 + 203 + return 0; 204 + } 205 + 206 + /** 169 207 * aemif_calc_rate - calculate timing data. 170 208 * @pdev: platform device to calculate for 171 209 * @wanted: The cycle time needed in nanoseconds. ··· 251 213 252 214 offset = A1CR_OFFSET + (data->cs - aemif->cs_offset) * 4; 253 215 254 - set = TA(data->timings.ta) | 255 - RHOLD(data->timings.rhold) | RSTROBE(data->timings.rstrobe) | 256 - RSETUP(data->timings.rsetup) | WHOLD(data->timings.whold) | 257 - WSTROBE(data->timings.wstrobe) | WSETUP(data->timings.wsetup); 258 - 259 - set |= (data->asize & ACR_ASIZE_MASK); 216 + set = (data->asize & ACR_ASIZE_MASK); 260 217 if (data->enable_ew) 261 218 set |= ACR_EW_MASK; 262 219 if (data->enable_ss) ··· 262 229 val |= set; 263 230 writel(val, aemif->base + offset); 264 231 265 - return 0; 232 + return aemif_set_cs_timings(aemif, data->cs - aemif->cs_offset, &data->timings); 266 233 } 267 234 268 235 /**

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