Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'net-add-1600gbps-1-6t-link-mode-support'
Tariq Toukan says:
====================
net: Add 1600Gbps (1.6T) link mode support
This series by Yael adds 1600Gbps (1.6T) link mode support.
See detailed description by Yael below.
====================
Link: https://patch.msgid.link/1763585297-1243980-1-git-send-email-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+34
-1
+9
drivers/net/bonding/bond_3ad.c
+9
drivers/net/bonding/bond_3ad.c
···
76
76
AD_LINK_SPEED_200000MBPS,
77
77
AD_LINK_SPEED_400000MBPS,
78
78
AD_LINK_SPEED_800000MBPS,
79
+
AD_LINK_SPEED_1600000MBPS,
79
80
};
80
81
81
82
/* compare MAC addresses */
···
301
300
* %AD_LINK_SPEED_200000MBPS
302
301
* %AD_LINK_SPEED_400000MBPS
303
302
* %AD_LINK_SPEED_800000MBPS
303
+
* %AD_LINK_SPEED_1600000MBPS
304
304
*/
305
305
static u16 __get_link_speed(struct port *port)
306
306
{
···
379
377
380
378
case SPEED_800000:
381
379
speed = AD_LINK_SPEED_800000MBPS;
380
+
break;
381
+
382
+
case SPEED_1600000:
383
+
speed = AD_LINK_SPEED_1600000MBPS;
382
384
break;
383
385
384
386
default:
···
827
821
break;
828
822
case AD_LINK_SPEED_800000MBPS:
829
823
bandwidth = nports * 800000;
824
+
break;
825
+
case AD_LINK_SPEED_1600000MBPS:
826
+
bandwidth = nports * 1600000;
830
827
break;
831
828
default:
832
829
bandwidth = 0; /* to silence the compiler */
+5
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
+5
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
···
261
261
ETHTOOL_LINK_MODE_800000baseDR4_2_Full_BIT,
262
262
ETHTOOL_LINK_MODE_800000baseSR4_Full_BIT,
263
263
ETHTOOL_LINK_MODE_800000baseVR4_Full_BIT);
264
+
MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1600TAUI_8_1600TBASE_CR8_KR8, ext,
265
+
ETHTOOL_LINK_MODE_1600000baseCR8_Full_BIT,
266
+
ETHTOOL_LINK_MODE_1600000baseKR8_Full_BIT,
267
+
ETHTOOL_LINK_MODE_1600000baseDR8_Full_BIT,
268
+
ETHTOOL_LINK_MODE_1600000baseDR8_2_Full_BIT);
264
269
}
265
270
266
271
static void mlx5e_ethtool_get_speed_arr(bool ext,
+1
drivers/net/ethernet/mellanox/mlx5/core/port.c
+1
drivers/net/ethernet/mellanox/mlx5/core/port.c
···
1108
1108
[MLX5E_200GAUI_1_200GBASE_CR1_KR1] = {.speed = 200000, .lanes = 1},
1109
1109
[MLX5E_400GAUI_2_400GBASE_CR2_KR2] = {.speed = 400000, .lanes = 2},
1110
1110
[MLX5E_800GAUI_4_800GBASE_CR4_KR4] = {.speed = 800000, .lanes = 4},
1111
+
[MLX5E_1600TAUI_8_1600TBASE_CR8_KR8] = {.speed = 1600000, .lanes = 8},
1111
1112
};
1112
1113
1113
1114
int mlx5_port_query_eth_proto(struct mlx5_core_dev *dev, u8 port, bool ext,
+1
drivers/net/phy/phy-caps.h
+1
drivers/net/phy/phy-caps.h
+3
-1
drivers/net/phy/phy-core.c
+3
-1
drivers/net/phy/phy-core.c
···
17
17
*/
18
18
const char *phy_speed_to_str(int speed)
19
19
{
20
-
BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 121,
20
+
BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 125,
21
21
"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
22
22
"If a speed or mode has been added please update phy_speed_to_str "
23
23
"and the PHY settings array.\n");
···
55
55
return "400Gbps";
56
56
case SPEED_800000:
57
57
return "800Gbps";
58
+
case SPEED_1600000:
59
+
return "1600Gbps";
58
60
case SPEED_UNKNOWN:
59
61
return "Unknown";
60
62
default:
+2
drivers/net/phy/phy_caps.c
+2
drivers/net/phy/phy_caps.c
···
25
25
{ SPEED_200000, DUPLEX_FULL, {0} }, /* LINK_CAPA_200000FD */
26
26
{ SPEED_400000, DUPLEX_FULL, {0} }, /* LINK_CAPA_400000FD */
27
27
{ SPEED_800000, DUPLEX_FULL, {0} }, /* LINK_CAPA_800000FD */
28
+
{ SPEED_1600000, DUPLEX_FULL, {0} }, /* LINK_CAPA_1600000FD */
28
29
};
29
30
30
31
static int speed_duplex_to_capa(int speed, unsigned int duplex)
···
53
52
case SPEED_200000: return LINK_CAPA_200000FD;
54
53
case SPEED_400000: return LINK_CAPA_400000FD;
55
54
case SPEED_800000: return LINK_CAPA_800000FD;
55
+
case SPEED_1600000: return LINK_CAPA_1600000FD;
56
56
}
57
57
58
58
return -EINVAL;
+5
include/uapi/linux/ethtool.h
+5
include/uapi/linux/ethtool.h
···
2077
2077
ETHTOOL_LINK_MODE_800000baseDR4_2_Full_BIT = 118,
2078
2078
ETHTOOL_LINK_MODE_800000baseSR4_Full_BIT = 119,
2079
2079
ETHTOOL_LINK_MODE_800000baseVR4_Full_BIT = 120,
2080
+
ETHTOOL_LINK_MODE_1600000baseCR8_Full_BIT = 121,
2081
+
ETHTOOL_LINK_MODE_1600000baseKR8_Full_BIT = 122,
2082
+
ETHTOOL_LINK_MODE_1600000baseDR8_Full_BIT = 123,
2083
+
ETHTOOL_LINK_MODE_1600000baseDR8_2_Full_BIT = 124,
2080
2084
2081
2085
/* must be last entry */
2082
2086
__ETHTOOL_LINK_MODE_MASK_NBITS
···
2194
2190
#define SPEED_200000 200000
2195
2191
#define SPEED_400000 400000
2196
2192
#define SPEED_800000 800000
2193
+
#define SPEED_1600000 1600000
2197
2194
2198
2195
#define SPEED_UNKNOWN -1
2199
2196
+8
net/ethtool/common.c
+8
net/ethtool/common.c
···
233
233
__DEFINE_LINK_MODE_NAME(800000, DR4_2, Full),
234
234
__DEFINE_LINK_MODE_NAME(800000, SR4, Full),
235
235
__DEFINE_LINK_MODE_NAME(800000, VR4, Full),
236
+
__DEFINE_LINK_MODE_NAME(1600000, CR8, Full),
237
+
__DEFINE_LINK_MODE_NAME(1600000, KR8, Full),
238
+
__DEFINE_LINK_MODE_NAME(1600000, DR8, Full),
239
+
__DEFINE_LINK_MODE_NAME(1600000, DR8_2, Full),
236
240
};
237
241
static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS);
238
242
···
426
422
__DEFINE_LINK_MODE_PARAMS(800000, DR4_2, Full),
427
423
__DEFINE_LINK_MODE_PARAMS(800000, SR4, Full),
428
424
__DEFINE_LINK_MODE_PARAMS(800000, VR4, Full),
425
+
__DEFINE_LINK_MODE_PARAMS(1600000, CR8, Full),
426
+
__DEFINE_LINK_MODE_PARAMS(1600000, KR8, Full),
427
+
__DEFINE_LINK_MODE_PARAMS(1600000, DR8, Full),
428
+
__DEFINE_LINK_MODE_PARAMS(1600000, DR8_2, Full),
429
429
};
430
430
static_assert(ARRAY_SIZE(link_mode_params) == __ETHTOOL_LINK_MODE_MASK_NBITS);
431
431
EXPORT_SYMBOL_GPL(link_mode_params);