drm/nouveau/mmu/gp100: Remove unused/broken support for compression

From GP100 onwards it's not possible to initialise comptag RAM without
PMU firmware, which nouveau has no support for.

As such, this code is essentially a no-op and will always revert to the
equivalent non-compressed kind due to comptag allocation failure. It's
also broken for the needs of VM_BIND/Vulkan.

Remove the code entirely to make way for supporting compression on GPUs
that support GSM-RM.

Signed-off-by: Ben Skeggs <bskeggs@nvidia.com>
Signed-off-by: Mohamed Ahmed <mohamedahmedegypt2001@gmail.com>
Signed-off-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: James Jones <jajones@nvidia.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patch.msgid.link/20251110-nouveau-compv6-v6-3-83b05475f57c@mary.zone

authored by

Ben Skeggs and committed by

Lyude Paul 7 months ago a79d3845 c488a94e

+6 -37

2 changed files

expand all

drivers

gpu

drm

nouveau

nvkm

subdev

mmu

vmmgp100.c

vmmgp10b.c

+4 -35

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c

··· 21 21 */ 22 22 #include "vmm.h" 23 23 24 - #include <core/client.h> 25 24 #include <subdev/fb.h> 26 - #include <subdev/ltc.h> 27 25 #include <subdev/timer.h> 28 26 #include <engine/gr.h> 29 27 ··· 115 117 { 116 118 u64 data = (addr >> 4) | map->type; 117 119 118 - map->type += ptes * map->ctag; 119 - 120 120 while (ptes--) { 121 121 VMM_WO064(pt, vmm, ptei++ * 8, data); 122 122 data += map->next; ··· 138 142 while (ptes--) { 139 143 const u64 data = (*map->dma++ >> 4) | map->type; 140 144 VMM_WO064(pt, vmm, ptei++ * 8, data); 141 - map->type += map->ctag; 142 145 } 143 146 nvkm_done(pt->memory); 144 147 return; ··· 194 199 u32 ptei, u32 ptes, struct nvkm_vmm_map *map, u64 addr) 195 200 { 196 201 u64 data = (addr >> 4) | map->type; 197 - 198 - map->type += ptes * map->ctag; 199 202 200 203 while (ptes--) { 201 204 VMM_WO128(pt, vmm, ptei++ * 0x10, data, 0ULL); ··· 404 411 struct gp100_vmm_map_vn vn; 405 412 struct gp100_vmm_map_v0 v0; 406 413 } *args = argv; 407 - struct nvkm_device *device = vmm->mmu->subdev.device; 408 - struct nvkm_memory *memory = map->memory; 409 414 u8 kind, kind_inv, priv, ro, vol; 410 415 int kindn, aper, ret = -ENOSYS; 411 416 const u8 *kindm; ··· 441 450 } 442 451 443 452 if (kindm[kind] != kind) { 444 - u64 tags = nvkm_memory_size(memory) >> 16; 445 - if (aper != 0 || !(page->type & NVKM_VMM_PAGE_COMP)) { 446 - VMM_DEBUG(vmm, "comp %d %02x", aper, page->type); 447 - return -EINVAL; 448 - } 449 - 450 - if (!map->no_comp) { 451 - ret = nvkm_memory_tags_get(memory, device, tags, 452 - nvkm_ltc_tags_clear, 453 - &map->tags); 454 - if (ret) { 455 - VMM_DEBUG(vmm, "comp %d", ret); 456 - return ret; 457 - } 458 - } 459 - 460 - if (!map->no_comp && map->tags->mn) { 461 - tags = map->tags->mn->offset + (map->offset >> 16); 462 - map->ctag |= ((1ULL << page->shift) >> 16) << 36; 463 - map->type |= tags << 36; 464 - map->next |= map->ctag; 465 - } else { 466 - kind = kindm[kind]; 467 - } 453 + /* Revert to non-compressed kind. */ 454 + kind = kindm[kind]; 468 455 } 469 456 470 457 map->type |= BIT(0); ··· 561 592 { 47, &gp100_vmm_desc_16[4], NVKM_VMM_PAGE_Sxxx }, 562 593 { 38, &gp100_vmm_desc_16[3], NVKM_VMM_PAGE_Sxxx }, 563 594 { 29, &gp100_vmm_desc_16[2], NVKM_VMM_PAGE_Sxxx }, 564 - { 21, &gp100_vmm_desc_16[1], NVKM_VMM_PAGE_SVxC }, 565 - { 16, &gp100_vmm_desc_16[0], NVKM_VMM_PAGE_SVxC }, 595 + { 21, &gp100_vmm_desc_16[1], NVKM_VMM_PAGE_SVxx }, 596 + { 16, &gp100_vmm_desc_16[0], NVKM_VMM_PAGE_SVxx }, 566 597 { 12, &gp100_vmm_desc_12[0], NVKM_VMM_PAGE_SVHx }, 567 598 {} 568 599 }

+2 -2

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp10b.c

··· 34 34 { 47, &gp100_vmm_desc_16[4], NVKM_VMM_PAGE_Sxxx }, 35 35 { 38, &gp100_vmm_desc_16[3], NVKM_VMM_PAGE_Sxxx }, 36 36 { 29, &gp100_vmm_desc_16[2], NVKM_VMM_PAGE_Sxxx }, 37 - { 21, &gp100_vmm_desc_16[1], NVKM_VMM_PAGE_SxHC }, 38 - { 16, &gp100_vmm_desc_16[0], NVKM_VMM_PAGE_SxHC }, 37 + { 21, &gp100_vmm_desc_16[1], NVKM_VMM_PAGE_SxHx }, 38 + { 16, &gp100_vmm_desc_16[0], NVKM_VMM_PAGE_SxHx }, 39 39 { 12, &gp100_vmm_desc_12[0], NVKM_VMM_PAGE_SxHx }, 40 40 {} 41 41 }

Configure Feed

Configure Feed