Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'i2c-for-6.3-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang:
"Just two driver fixes"
* tag 'i2c-for-6.3-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: ocores: generate stop condition after timeout in polling mode
i2c: mchp-pci1xxxx: Update Timing registers
+49
-46
+30
-30
drivers/i2c/busses/i2c-mchp-pci1xxxx.c
+30
-30
drivers/i2c/busses/i2c-mchp-pci1xxxx.c
···
48
48
* SR_HOLD_TIME_XK_TICKS field will indicate the number of ticks of the
49
49
* baud clock required to program 'Hold Time' at X KHz.
50
50
*/
51
-
#define SR_HOLD_TIME_100K_TICKS 133
52
-
#define SR_HOLD_TIME_400K_TICKS 20
53
-
#define SR_HOLD_TIME_1000K_TICKS 11
51
+
#define SR_HOLD_TIME_100K_TICKS 150
52
+
#define SR_HOLD_TIME_400K_TICKS 20
53
+
#define SR_HOLD_TIME_1000K_TICKS 12
54
54
55
55
#define SMB_CORE_COMPLETION_REG_OFF3 (SMBUS_MAST_CORE_ADDR_BASE + 0x23)
56
56
···
65
65
* the baud clock required to program 'fair idle delay' at X KHz. Fair idle
66
66
* delay establishes the MCTP T(IDLE_DELAY) period.
67
67
*/
68
-
#define FAIR_BUS_IDLE_MIN_100K_TICKS 969
69
-
#define FAIR_BUS_IDLE_MIN_400K_TICKS 157
70
-
#define FAIR_BUS_IDLE_MIN_1000K_TICKS 157
68
+
#define FAIR_BUS_IDLE_MIN_100K_TICKS 992
69
+
#define FAIR_BUS_IDLE_MIN_400K_TICKS 500
70
+
#define FAIR_BUS_IDLE_MIN_1000K_TICKS 500
71
71
72
72
/*
73
73
* FAIR_IDLE_DELAY_XK_TICKS field will indicate the number of ticks of the
74
74
* baud clock required to satisfy the fairness protocol at X KHz.
75
75
*/
76
-
#define FAIR_IDLE_DELAY_100K_TICKS 1000
77
-
#define FAIR_IDLE_DELAY_400K_TICKS 500
78
-
#define FAIR_IDLE_DELAY_1000K_TICKS 500
76
+
#define FAIR_IDLE_DELAY_100K_TICKS 963
77
+
#define FAIR_IDLE_DELAY_400K_TICKS 156
78
+
#define FAIR_IDLE_DELAY_1000K_TICKS 156
79
79
80
80
#define SMB_IDLE_SCALING_100K \
81
81
((FAIR_IDLE_DELAY_100K_TICKS << 16) | FAIR_BUS_IDLE_MIN_100K_TICKS)
···
105
105
*/
106
106
#define BUS_CLK_100K_LOW_PERIOD_TICKS 156
107
107
#define BUS_CLK_400K_LOW_PERIOD_TICKS 41
108
-
#define BUS_CLK_1000K_LOW_PERIOD_TICKS 15
108
+
#define BUS_CLK_1000K_LOW_PERIOD_TICKS 15
109
109
110
110
/*
111
111
* BUS_CLK_XK_HIGH_PERIOD_TICKS field defines the number of I2C Baud Clock
···
131
131
*/
132
132
#define CLK_SYNC_100K 4
133
133
#define CLK_SYNC_400K 4
134
-
#define CLK_SYNC_1000K 4
134
+
#define CLK_SYNC_1000K 4
135
135
136
136
#define SMB_CORE_DATA_TIMING_REG_OFF (SMBUS_MAST_CORE_ADDR_BASE + 0x40)
137
137
···
142
142
* determines the SCLK hold time following SDAT driven low during the first
143
143
* START bit in a transfer.
144
144
*/
145
-
#define FIRST_START_HOLD_100K_TICKS 22
146
-
#define FIRST_START_HOLD_400K_TICKS 16
147
-
#define FIRST_START_HOLD_1000K_TICKS 6
145
+
#define FIRST_START_HOLD_100K_TICKS 23
146
+
#define FIRST_START_HOLD_400K_TICKS 8
147
+
#define FIRST_START_HOLD_1000K_TICKS 12
148
148
149
149
/*
150
150
* STOP_SETUP_XK_TICKS will indicate the number of ticks of the baud clock
151
151
* required to program 'STOP_SETUP' timer at X KHz. This timer determines the
152
152
* SDAT setup time from the rising edge of SCLK for a STOP condition.
153
153
*/
154
-
#define STOP_SETUP_100K_TICKS 157
154
+
#define STOP_SETUP_100K_TICKS 150
155
155
#define STOP_SETUP_400K_TICKS 20
156
-
#define STOP_SETUP_1000K_TICKS 12
156
+
#define STOP_SETUP_1000K_TICKS 12
157
157
158
158
/*
159
159
* RESTART_SETUP_XK_TICKS will indicate the number of ticks of the baud clock
160
160
* required to program 'RESTART_SETUP' timer at X KHz. This timer determines the
161
161
* SDAT setup time from the rising edge of SCLK for a repeated START condition.
162
162
*/
163
-
#define RESTART_SETUP_100K_TICKS 157
163
+
#define RESTART_SETUP_100K_TICKS 156
164
164
#define RESTART_SETUP_400K_TICKS 20
165
165
#define RESTART_SETUP_1000K_TICKS 12
166
166
···
169
169
* required to program 'DATA_HOLD' timer at X KHz. This timer determines the
170
170
* SDAT hold time following SCLK driven low.
171
171
*/
172
-
#define DATA_HOLD_100K_TICKS 2
172
+
#define DATA_HOLD_100K_TICKS 12
173
173
#define DATA_HOLD_400K_TICKS 2
174
174
#define DATA_HOLD_1000K_TICKS 2
175
175
···
190
190
* Bus Idle Minimum time = BUS_IDLE_MIN[7:0] x Baud_Clock_Period x
191
191
* (BUS_IDLE_MIN_XK_TICKS[7] ? 4,1)
192
192
*/
193
-
#define BUS_IDLE_MIN_100K_TICKS 167UL
194
-
#define BUS_IDLE_MIN_400K_TICKS 139UL
195
-
#define BUS_IDLE_MIN_1000K_TICKS 133UL
193
+
#define BUS_IDLE_MIN_100K_TICKS 36UL
194
+
#define BUS_IDLE_MIN_400K_TICKS 10UL
195
+
#define BUS_IDLE_MIN_1000K_TICKS 4UL
196
196
197
197
/*
198
198
* CTRL_CUM_TIME_OUT_XK_TICKS defines SMBus Controller Cumulative Time-Out.
199
199
* SMBus Controller Cumulative Time-Out duration =
200
200
* CTRL_CUM_TIME_OUT_XK_TICKS[7:0] x Baud_Clock_Period x 2048
201
201
*/
202
-
#define CTRL_CUM_TIME_OUT_100K_TICKS 159
203
-
#define CTRL_CUM_TIME_OUT_400K_TICKS 159
204
-
#define CTRL_CUM_TIME_OUT_1000K_TICKS 159
202
+
#define CTRL_CUM_TIME_OUT_100K_TICKS 76
203
+
#define CTRL_CUM_TIME_OUT_400K_TICKS 76
204
+
#define CTRL_CUM_TIME_OUT_1000K_TICKS 76
205
205
206
206
/*
207
207
* TARGET_CUM_TIME_OUT_XK_TICKS defines SMBus Target Cumulative Time-Out duration.
208
208
* SMBus Target Cumulative Time-Out duration = TARGET_CUM_TIME_OUT_XK_TICKS[7:0] x
209
209
* Baud_Clock_Period x 4096
210
210
*/
211
-
#define TARGET_CUM_TIME_OUT_100K_TICKS 199
212
-
#define TARGET_CUM_TIME_OUT_400K_TICKS 199
213
-
#define TARGET_CUM_TIME_OUT_1000K_TICKS 199
211
+
#define TARGET_CUM_TIME_OUT_100K_TICKS 95
212
+
#define TARGET_CUM_TIME_OUT_400K_TICKS 95
213
+
#define TARGET_CUM_TIME_OUT_1000K_TICKS 95
214
214
215
215
/*
216
216
* CLOCK_HIGH_TIME_OUT_XK defines Clock High time out period.
217
217
* Clock High time out period = CLOCK_HIGH_TIME_OUT_XK[7:0] x Baud_Clock_Period x 8
218
218
*/
219
-
#define CLOCK_HIGH_TIME_OUT_100K_TICKS 204
220
-
#define CLOCK_HIGH_TIME_OUT_400K_TICKS 204
221
-
#define CLOCK_HIGH_TIME_OUT_1000K_TICKS 204
219
+
#define CLOCK_HIGH_TIME_OUT_100K_TICKS 97
220
+
#define CLOCK_HIGH_TIME_OUT_400K_TICKS 97
221
+
#define CLOCK_HIGH_TIME_OUT_1000K_TICKS 97
222
222
223
223
#define TO_SCALING_100K \
224
224
((BUS_IDLE_MIN_100K_TICKS << 24) | (CTRL_CUM_TIME_OUT_100K_TICKS << 16) | \
+19
-16
drivers/i2c/busses/i2c-ocores.c
+19
-16
drivers/i2c/busses/i2c-ocores.c
···
342
342
* ocores_isr(), we just add our polling code around it.
343
343
*
344
344
* It can run in atomic context
345
+
*
346
+
* Return: 0 on success, -ETIMEDOUT on timeout
345
347
*/
346
-
static void ocores_process_polling(struct ocores_i2c *i2c)
348
+
static int ocores_process_polling(struct ocores_i2c *i2c)
347
349
{
348
-
while (1) {
349
-
irqreturn_t ret;
350
-
int err;
350
+
irqreturn_t ret;
351
+
int err = 0;
351
352
353
+
while (1) {
352
354
err = ocores_poll_wait(i2c);
353
-
if (err) {
354
-
i2c->state = STATE_ERROR;
355
+
if (err)
355
356
break; /* timeout */
356
-
}
357
357
358
358
ret = ocores_isr(-1, i2c);
359
359
if (ret == IRQ_NONE)
···
364
364
break;
365
365
}
366
366
}
367
+
368
+
return err;
367
369
}
368
370
369
371
static int ocores_xfer_core(struct ocores_i2c *i2c,
370
372
struct i2c_msg *msgs, int num,
371
373
bool polling)
372
374
{
373
-
int ret;
375
+
int ret = 0;
374
376
u8 ctrl;
375
377
376
378
ctrl = oc_getreg(i2c, OCI2C_CONTROL);
···
390
388
oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
391
389
392
390
if (polling) {
393
-
ocores_process_polling(i2c);
391
+
ret = ocores_process_polling(i2c);
394
392
} else {
395
-
ret = wait_event_timeout(i2c->wait,
396
-
(i2c->state == STATE_ERROR) ||
397
-
(i2c->state == STATE_DONE), HZ);
398
-
if (ret == 0) {
399
-
ocores_process_timeout(i2c);
400
-
return -ETIMEDOUT;
401
-
}
393
+
if (wait_event_timeout(i2c->wait,
394
+
(i2c->state == STATE_ERROR) ||
395
+
(i2c->state == STATE_DONE), HZ) == 0)
396
+
ret = -ETIMEDOUT;
397
+
}
398
+
if (ret) {
399
+
ocores_process_timeout(i2c);
400
+
return ret;
402
401
}
403
402
404
403
return (i2c->state == STATE_DONE) ? num : -EIO;