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locking/atomic: hexagon: remove redundant arch_atomic_cmpxchg

Hexagon's implementation of arch_atomic_cmpxchg() is identical to its
implementation of arch_cmpxchg(). Have it define arch_atomic_cmpxchg()
in terms of arch_cmpxchg(), matching what it does for arch_atomic_xchg()
and arch_xchg().

At the same time, remove the kerneldoc comments for hexagon's
arch_atomic_xchg() and arch_atomic_cmpxchg(). The arch_atomic_*()
namespace is shared by all architectures and the API should be
documented centrally, and the comments aren't all that helpful as-is.

There should be no functional change as a result of this patch.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Kees Cook <keescook@chromium.org>
Link: https://lore.kernel.org/r/20230605070124.3741859-4-mark.rutland@arm.com

authored by

Mark Rutland and committed by
Peter Zijlstra a7bafa79 14d72d4b

+4 -42
+4 -42
arch/hexagon/include/asm/atomic.h
··· 36 36 */ 37 37 #define arch_atomic_read(v) READ_ONCE((v)->counter) 38 38 39 - /** 40 - * arch_atomic_xchg - atomic 41 - * @v: pointer to memory to change 42 - * @new: new value (technically passed in a register -- see xchg) 43 - */ 44 - #define arch_atomic_xchg(v, new) (arch_xchg(&((v)->counter), (new))) 39 + #define arch_atomic_xchg(v, new) \ 40 + (arch_xchg(&((v)->counter), (new))) 45 41 46 - 47 - /** 48 - * arch_atomic_cmpxchg - atomic compare-and-exchange values 49 - * @v: pointer to value to change 50 - * @old: desired old value to match 51 - * @new: new value to put in 52 - * 53 - * Parameters are then pointer, value-in-register, value-in-register, 54 - * and the output is the old value. 55 - * 56 - * Apparently this is complicated for archs that don't support 57 - * the memw_locked like we do (or it's broken or whatever). 58 - * 59 - * Kind of the lynchpin of the rest of the generically defined routines. 60 - * Remember V2 had that bug with dotnew predicate set by memw_locked. 61 - * 62 - * "old" is "expected" old val, __oldval is actual old value 63 - */ 64 - static inline int arch_atomic_cmpxchg(atomic_t *v, int old, int new) 65 - { 66 - int __oldval; 67 - 68 - asm volatile( 69 - "1: %0 = memw_locked(%1);\n" 70 - " { P0 = cmp.eq(%0,%2);\n" 71 - " if (!P0.new) jump:nt 2f; }\n" 72 - " memw_locked(%1,P0) = %3;\n" 73 - " if (!P0) jump 1b;\n" 74 - "2:\n" 75 - : "=&r" (__oldval) 76 - : "r" (&v->counter), "r" (old), "r" (new) 77 - : "memory", "p0" 78 - ); 79 - 80 - return __oldval; 81 - } 42 + #define arch_atomic_cmpxchg(v, old, new) \ 43 + (arch_cmpxchg(&((v)->counter), (old), (new))) 82 44 83 45 #define ATOMIC_OP(op) \ 84 46 static inline void arch_atomic_##op(int i, atomic_t *v) \