Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'drm-fixes-2025-12-13' of https://gitlab.freedesktop.org/drm/kernel
Pull more drm fixes from Dave Airlie:
"These are the enqueued fixes that ended up in our fixes branch,
nouveau mostly, along with some small fixes in other places.
plane:
- Handle IS_ERR vs NULL in drm_plane_create_hotspot_properties()
ttm:
- fix devcoredump for evicted bos
panel:
- Fix stack usage warning in novatek-nt35560
nouveau:
- alloc fwsec sb at boot to avoid s/r problems
- fix strcpy usage
- fix i2c encoder crash
bridge:
- Ignore spurious PLL_UNLOCK bit in ti-sn65dsi83
mgag200:
- Fix bigendian handling in mgag200
tilcdc:
- Fix probe failure in tilcdc"
* tag 'drm-fixes-2025-12-13' of https://gitlab.freedesktop.org/drm/kernel:
drm/mgag200: Fix big-endian support
drm/tilcdc: Fix removal actions in case of failed probe
drm/ttm: Avoid NULL pointer deref for evicted BOs
drm: nouveau: Replace sprintf() with sysfs_emit()
drm/nouveau: fix circular dep oops from vendored i2c encoder
drm/nouveau: refactor deprecated strcpy
drm/plane: Fix IS_ERR() vs NULL check in drm_plane_create_hotspot_properties()
drm/bridge: ti-sn65dsi83: ignore PLL_UNLOCK errors
drm/nouveau/gsp: Allocate fwsec-sb at boot
drm/panel: novatek-nt35560: avoid on-stack device structure
+166
-76
+9
-2
drivers/gpu/drm/bridge/ti-sn65dsi83.c
+9
-2
drivers/gpu/drm/bridge/ti-sn65dsi83.c
···
429
429
*/
430
430
431
431
ret = regmap_read(ctx->regmap, REG_IRQ_STAT, &irq_stat);
432
-
if (ret || irq_stat) {
432
+
433
+
/*
434
+
* Some hardware (Toradex Verdin AM62) is known to report the
435
+
* PLL_UNLOCK error interrupt while working without visible
436
+
* problems. In lack of a reliable way to discriminate such cases
437
+
* from user-visible PLL_UNLOCK cases, ignore that bit entirely.
438
+
*/
439
+
if (ret || irq_stat & ~REG_IRQ_STAT_CHA_PLL_UNLOCK) {
433
440
/*
434
441
* IRQ acknowledged is not always possible (the bridge can be in
435
442
* a state where it doesn't answer anymore). To prevent an
···
661
654
if (ctx->irq) {
662
655
/* Enable irq to detect errors */
663
656
regmap_write(ctx->regmap, REG_IRQ_GLOBAL, REG_IRQ_GLOBAL_IRQ_EN);
664
-
regmap_write(ctx->regmap, REG_IRQ_EN, 0xff);
657
+
regmap_write(ctx->regmap, REG_IRQ_EN, 0xff & ~REG_IRQ_EN_CHA_PLL_UNLOCK_EN);
665
658
} else {
666
659
/* Use the polling task */
667
660
sn65dsi83_monitor_start(ctx);
+4
-4
drivers/gpu/drm/drm_plane.c
+4
-4
drivers/gpu/drm/drm_plane.c
···
338
338
339
339
prop_x = drm_property_create_signed_range(plane->dev, 0, "HOTSPOT_X",
340
340
INT_MIN, INT_MAX);
341
-
if (IS_ERR(prop_x))
342
-
return PTR_ERR(prop_x);
341
+
if (!prop_x)
342
+
return -ENOMEM;
343
343
344
344
prop_y = drm_property_create_signed_range(plane->dev, 0, "HOTSPOT_Y",
345
345
INT_MIN, INT_MAX);
346
-
if (IS_ERR(prop_y)) {
346
+
if (!prop_y) {
347
347
drm_property_destroy(plane->dev, prop_x);
348
-
return PTR_ERR(prop_y);
348
+
return -ENOMEM;
349
349
}
350
350
351
351
drm_object_attach_property(&plane->base, prop_x, 0);
+25
drivers/gpu/drm/mgag200/mgag200_mode.c
+25
drivers/gpu/drm/mgag200/mgag200_mode.c
···
161
161
WREG_ECRT(0x00, crtcext0);
162
162
}
163
163
164
+
/*
165
+
* Set the opmode for the hardware swapper for Big-Endian processor
166
+
* support for the frame buffer aperture and DMAWIN space.
167
+
*/
168
+
static void mgag200_set_datasiz(struct mga_device *mdev, u32 format)
169
+
{
170
+
#if defined(__BIG_ENDIAN)
171
+
u32 opmode = RREG32(MGAREG_OPMODE);
172
+
173
+
opmode &= ~(GENMASK(17, 16) | GENMASK(9, 8) | GENMASK(3, 2));
174
+
175
+
/* Big-endian byte-swapping */
176
+
switch (format) {
177
+
case DRM_FORMAT_RGB565:
178
+
opmode |= 0x10100;
179
+
break;
180
+
case DRM_FORMAT_XRGB8888:
181
+
opmode |= 0x20200;
182
+
break;
183
+
}
184
+
WREG32(MGAREG_OPMODE, opmode);
185
+
#endif
186
+
}
187
+
164
188
void mgag200_init_registers(struct mga_device *mdev)
165
189
{
166
190
u8 crtc11, misc;
···
520
496
struct drm_atomic_helper_damage_iter iter;
521
497
struct drm_rect damage;
522
498
499
+
mgag200_set_datasiz(mdev, fb->format->format);
523
500
drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state);
524
501
drm_atomic_for_each_plane_damage(&iter, &damage) {
525
502
mgag200_handle_damage(mdev, shadow_plane_state->data, fb, &damage);
-20
drivers/gpu/drm/nouveau/dispnv04/nouveau_i2c_encoder.c
-20
drivers/gpu/drm/nouveau/dispnv04/nouveau_i2c_encoder.c
···
94
94
return err;
95
95
}
96
96
97
-
/**
98
-
* nouveau_i2c_encoder_destroy - Unregister the I2C device backing an encoder
99
-
* @drm_encoder: Encoder to be unregistered.
100
-
*
101
-
* This should be called from the @destroy method of an I2C slave
102
-
* encoder driver once I2C access is no longer needed.
103
-
*/
104
-
void nouveau_i2c_encoder_destroy(struct drm_encoder *drm_encoder)
105
-
{
106
-
struct nouveau_i2c_encoder *encoder = to_encoder_i2c(drm_encoder);
107
-
struct i2c_client *client = nouveau_i2c_encoder_get_client(drm_encoder);
108
-
struct module *module = client->dev.driver->owner;
109
-
110
-
i2c_unregister_device(client);
111
-
encoder->i2c_client = NULL;
112
-
113
-
module_put(module);
114
-
}
115
-
EXPORT_SYMBOL(nouveau_i2c_encoder_destroy);
116
-
117
97
/*
118
98
* Wrapper fxns which can be plugged in to drm_encoder_helper_funcs:
119
99
*/
+18
-1
drivers/gpu/drm/nouveau/include/dispnv04/i2c/encoder_i2c.h
+18
-1
drivers/gpu/drm/nouveau/include/dispnv04/i2c/encoder_i2c.h
···
202
202
return to_encoder_i2c(encoder)->i2c_client;
203
203
}
204
204
205
-
void nouveau_i2c_encoder_destroy(struct drm_encoder *encoder);
205
+
/**
206
+
* nouveau_i2c_encoder_destroy - Unregister the I2C device backing an encoder
207
+
* @drm_encoder: Encoder to be unregistered.
208
+
*
209
+
* This should be called from the @destroy method of an I2C slave
210
+
* encoder driver once I2C access is no longer needed.
211
+
*/
212
+
static __always_inline void nouveau_i2c_encoder_destroy(struct drm_encoder *drm_encoder)
213
+
{
214
+
struct nouveau_i2c_encoder *encoder = to_encoder_i2c(drm_encoder);
215
+
struct i2c_client *client = nouveau_i2c_encoder_get_client(drm_encoder);
216
+
struct module *module = client->dev.driver->owner;
217
+
218
+
i2c_unregister_device(client);
219
+
encoder->i2c_client = NULL;
220
+
221
+
module_put(module);
222
+
}
206
223
207
224
/*
208
225
* Wrapper fxns which can be plugged in to drm_encoder_helper_funcs:
+4
drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h
+4
drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h
+3
-3
drivers/gpu/drm/nouveau/nouveau_fence.c
+3
-3
drivers/gpu/drm/nouveau/nouveau_fence.c
···
183
183
fctx->context = drm->runl[chan->runlist].context_base + chan->chid;
184
184
185
185
if (chan == drm->cechan)
186
-
strcpy(fctx->name, "copy engine channel");
186
+
strscpy(fctx->name, "copy engine channel");
187
187
else if (chan == drm->channel)
188
-
strcpy(fctx->name, "generic kernel channel");
188
+
strscpy(fctx->name, "generic kernel channel");
189
189
else
190
-
strcpy(fctx->name, cli->name);
190
+
strscpy(fctx->name, cli->name);
191
191
192
192
kref_init(&fctx->fence_ref);
193
193
if (!priv->uevent)
+2
-2
drivers/gpu/drm/nouveau/nouveau_hwmon.c
+2
-2
drivers/gpu/drm/nouveau/nouveau_hwmon.c
···
125
125
if (ret < 0)
126
126
return ret;
127
127
128
-
return sprintf(buf, "%i\n", ret);
128
+
return sysfs_emit(buf, "%i\n", ret);
129
129
}
130
130
131
131
static ssize_t
···
141
141
if (ret < 0)
142
142
return ret;
143
143
144
-
return sprintf(buf, "%i\n", ret);
144
+
return sysfs_emit(buf, "%i\n", ret);
145
145
}
146
146
147
147
static ssize_t
+42
-19
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/fwsec.c
+42
-19
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/fwsec.c
···
259
259
}
260
260
261
261
static int
262
-
nvkm_gsp_fwsec(struct nvkm_gsp *gsp, const char *name, u32 init_cmd)
262
+
nvkm_gsp_fwsec_init(struct nvkm_gsp *gsp, struct nvkm_falcon_fw *fw, const char *name, u32 init_cmd)
263
263
{
264
264
struct nvkm_subdev *subdev = &gsp->subdev;
265
265
struct nvkm_device *device = subdev->device;
266
266
struct nvkm_bios *bios = device->bios;
267
267
const union nvfw_falcon_ucode_desc *desc;
268
268
struct nvbios_pmuE flcn_ucode;
269
-
u8 idx, ver, hdr;
270
269
u32 data;
271
270
u16 size, vers;
272
-
struct nvkm_falcon_fw fw = {};
273
-
u32 mbox0 = 0;
271
+
u8 idx, ver, hdr;
274
272
int ret;
275
273
276
274
/* Lookup in VBIOS. */
···
289
291
vers = (desc->v2.Hdr & 0x0000ff00) >> 8;
290
292
291
293
switch (vers) {
292
-
case 2: ret = nvkm_gsp_fwsec_v2(gsp, name, &desc->v2, size, init_cmd, &fw); break;
293
-
case 3: ret = nvkm_gsp_fwsec_v3(gsp, name, &desc->v3, size, init_cmd, &fw); break;
294
+
case 2: ret = nvkm_gsp_fwsec_v2(gsp, name, &desc->v2, size, init_cmd, fw); break;
295
+
case 3: ret = nvkm_gsp_fwsec_v3(gsp, name, &desc->v3, size, init_cmd, fw); break;
294
296
default:
295
297
nvkm_error(subdev, "%s(v%d): version unknown\n", name, vers);
296
298
return -EINVAL;
···
301
303
return ret;
302
304
}
303
305
304
-
/* Boot. */
305
-
ret = nvkm_falcon_fw_boot(&fw, subdev, true, &mbox0, NULL, 0, 0);
306
-
nvkm_falcon_fw_dtor(&fw);
307
-
if (ret)
308
-
return ret;
309
-
310
306
return 0;
307
+
}
308
+
309
+
static int
310
+
nvkm_gsp_fwsec_boot(struct nvkm_gsp *gsp, struct nvkm_falcon_fw *fw)
311
+
{
312
+
struct nvkm_subdev *subdev = &gsp->subdev;
313
+
u32 mbox0 = 0;
314
+
315
+
/* Boot */
316
+
return nvkm_falcon_fw_boot(fw, subdev, true, &mbox0, NULL, 0, 0);
311
317
}
312
318
313
319
int
···
322
320
int ret;
323
321
u32 err;
324
322
325
-
ret = nvkm_gsp_fwsec(gsp, "fwsec-sb", NVFW_FALCON_APPIF_DMEMMAPPER_CMD_SB);
323
+
ret = nvkm_gsp_fwsec_boot(gsp, &gsp->fws.falcon.sb);
326
324
if (ret)
327
325
return ret;
328
326
···
337
335
}
338
336
339
337
int
338
+
nvkm_gsp_fwsec_sb_ctor(struct nvkm_gsp *gsp)
339
+
{
340
+
return nvkm_gsp_fwsec_init(gsp, &gsp->fws.falcon.sb, "fwsec-sb",
341
+
NVFW_FALCON_APPIF_DMEMMAPPER_CMD_SB);
342
+
}
343
+
344
+
void
345
+
nvkm_gsp_fwsec_sb_dtor(struct nvkm_gsp *gsp)
346
+
{
347
+
nvkm_falcon_fw_dtor(&gsp->fws.falcon.sb);
348
+
}
349
+
350
+
int
340
351
nvkm_gsp_fwsec_frts(struct nvkm_gsp *gsp)
341
352
{
342
353
struct nvkm_subdev *subdev = &gsp->subdev;
343
354
struct nvkm_device *device = subdev->device;
355
+
struct nvkm_falcon_fw fw = {};
344
356
int ret;
345
357
u32 err, wpr2_lo, wpr2_hi;
346
358
347
-
ret = nvkm_gsp_fwsec(gsp, "fwsec-frts", NVFW_FALCON_APPIF_DMEMMAPPER_CMD_FRTS);
359
+
ret = nvkm_gsp_fwsec_init(gsp, &fw, "fwsec-frts", NVFW_FALCON_APPIF_DMEMMAPPER_CMD_FRTS);
348
360
if (ret)
349
361
return ret;
362
+
363
+
ret = nvkm_gsp_fwsec_boot(gsp, &fw);
364
+
if (ret)
365
+
goto fwsec_dtor;
350
366
351
367
/* Verify. */
352
368
err = nvkm_rd32(device, 0x001400 + (0xe * 4)) >> 16;
353
369
if (err) {
354
370
nvkm_error(subdev, "fwsec-frts: 0x%04x\n", err);
355
-
return -EIO;
371
+
ret = -EIO;
372
+
} else {
373
+
wpr2_lo = nvkm_rd32(device, 0x1fa824);
374
+
wpr2_hi = nvkm_rd32(device, 0x1fa828);
375
+
nvkm_debug(subdev, "fwsec-frts: WPR2 @ %08x - %08x\n", wpr2_lo, wpr2_hi);
356
376
}
357
377
358
-
wpr2_lo = nvkm_rd32(device, 0x1fa824);
359
-
wpr2_hi = nvkm_rd32(device, 0x1fa828);
360
-
nvkm_debug(subdev, "fwsec-frts: WPR2 @ %08x - %08x\n", wpr2_lo, wpr2_hi);
361
-
return 0;
378
+
fwsec_dtor:
379
+
nvkm_falcon_fw_dtor(&fw);
380
+
return ret;
362
381
}
+3
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h
+3
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h
+9
-1
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c
+9
-1
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c
···
1817
1817
RM_RISCV_UCODE_DESC *desc;
1818
1818
int ret;
1819
1819
1820
+
ret = nvkm_gsp_fwsec_sb_ctor(gsp);
1821
+
if (ret)
1822
+
return ret;
1823
+
1820
1824
hdr = nvfw_bin_hdr(&gsp->subdev, fw->data);
1821
1825
desc = (void *)fw->data + hdr->header_offset;
1822
1826
1823
1827
ret = nvkm_gsp_mem_ctor(gsp, hdr->data_size, &gsp->boot.fw);
1824
1828
if (ret)
1825
-
return ret;
1829
+
goto dtor_fwsec;
1826
1830
1827
1831
memcpy(gsp->boot.fw.data, fw->data + hdr->data_offset, hdr->data_size);
1828
1832
···
1835
1831
gsp->boot.manifest_offset = desc->manifestOffset;
1836
1832
gsp->boot.app_version = desc->appVersion;
1837
1833
return 0;
1834
+
dtor_fwsec:
1835
+
nvkm_gsp_fwsec_sb_dtor(gsp);
1836
+
return ret;
1838
1837
}
1839
1838
1840
1839
static const struct nvkm_firmware_func
···
2108
2101
mutex_destroy(&gsp->cmdq.mutex);
2109
2102
2110
2103
nvkm_gsp_dtor_fws(gsp);
2104
+
nvkm_gsp_fwsec_sb_dtor(gsp);
2111
2105
2112
2106
nvkm_gsp_mem_dtor(&gsp->rmargs);
2113
2107
nvkm_gsp_mem_dtor(&gsp->wpr_meta);
+4
-4
drivers/gpu/drm/panel/panel-novatek-nt35560.c
+4
-4
drivers/gpu/drm/panel/panel-novatek-nt35560.c
···
213
213
214
214
static void nt35560_read_id(struct mipi_dsi_multi_context *dsi_ctx)
215
215
{
216
-
struct device dev = dsi_ctx->dsi->dev;
216
+
struct device *dev = &dsi_ctx->dsi->dev;
217
217
u8 vendor, version, panel;
218
218
u16 val;
219
219
···
225
225
return;
226
226
227
227
if (vendor == 0x00) {
228
-
dev_err(&dev, "device vendor ID is zero\n");
228
+
dev_err(dev, "device vendor ID is zero\n");
229
229
dsi_ctx->accum_err = -ENODEV;
230
230
return;
231
231
}
···
236
236
case DISPLAY_SONY_ACX424AKP_ID2:
237
237
case DISPLAY_SONY_ACX424AKP_ID3:
238
238
case DISPLAY_SONY_ACX424AKP_ID4:
239
-
dev_info(&dev,
239
+
dev_info(dev,
240
240
"MTP vendor: %02x, version: %02x, panel: %02x\n",
241
241
vendor, version, panel);
242
242
break;
243
243
default:
244
-
dev_info(&dev,
244
+
dev_info(dev,
245
245
"unknown vendor: %02x, version: %02x, panel: %02x\n",
246
246
vendor, version, panel);
247
247
break;
+1
-1
drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+1
-1
drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+35
-18
drivers/gpu/drm/tilcdc/tilcdc_drv.c
+35
-18
drivers/gpu/drm/tilcdc/tilcdc_drv.c
···
172
172
if (priv->crtc)
173
173
tilcdc_crtc_shutdown(priv->crtc);
174
174
175
-
if (priv->is_registered)
176
-
drm_dev_unregister(dev);
175
+
drm_dev_unregister(dev);
177
176
178
177
drm_kms_helper_poll_fini(dev);
179
178
drm_atomic_helper_shutdown(dev);
···
219
220
priv->wq = alloc_ordered_workqueue("tilcdc", 0);
220
221
if (!priv->wq) {
221
222
ret = -ENOMEM;
222
-
goto init_failed;
223
+
goto put_drm;
223
224
}
224
225
225
226
priv->mmio = devm_platform_ioremap_resource(pdev, 0);
226
227
if (IS_ERR(priv->mmio)) {
227
228
dev_err(dev, "failed to request / ioremap\n");
228
229
ret = PTR_ERR(priv->mmio);
229
-
goto init_failed;
230
+
goto free_wq;
230
231
}
231
232
232
233
priv->clk = clk_get(dev, "fck");
233
234
if (IS_ERR(priv->clk)) {
234
235
dev_err(dev, "failed to get functional clock\n");
235
236
ret = -ENODEV;
236
-
goto init_failed;
237
+
goto free_wq;
237
238
}
238
239
239
240
pm_runtime_enable(dev);
···
312
313
ret = tilcdc_crtc_create(ddev);
313
314
if (ret < 0) {
314
315
dev_err(dev, "failed to create crtc\n");
315
-
goto init_failed;
316
+
goto disable_pm;
316
317
}
317
318
modeset_init(ddev);
318
319
···
323
324
if (ret) {
324
325
dev_err(dev, "failed to register cpufreq notifier\n");
325
326
priv->freq_transition.notifier_call = NULL;
326
-
goto init_failed;
327
+
goto destroy_crtc;
327
328
}
328
329
#endif
329
330
330
331
if (priv->is_componentized) {
331
332
ret = component_bind_all(dev, ddev);
332
333
if (ret < 0)
333
-
goto init_failed;
334
+
goto unregister_cpufreq_notif;
334
335
335
336
ret = tilcdc_add_component_encoder(ddev);
336
337
if (ret < 0)
337
-
goto init_failed;
338
+
goto unbind_component;
338
339
} else {
339
340
ret = tilcdc_attach_external_device(ddev);
340
341
if (ret)
341
-
goto init_failed;
342
+
goto unregister_cpufreq_notif;
342
343
}
343
344
344
345
if (!priv->external_connector &&
345
346
((priv->num_encoders == 0) || (priv->num_connectors == 0))) {
346
347
dev_err(dev, "no encoders/connectors found\n");
347
348
ret = -EPROBE_DEFER;
348
-
goto init_failed;
349
+
goto unbind_component;
349
350
}
350
351
351
352
ret = drm_vblank_init(ddev, 1);
352
353
if (ret < 0) {
353
354
dev_err(dev, "failed to initialize vblank\n");
354
-
goto init_failed;
355
+
goto unbind_component;
355
356
}
356
357
357
358
ret = platform_get_irq(pdev, 0);
358
359
if (ret < 0)
359
-
goto init_failed;
360
+
goto unbind_component;
360
361
priv->irq = ret;
361
362
362
363
ret = tilcdc_irq_install(ddev, priv->irq);
363
364
if (ret < 0) {
364
365
dev_err(dev, "failed to install IRQ handler\n");
365
-
goto init_failed;
366
+
goto unbind_component;
366
367
}
367
368
368
369
drm_mode_config_reset(ddev);
···
371
372
372
373
ret = drm_dev_register(ddev, 0);
373
374
if (ret)
374
-
goto init_failed;
375
-
priv->is_registered = true;
375
+
goto stop_poll;
376
376
377
377
drm_client_setup_with_color_mode(ddev, bpp);
378
378
379
379
return 0;
380
380
381
-
init_failed:
382
-
tilcdc_fini(ddev);
381
+
stop_poll:
382
+
drm_kms_helper_poll_fini(ddev);
383
+
tilcdc_irq_uninstall(ddev);
384
+
unbind_component:
385
+
if (priv->is_componentized)
386
+
component_unbind_all(dev, ddev);
387
+
unregister_cpufreq_notif:
388
+
#ifdef CONFIG_CPU_FREQ
389
+
cpufreq_unregister_notifier(&priv->freq_transition,
390
+
CPUFREQ_TRANSITION_NOTIFIER);
391
+
destroy_crtc:
392
+
#endif
393
+
tilcdc_crtc_destroy(priv->crtc);
394
+
disable_pm:
395
+
pm_runtime_disable(dev);
396
+
clk_put(priv->clk);
397
+
free_wq:
398
+
destroy_workqueue(priv->wq);
399
+
put_drm:
383
400
platform_set_drvdata(pdev, NULL);
401
+
ddev->dev_private = NULL;
402
+
drm_dev_put(ddev);
384
403
385
404
return ret;
386
405
}
+1
-1
drivers/gpu/drm/tilcdc/tilcdc_drv.h
+1
-1
drivers/gpu/drm/tilcdc/tilcdc_drv.h
···
82
82
struct drm_encoder *external_encoder;
83
83
struct drm_connector *external_connector;
84
84
85
-
bool is_registered;
86
85
bool is_componentized;
87
86
bool irq_enabled;
88
87
};
···
163
164
void tilcdc_crtc_set_simulate_vesa_sync(struct drm_crtc *crtc,
164
165
bool simulate_vesa_sync);
165
166
void tilcdc_crtc_shutdown(struct drm_crtc *crtc);
167
+
void tilcdc_crtc_destroy(struct drm_crtc *crtc);
166
168
int tilcdc_crtc_update_fb(struct drm_crtc *crtc,
167
169
struct drm_framebuffer *fb,
168
170
struct drm_pending_vblank_event *event);
+6
drivers/gpu/drm/ttm/ttm_bo_vm.c
+6
drivers/gpu/drm/ttm/ttm_bo_vm.c
···
434
434
if (ret)
435
435
return ret;
436
436
437
+
if (!bo->resource) {
438
+
ret = -ENODATA;
439
+
goto unlock;
440
+
}
441
+
437
442
switch (bo->resource->mem_type) {
438
443
case TTM_PL_SYSTEM:
439
444
fallthrough;
···
453
448
ret = -EIO;
454
449
}
455
450
451
+
unlock:
456
452
ttm_bo_unreserve(bo);
457
453
458
454
return ret;