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Merge master.kernel.org:/home/rmk/linux-2.6-serial

* master.kernel.org:/home/rmk/linux-2.6-serial:
[SERIAL] typo: buad -> baud

+10 -10
+1 -1
arch/mips/ddb5xxx/ddb5476/dbg_io.c
··· 86 86 /* disable interrupts */ 87 87 UART16550_WRITE(OFS_INTR_ENABLE, 0); 88 88 89 - /* set up buad rate */ 89 + /* set up baud rate */ 90 90 { 91 91 uint32 divisor; 92 92
+1 -1
arch/mips/ddb5xxx/ddb5477/kgdb_io.c
··· 86 86 /* disable interrupts */ 87 87 UART16550_WRITE(OFS_INTR_ENABLE, 0); 88 88 89 - /* set up buad rate */ 89 + /* set up baud rate */ 90 90 { 91 91 uint32 divisor; 92 92
+1 -1
arch/mips/gt64120/ev64120/serialGT.c
··· 149 149 #else 150 150 /* 151 151 * Note: Set baud rate, hardcoded here for rate of 115200 152 - * since became unsure of above "buad rate" algorithm (??). 152 + * since became unsure of above "baud rate" algorithm (??). 153 153 */ 154 154 outreg(channel, LCR, 0x83); 155 155 outreg(channel, DLM, 0x00); // See note above
+1 -1
arch/mips/gt64120/momenco_ocelot/dbg_io.c
··· 73 73 /* disable interrupts */ 74 74 UART16550_WRITE(OFS_INTR_ENABLE, 0); 75 75 76 - /* set up buad rate */ 76 + /* set up baud rate */ 77 77 { 78 78 uint32 divisor; 79 79
+1 -1
arch/mips/ite-boards/generic/dbg_io.c
··· 72 72 /* disable interrupts */ 73 73 UART16550_WRITE(OFS_INTR_ENABLE, 0); 74 74 75 - /* set up buad rate */ 75 + /* set up baud rate */ 76 76 { 77 77 uint32 divisor; 78 78
+1 -1
arch/mips/momentum/jaguar_atx/dbg_io.c
··· 73 73 /* disable interrupts */ 74 74 UART16550_WRITE(OFS_INTR_ENABLE, 0); 75 75 76 - /* set up buad rate */ 76 + /* set up baud rate */ 77 77 { 78 78 uint32 divisor; 79 79
+1 -1
arch/mips/momentum/ocelot_c/dbg_io.c
··· 73 73 /* disable interrupts */ 74 74 UART16550_WRITE(OFS_INTR_ENABLE, 0); 75 75 76 - /* set up buad rate */ 76 + /* set up baud rate */ 77 77 { 78 78 uint32 divisor; 79 79
+1 -1
arch/mips/momentum/ocelot_g/dbg_io.c
··· 73 73 /* disable interrupts */ 74 74 UART16550_WRITE(OFS_INTR_ENABLE, 0); 75 75 76 - /* set up buad rate */ 76 + /* set up baud rate */ 77 77 { 78 78 uint32 divisor; 79 79
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include/asm-arm/arch-l7200/serial_l7200.h
··· 28 28 #define UARTDR 0x00 /* Tx/Rx data */ 29 29 #define RXSTAT 0x04 /* Rx status */ 30 30 #define H_UBRLCR 0x08 /* mode register high */ 31 - #define M_UBRLCR 0x0C /* mode reg mid (MSB of buad)*/ 31 + #define M_UBRLCR 0x0C /* mode reg mid (MSB of baud)*/ 32 32 #define L_UBRLCR 0x10 /* mode reg low (LSB of baud)*/ 33 33 #define UARTCON 0x14 /* control register */ 34 34 #define UARTFLG 0x18 /* flag register */
+1 -1
include/asm-arm/arch-l7200/uncompress.h
··· 6 6 * Changelog: 7 7 * 05-01-2000 SJH Created 8 8 * 05-13-2000 SJH Filled in function bodies 9 - * 07-26-2000 SJH Removed hard coded buad rate 9 + * 07-26-2000 SJH Removed hard coded baud rate 10 10 */ 11 11 12 12 #include <asm/hardware.h>