Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
riscv: Add xmipsexectl as a vendor extension
Add support for MIPS vendor extensions. Add support for the xmipsexectl
vendor extension.
Signed-off-by: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250724-p8700-pause-v5-2-a6cbbe1c3412@htecgroup.com
[pjw@kernel.org: added the MIPS vendor ID from another patch to fix the build]
Signed-off-by: Paul Walmsley <pjw@kernel.org>
authored by
Aleksa Paunovic
and committed by
Paul Walmsley
a8fed1bc
f79671dc
+65
+13
arch/riscv/Kconfig.vendor
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arch/riscv/Kconfig.vendor
···
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If you don't know what to do here, say Y.
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endmenu
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menu "MIPS"
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config RISCV_ISA_VENDOR_EXT_MIPS
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bool "MIPS vendor extension support"
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select RISCV_ISA_VENDOR_EXT
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default y
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help
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Say N here to disable detection of and support for all MIPS vendor
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extensions. Without this option enabled, MIPS vendor extensions will
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not be detected at boot and their presence not reported to userspace.
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If you don't know what to do here, say Y.
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endmenu
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menu "SiFive"
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config RISCV_ISA_VENDOR_EXT_SIFIVE
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bool "SiFive vendor extension support"
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arch/riscv/include/asm/vendor_extensions/mips.h
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arch/riscv/include/asm/vendor_extensions/mips.h
···
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2025 MIPS.
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*/
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#ifndef _ASM_RISCV_VENDOR_EXTENSIONS_MIPS_H
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#define _ASM_RISCV_VENDOR_EXTENSIONS_MIPS_H
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#include <linux/types.h>
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#define RISCV_ISA_VENDOR_EXT_XMIPSEXECTL 0
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#ifndef __ASSEMBLER__
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struct riscv_isa_vendor_ext_data_list;
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extern struct riscv_isa_vendor_ext_data_list riscv_isa_vendor_ext_list_mips;
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#endif
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#endif // _ASM_RISCV_VENDOR_EXTENSIONS_MIPS_H
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arch/riscv/include/asm/vendorid_list.h
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arch/riscv/include/asm/vendorid_list.h
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arch/riscv/kernel/vendor_extensions.c
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arch/riscv/kernel/vendor_extensions.c
···
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#include <asm/vendorid_list.h>
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#include <asm/vendor_extensions.h>
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#include <asm/vendor_extensions/andes.h>
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#include <asm/vendor_extensions/mips.h>
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#include <asm/vendor_extensions/sifive.h>
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#include <asm/vendor_extensions/thead.h>
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···
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struct riscv_isa_vendor_ext_data_list *riscv_isa_vendor_ext_list[] = {
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#ifdef CONFIG_RISCV_ISA_VENDOR_EXT_ANDES
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&riscv_isa_vendor_ext_list_andes,
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#endif
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#ifdef CONFIG_RISCV_ISA_VENDOR_EXT_MIPS
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&riscv_isa_vendor_ext_list_mips,
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#endif
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#ifdef CONFIG_RISCV_ISA_VENDOR_EXT_SIFIVE
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&riscv_isa_vendor_ext_list_sifive,
···
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case ANDES_VENDOR_ID:
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bmap = &riscv_isa_vendor_ext_list_andes.all_harts_isa_bitmap;
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cpu_bmap = riscv_isa_vendor_ext_list_andes.per_hart_isa_bitmap;
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break;
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#endif
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#ifdef CONFIG_RISCV_ISA_VENDOR_EXT_MIPS
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case MIPS_VENDOR_ID:
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bmap = &riscv_isa_vendor_ext_list_mips.all_harts_isa_bitmap;
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cpu_bmap = riscv_isa_vendor_ext_list_mips.per_hart_isa_bitmap;
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break;
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#endif
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#ifdef CONFIG_RISCV_ISA_VENDOR_EXT_SIFIVE
+1
arch/riscv/kernel/vendor_extensions/Makefile
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arch/riscv/kernel/vendor_extensions/Makefile
···
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# SPDX-License-Identifier: GPL-2.0-only
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obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_ANDES) += andes.o
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obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_MIPS) += mips.o
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obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_SIFIVE) += sifive.o
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obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_SIFIVE) += sifive_hwprobe.o
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obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_THEAD) += thead.o
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arch/riscv/kernel/vendor_extensions/mips.c
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arch/riscv/kernel/vendor_extensions/mips.c
···
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2025 MIPS.
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*/
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#include <asm/cpufeature.h>
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#include <asm/vendor_extensions.h>
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#include <asm/vendor_extensions/mips.h>
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#include <linux/array_size.h>
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#include <linux/cpumask.h>
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#include <linux/types.h>
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/* All MIPS vendor extensions supported in Linux */
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static const struct riscv_isa_ext_data riscv_isa_vendor_ext_mips[] = {
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__RISCV_ISA_EXT_DATA(xmipsexectl, RISCV_ISA_VENDOR_EXT_XMIPSEXECTL),
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};
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struct riscv_isa_vendor_ext_data_list riscv_isa_vendor_ext_list_mips = {
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.ext_data_count = ARRAY_SIZE(riscv_isa_vendor_ext_mips),
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.ext_data = riscv_isa_vendor_ext_mips,
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};