Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge tag 'soc-arm-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC ARM platform updates from Arnd Bergmann:
"Most of these updates are for removing dead code on the Samsung S3C,
NXP i.MX, TI OMAP and TI DaVinci platforms, though this appears to be
a coincidence.

There are also cleanups for the Marvell Orion family and the Arm
integrator series and a Kconfig change for Broadcom"

* tag 'soc-arm-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: dove: Drop a write-only variable
ARM: orion5x: Switch to new sys-off handler API
ARM: mvebu: Warn about memory chunks too small for DDR training
ARM: imx: Annotate imx7d_enet_init() as __init
ARM: OMAP1: Remove unused declarations in arch/arm/mach-omap1/pm.h
ARM: s3c: remove unused s3c2410_cpu_suspend() declaration
ARM: s3c: remove unused declarations for s3c6400
ARM: s3c: Remove unused s3c_init_uart_irqs() declaration
ARM: davinci: remove unused cpuidle code
ARM: davinci: remove unused davinci_init_ide() declaration
ARM: davinci: remove unused davinci_cfg_reg_list() declaration
ARM: mach-imx: imx6sx: Remove Ethernet refclock setting
MAINTAINERS: Add entry for Samsung Exynos850 SoC
ARM: bcm: Select ARM_GIC_V3 for ARCH_BRCMSTB
ARM: omap2: Switch to use kmemdup_array()
ARM: omap1: Remove unused struct 'dma_link_info'
ARM: s3c: Drop explicit initialization of struct i2c_device_id::driver_data to 0

+29 -191
+10
MAINTAINERS
··· 20243 20243 F: Documentation/devicetree/bindings/sound/samsung* 20244 20244 F: sound/soc/samsung/ 20245 20245 20246 + SAMSUNG EXYNOS850 SoC SUPPORT 20247 + M: Sam Protsenko <semen.protsenko@linaro.org> 20248 + L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 20249 + L: linux-samsung-soc@vger.kernel.org 20250 + S: Maintained 20251 + F: Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml 20252 + F: arch/arm64/boot/dts/exynos/exynos850* 20253 + F: drivers/clk/samsung/clk-exynos850.c 20254 + F: include/dt-bindings/clock/exynos850.h 20255 + 20246 20256 SAMSUNG EXYNOS PSEUDO RANDOM NUMBER GENERATOR (RNG) DRIVER 20247 20257 M: Krzysztof Kozlowski <krzk@kernel.org> 20248 20258 L: linux-crypto@vger.kernel.org
+1
arch/arm/mach-bcm/Kconfig
··· 185 185 select ARCH_HAS_RESET_CONTROLLER 186 186 select ARM_AMBA 187 187 select ARM_GIC 188 + select ARM_GIC_V3 188 189 select ARM_ERRATA_798181 if SMP 189 190 select HAVE_ARM_ARCH_TIMER 190 191 select ZONE_DMA if ARM_LPAE
-1
arch/arm/mach-davinci/Makefile
··· 16 16 obj-y += da8xx-dt.o 17 17 18 18 # Power Management 19 - obj-$(CONFIG_CPU_IDLE) += cpuidle.o 20 19 obj-$(CONFIG_HAVE_CLK) += pm_domain.o 21 20 ifeq ($(CONFIG_SUSPEND),y) 22 21 obj-$(CONFIG_ARCH_DAVINCI_DA850) += pm.o sleep.o
-1
arch/arm/mach-davinci/common.h
··· 52 52 extern struct davinci_soc_info davinci_soc_info; 53 53 54 54 extern void davinci_common_init(const struct davinci_soc_info *soc_info); 55 - extern void davinci_init_ide(void); 56 55 void davinci_init_late(void); 57 56 58 57 #ifdef CONFIG_SUSPEND
-99
arch/arm/mach-davinci/cpuidle.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * CPU idle for DaVinci SoCs 4 - * 5 - * Copyright (C) 2009 Texas Instruments Incorporated. https://www.ti.com/ 6 - * 7 - * Derived from Marvell Kirkwood CPU idle code 8 - * (arch/arm/mach-kirkwood/cpuidle.c) 9 - */ 10 - 11 - #include <linux/kernel.h> 12 - #include <linux/init.h> 13 - #include <linux/platform_device.h> 14 - #include <linux/cpuidle.h> 15 - #include <linux/io.h> 16 - #include <linux/export.h> 17 - #include <asm/cpuidle.h> 18 - 19 - #include "cpuidle.h" 20 - #include "ddr2.h" 21 - 22 - #define DAVINCI_CPUIDLE_MAX_STATES 2 23 - 24 - static void __iomem *ddr2_reg_base; 25 - static bool ddr2_pdown; 26 - 27 - static void davinci_save_ddr_power(int enter, bool pdown) 28 - { 29 - u32 val; 30 - 31 - val = __raw_readl(ddr2_reg_base + DDR2_SDRCR_OFFSET); 32 - 33 - if (enter) { 34 - if (pdown) 35 - val |= DDR2_SRPD_BIT; 36 - else 37 - val &= ~DDR2_SRPD_BIT; 38 - val |= DDR2_LPMODEN_BIT; 39 - } else { 40 - val &= ~(DDR2_SRPD_BIT | DDR2_LPMODEN_BIT); 41 - } 42 - 43 - __raw_writel(val, ddr2_reg_base + DDR2_SDRCR_OFFSET); 44 - } 45 - 46 - /* Actual code that puts the SoC in different idle states */ 47 - static __cpuidle int davinci_enter_idle(struct cpuidle_device *dev, 48 - struct cpuidle_driver *drv, int index) 49 - { 50 - davinci_save_ddr_power(1, ddr2_pdown); 51 - cpu_do_idle(); 52 - davinci_save_ddr_power(0, ddr2_pdown); 53 - 54 - return index; 55 - } 56 - 57 - static struct cpuidle_driver davinci_idle_driver = { 58 - .name = "cpuidle-davinci", 59 - .owner = THIS_MODULE, 60 - .states[0] = ARM_CPUIDLE_WFI_STATE, 61 - .states[1] = { 62 - .enter = davinci_enter_idle, 63 - .exit_latency = 10, 64 - .target_residency = 10000, 65 - .name = "DDR SR", 66 - .desc = "WFI and DDR Self Refresh", 67 - }, 68 - .state_count = DAVINCI_CPUIDLE_MAX_STATES, 69 - }; 70 - 71 - static int __init davinci_cpuidle_probe(struct platform_device *pdev) 72 - { 73 - struct davinci_cpuidle_config *pdata = pdev->dev.platform_data; 74 - 75 - if (!pdata) { 76 - dev_err(&pdev->dev, "cannot get platform data\n"); 77 - return -ENOENT; 78 - } 79 - 80 - ddr2_reg_base = pdata->ddr2_ctlr_base; 81 - 82 - ddr2_pdown = pdata->ddr2_pdown; 83 - 84 - return cpuidle_register(&davinci_idle_driver, NULL); 85 - } 86 - 87 - static struct platform_driver davinci_cpuidle_driver = { 88 - .driver = { 89 - .name = "cpuidle-davinci", 90 - }, 91 - }; 92 - 93 - static int __init davinci_cpuidle_init(void) 94 - { 95 - return platform_driver_probe(&davinci_cpuidle_driver, 96 - davinci_cpuidle_probe); 97 - } 98 - device_initcall(davinci_cpuidle_init); 99 -
-15
arch/arm/mach-davinci/cpuidle.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * TI DaVinci cpuidle platform support 4 - * 5 - * 2009 (C) Texas Instruments, Inc. https://www.ti.com/ 6 - */ 7 - #ifndef _MACH_DAVINCI_CPUIDLE_H 8 - #define _MACH_DAVINCI_CPUIDLE_H 9 - 10 - struct davinci_cpuidle_config { 11 - u32 ddr2_pdown; 12 - void __iomem *ddr2_ctlr_base; 13 - }; 14 - 15 - #endif
-1
arch/arm/mach-davinci/devices-da8xx.c
··· 21 21 #include "common.h" 22 22 #include "cputype.h" 23 23 #include "da8xx.h" 24 - #include "cpuidle.h" 25 24 #include "irqs.h" 26 25 #include "sram.h" 27 26
-5
arch/arm/mach-davinci/mux.h
··· 654 654 #ifdef CONFIG_DAVINCI_MUX 655 655 /* setup pin muxing */ 656 656 extern int davinci_cfg_reg(unsigned long reg_cfg); 657 - extern int davinci_cfg_reg_list(const short pins[]); 658 657 #else 659 658 /* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */ 660 659 static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; } 661 - static inline int davinci_cfg_reg_list(const short pins[]) 662 - { 663 - return 0; 664 - } 665 660 #endif 666 661 667 662
+2 -2
arch/arm/mach-dove/common.c
··· 82 82 { 83 83 struct clk *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1; 84 84 struct clk *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma; 85 - struct clk *xor0, *xor1, *ge, *gephy; 85 + struct clk *xor0, *xor1, *ge; 86 86 87 87 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, 0, dove_tclk); 88 88 ··· 102 102 pdma = dove_register_gate("pdma", "tclk", CLOCK_GATING_BIT_PDMA); 103 103 xor0 = dove_register_gate("xor0", "tclk", CLOCK_GATING_BIT_XOR0); 104 104 xor1 = dove_register_gate("xor1", "tclk", CLOCK_GATING_BIT_XOR1); 105 - gephy = dove_register_gate("gephy", "tclk", CLOCK_GATING_BIT_GIGA_PHY); 105 + dove_register_gate("gephy", "tclk", CLOCK_GATING_BIT_GIGA_PHY); 106 106 ge = dove_register_gate("ge", "gephy", CLOCK_GATING_BIT_GBE); 107 107 108 108 orion_clkdev_add(NULL, "orion_spi.0", tclk);
-22
arch/arm/mach-imx/mach-imx6sx.c
··· 7 7 #include <linux/of_platform.h> 8 8 #include <linux/regmap.h> 9 9 #include <linux/mfd/syscon.h> 10 - #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> 11 10 #include <asm/mach/arch.h> 12 11 13 12 #include "common.h" 14 13 #include "cpuidle.h" 15 14 16 - static void __init imx6sx_enet_clk_sel(void) 17 - { 18 - struct regmap *gpr; 19 - 20 - gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr"); 21 - if (!IS_ERR(gpr)) { 22 - regmap_update_bits(gpr, IOMUXC_GPR1, 23 - IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_MASK, 0); 24 - regmap_update_bits(gpr, IOMUXC_GPR1, 25 - IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK, 0); 26 - } else { 27 - pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n"); 28 - } 29 - } 30 - 31 - static inline void imx6sx_enet_init(void) 32 - { 33 - imx6sx_enet_clk_sel(); 34 - } 35 - 36 15 static void __init imx6sx_init_machine(void) 37 16 { 38 17 of_platform_default_populate(NULL, NULL, NULL); 39 18 40 - imx6sx_enet_init(); 41 19 imx_anatop_init(); 42 20 imx6sx_pm_init(); 43 21 }
+1 -1
arch/arm/mach-imx/mach-imx7d.c
··· 48 48 } 49 49 } 50 50 51 - static inline void imx7d_enet_init(void) 51 + static void __init imx7d_enet_init(void) 52 52 { 53 53 imx7d_enet_phy_init(); 54 54 imx7d_enet_clk_sel();
+3
arch/arm/mach-mvebu/board-v7.c
··· 86 86 base = dt_mem_next_cell(dt_root_addr_cells, &reg); 87 87 size = dt_mem_next_cell(dt_root_size_cells, &reg); 88 88 89 + if (size < MVEBU_DDR_TRAINING_AREA_SZ) 90 + pr_warn("Too little memory to reserve for DDR training\n"); 91 + 89 92 memblock_reserve(base, MVEBU_DDR_TRAINING_AREA_SZ); 90 93 } 91 94
-13
arch/arm/mach-omap1/omap-dma.c
··· 59 59 static int enable_1510_mode; 60 60 static u32 errata; 61 61 62 - struct dma_link_info { 63 - int *linked_dmach_q; 64 - int no_of_lchs_linked; 65 - 66 - int q_count; 67 - int q_tail; 68 - int q_head; 69 - 70 - int chain_state; 71 - int chain_mode; 72 - 73 - }; 74 - 75 62 static int dma_lch_count; 76 63 static int dma_chan_count; 77 64 static int omap_dma_reserve_channels;
-4
arch/arm/mach-omap1/pm.h
··· 114 114 115 115 extern void omap1510_cpu_suspend(unsigned long, unsigned long); 116 116 extern void omap1610_cpu_suspend(unsigned long, unsigned long); 117 - extern void omap1510_idle_loop_suspend(void); 118 - extern void omap1610_idle_loop_suspend(void); 119 117 120 118 extern unsigned int omap1510_cpu_suspend_sz; 121 119 extern unsigned int omap1610_cpu_suspend_sz; 122 - extern unsigned int omap1510_idle_loop_suspend_sz; 123 - extern unsigned int omap1610_idle_loop_suspend_sz; 124 120 125 121 #ifdef CONFIG_OMAP_SERIAL_WAKE 126 122 extern void omap_serial_wake_trigger(int enable);
+1 -1
arch/arm/mach-omap2/omap_device.c
··· 315 315 316 316 od->hwmods_cnt = oh_cnt; 317 317 318 - hwmods = kmemdup(ohs, sizeof(struct omap_hwmod *) * oh_cnt, GFP_KERNEL); 318 + hwmods = kmemdup_array(ohs, oh_cnt, sizeof(*hwmods), GFP_KERNEL); 319 319 if (!hwmods) 320 320 goto oda_exit2; 321 321
+1 -1
arch/arm/mach-orion5x/board-mss2.c
··· 82 82 void __init mss2_init(void) 83 83 { 84 84 /* register mss2 specific power-off method */ 85 - pm_power_off = mss2_power_off; 85 + register_platform_power_off(mss2_power_off); 86 86 }
+3 -3
arch/arm/mach-orion5x/dns323-setup.c
··· 700 700 if (gpio_request(DNS323_GPIO_POWER_OFF, "POWEROFF") != 0 || 701 701 gpio_direction_output(DNS323_GPIO_POWER_OFF, 0) != 0) 702 702 pr_err("DNS-323: failed to setup power-off GPIO\n"); 703 - pm_power_off = dns323a_power_off; 703 + register_platform_power_off(dns323a_power_off); 704 704 break; 705 705 case DNS323_REV_B1: 706 706 /* 5182 built-in SATA init */ ··· 717 717 if (gpio_request(DNS323_GPIO_POWER_OFF, "POWEROFF") != 0 || 718 718 gpio_direction_output(DNS323_GPIO_POWER_OFF, 0) != 0) 719 719 pr_err("DNS-323: failed to setup power-off GPIO\n"); 720 - pm_power_off = dns323b_power_off; 720 + register_platform_power_off(dns323b_power_off); 721 721 break; 722 722 case DNS323_REV_C1: 723 723 /* 5182 built-in SATA init */ ··· 727 727 if (gpio_request(DNS323C_GPIO_POWER_OFF, "POWEROFF") != 0 || 728 728 gpio_direction_output(DNS323C_GPIO_POWER_OFF, 0) != 0) 729 729 pr_err("DNS-323: failed to setup power-off GPIO\n"); 730 - pm_power_off = dns323c_power_off; 730 + register_platform_power_off(dns323c_power_off); 731 731 732 732 /* Now, -this- should theoretically be done by the sata_mv driver 733 733 * once I figure out what's going on there. Maybe the behaviour
+1 -1
arch/arm/mach-orion5x/kurobox_pro-setup.c
··· 373 373 i2c_register_board_info(0, &kurobox_pro_i2c_rtc, 1); 374 374 375 375 /* register Kurobox Pro specific power-off method */ 376 - pm_power_off = kurobox_pro_power_off; 376 + register_platform_power_off(kurobox_pro_power_off); 377 377 } 378 378 379 379 #ifdef CONFIG_MACH_KUROBOX_PRO
+1 -1
arch/arm/mach-orion5x/mv2120-setup.c
··· 238 238 if (gpio_request(MV2120_GPIO_POWER_OFF, "POWEROFF") != 0 || 239 239 gpio_direction_output(MV2120_GPIO_POWER_OFF, 1) != 0) 240 240 pr_err("mv2120: failed to setup power-off GPIO\n"); 241 - pm_power_off = mv2120_power_off; 241 + register_platform_power_off(mv2120_power_off); 242 242 } 243 243 244 244 /* Warning: HP uses a wrong mach-type (=526) in their bootloader */
+1 -1
arch/arm/mach-orion5x/net2big-setup.c
··· 423 423 424 424 if (gpio_request(NET2BIG_GPIO_POWER_OFF, "power-off") == 0 && 425 425 gpio_direction_output(NET2BIG_GPIO_POWER_OFF, 0) == 0) 426 - pm_power_off = net2big_power_off; 426 + register_platform_power_off(net2big_power_off); 427 427 else 428 428 pr_err("net2big: failed to configure power-off GPIO\n"); 429 429
+1 -1
arch/arm/mach-orion5x/terastation_pro2-setup.c
··· 349 349 i2c_register_board_info(0, &tsp2_i2c_rtc, 1); 350 350 351 351 /* register Terastation Pro II specific power-off method */ 352 - pm_power_off = tsp2_power_off; 352 + register_platform_power_off(tsp2_power_off); 353 353 } 354 354 355 355 MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live")
+1 -1
arch/arm/mach-orion5x/ts209-setup.c
··· 314 314 i2c_register_board_info(0, &qnap_ts209_i2c_rtc, 1); 315 315 316 316 /* register tsx09 specific power-off method */ 317 - pm_power_off = qnap_tsx09_power_off; 317 + register_platform_power_off(qnap_tsx09_power_off); 318 318 } 319 319 320 320 MACHINE_START(TS209, "QNAP TS-109/TS-209")
+1 -1
arch/arm/mach-orion5x/ts409-setup.c
··· 312 312 platform_device_register(&ts409_leds); 313 313 314 314 /* register tsx09 specific power-off method */ 315 - pm_power_off = qnap_tsx09_power_off; 315 + register_platform_power_off(qnap_tsx09_power_off); 316 316 } 317 317 318 318 MACHINE_START(TS409, "QNAP TS-409")
-2
arch/arm/mach-s3c/irq-uart-s3c64xx.h
··· 12 12 unsigned int parent_irq; 13 13 }; 14 14 15 - extern void s3c_init_uart_irqs(struct s3c_uart_irq *irq, unsigned int nr_irqs); 16 -
+1 -1
arch/arm/mach-s3c/mach-crag6410-module.c
··· 446 446 } 447 447 448 448 static const struct i2c_device_id wlf_gf_module_id[] = { 449 - { "wlf-gf-module", 0 }, 449 + { "wlf-gf-module" }, 450 450 { } 451 451 }; 452 452
-2
arch/arm/mach-s3c/pm.h
··· 48 48 49 49 /* from sleep.S */ 50 50 51 - extern int s3c2410_cpu_suspend(unsigned long); 52 - 53 51 #ifdef CONFIG_PM_SLEEP 54 52 extern int s3c_irq_wake(struct irq_data *data, unsigned int state); 55 53 extern void s3c_cpu_resume(void);
-11
arch/arm/mach-s3c/s3c64xx.h
··· 23 23 void s3c64xx_set_xtal_freq(unsigned long freq); 24 24 void s3c64xx_set_xusbxti_freq(unsigned long freq); 25 25 26 - #ifdef CONFIG_CPU_S3C6400 27 - 28 - extern int s3c6400_init(void); 29 - extern void s3c6400_init_irq(void); 30 - extern void s3c6400_map_io(void); 31 - 32 - #else 33 - #define s3c6400_map_io NULL 34 - #define s3c6400_init NULL 35 - #endif 36 - 37 26 #ifdef CONFIG_CPU_S3C6410 38 27 39 28 extern int s3c6410_init(void);