tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'riscv/for-v5.5-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Paul Walmsley:
"One important fix for RISC-V:

- Redirect any incoming syscall with an ID less than -1 to
sys_ni_syscall, rather than allowing them to fall through into the
syscall handler.

and two minor build fixes:

- Export __asm_copy_{from,to}_user() from where they are defined.
This fixes a build error triggered by some randconfigs.

- Export flush_icache_all(). I'd resisted this before, since
historically we didn't want modules to be able to flush the I$
directly; but apparently everyone else is doing it now"

* tag 'riscv/for-v5.5-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: export flush_icache_all to modules
riscv: reject invalid syscalls below -1
riscv: fix compile failure with EXPORT_SYMBOL() & !MMU

Linus Torvalds a99efa00 d7566386

+6 -3
+1
arch/riscv/kernel/entry.S
··· 246 246 */ 247 247 li t1, -1 248 248 beq a7, t1, ret_from_syscall_rejected 249 + blt a7, t1, 1f 249 250 /* Call syscall */ 250 251 la s0, sys_call_table 251 252 slli t0, a7, RISCV_LGPTR
-3
arch/riscv/kernel/riscv_ksyms.c
··· 9 9 /* 10 10 * Assembly functions that may be used (directly or indirectly) by modules 11 11 */ 12 - EXPORT_SYMBOL(__clear_user); 13 - EXPORT_SYMBOL(__asm_copy_to_user); 14 - EXPORT_SYMBOL(__asm_copy_from_user); 15 12 EXPORT_SYMBOL(memset); 16 13 EXPORT_SYMBOL(memcpy);
+4
arch/riscv/lib/uaccess.S
··· 1 1 #include <linux/linkage.h> 2 + #include <asm-generic/export.h> 2 3 #include <asm/asm.h> 3 4 #include <asm/csr.h> 4 5 ··· 67 66 j 3b 68 67 ENDPROC(__asm_copy_to_user) 69 68 ENDPROC(__asm_copy_from_user) 69 + EXPORT_SYMBOL(__asm_copy_to_user) 70 + EXPORT_SYMBOL(__asm_copy_from_user) 70 71 71 72 72 73 ENTRY(__clear_user) ··· 111 108 bltu a0, a3, 5b 112 109 j 3b 113 110 ENDPROC(__clear_user) 111 + EXPORT_SYMBOL(__clear_user) 114 112 115 113 .section .fixup,"ax" 116 114 .balign 4
+1
arch/riscv/mm/cacheflush.c
··· 22 22 else 23 23 on_each_cpu(ipi_remote_fence_i, NULL, 1); 24 24 } 25 + EXPORT_SYMBOL(flush_icache_all); 25 26 26 27 /* 27 28 * Performs an icache flush for the given MM context. RISC-V has no direct