Merge tag 'stm32-dt-for-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

+3 -1

Documentation/devicetree/bindings/arm/stm32/stm32.yaml

··· 143 143 - description: Octavo OSD32MP15x System-in-Package based boards 144 144 items: 145 145 - enum: 146 - - lxa,stm32mp157c-mc1 # Linux Automation MC-1 146 + - lxa,stm32mp157c-mc1 # Linux Automation MC-1 147 + - lxa,stm32mp157c-tac-gen1 # Linux Automation TAC (Generation 1) 148 + - lxa,stm32mp157c-tac-gen2 # Linux Automation TAC (Generation 2) 147 149 - const: oct,stm32mp15xx-osd32 148 150 - enum: 149 151 - st,stm32mp157

+1 -1

Documentation/devicetree/bindings/net/can/bosch,m_can.yaml

··· 128 128 - clock-names 129 129 - bosch,mram-cfg 130 130 131 - additionalProperties: false 131 + unevaluatedProperties: false 132 132 133 133 examples: 134 134 - |

+3

Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml

··· 49 49 Set if the output SYNCLKO clock should be disabled. Do not mix with 50 50 microchip,synclko-125. 51 51 52 + interrupts: 53 + maxItems: 1 54 + 52 55 required: 53 56 - compatible 54 57 - reg

+2

arch/arm/boot/dts/st/Makefile

··· 56 56 stm32mp157c-ev1.dtb \ 57 57 stm32mp157c-ev1-scmi.dtb \ 58 58 stm32mp157c-lxa-mc1.dtb \ 59 + stm32mp157c-lxa-tac-gen1.dtb \ 60 + stm32mp157c-lxa-tac-gen2.dtb \ 59 61 stm32mp157c-odyssey.dtb \ 60 62 stm32mp157c-phycore-stm32mp1-3.dtb 61 63 dtb-$(CONFIG_ARCH_U8500) += \

+45

arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi

··· 171 171 }; 172 172 }; 173 173 174 + i2c3_pins_a: i2c3-0 { 175 + pins { 176 + pinmux = <STM32_PINMUX('H', 8, AF4)>, /* I2C3_SDA */ 177 + <STM32_PINMUX('H', 7, AF4)>; /* I2C3_SCL */ 178 + bias-disable; 179 + drive-open-drain; 180 + slew-rate = <0>; 181 + }; 182 + }; 183 + 174 184 usbotg_hs_pins_a: usbotg-hs-0 { 175 185 pins { 176 186 pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */ ··· 373 363 pins2 { 374 364 pinmux = <STM32_PINMUX('B', 3, AF11)>; /* CAN3_RX */ 375 365 bias-pull-up; 366 + }; 367 + }; 368 + 369 + 370 + ltdc_pins_a: ltdc-0 { 371 + pins { 372 + pinmux = <STM32_PINMUX('E', 4, AF14)>, /* LCD_B0 */ 373 + <STM32_PINMUX('G',12, AF9)>, /* LCD_B4 */ 374 + <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */ 375 + <STM32_PINMUX('I',10, AF14)>, /* LCD_HSYNC */ 376 + <STM32_PINMUX('I',14, AF14)>, /* LCD_CLK */ 377 + <STM32_PINMUX('I',15, AF14)>, /* LCD_R0 */ 378 + <STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */ 379 + <STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */ 380 + <STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */ 381 + <STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */ 382 + <STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */ 383 + <STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */ 384 + <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */ 385 + <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */ 386 + <STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */ 387 + <STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */ 388 + <STM32_PINMUX('J',10, AF14)>, /* LCD_G3 */ 389 + <STM32_PINMUX('J',11, AF14)>, /* LCD_G4 */ 390 + <STM32_PINMUX('J',13, AF14)>, /* LCD_B1 */ 391 + <STM32_PINMUX('J',14, AF14)>, /* LCD_B2 */ 392 + <STM32_PINMUX('J',15, AF14)>, /* LCD_B3 */ 393 + <STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */ 394 + <STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */ 395 + <STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */ 396 + <STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */ 397 + <STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */ 398 + <STM32_PINMUX('K', 6, AF14)>, /* LCD_B7 */ 399 + <STM32_PINMUX('K', 7, AF14)>; /* LCD_DE */ 400 + slew-rate = <2>; 376 401 }; 377 402 }; 378 403 };

+65 -4

arch/arm/boot/dts/st/stm32f746-disco.dts

··· 43 43 /dts-v1/; 44 44 #include "stm32f746.dtsi" 45 45 #include "stm32f746-pinctrl.dtsi" 46 - #include <dt-bindings/input/input.h> 47 46 #include <dt-bindings/gpio/gpio.h> 47 + #include <dt-bindings/input/input.h> 48 + #include <dt-bindings/interrupt-controller/irq.h> 48 49 49 50 / { 50 51 model = "STMicroelectronics STM32F746-DISCO board"; ··· 59 58 memory@c0000000 { 60 59 device_type = "memory"; 61 60 reg = <0xC0000000 0x800000>; 61 + }; 62 + 63 + reserved-memory { 64 + #address-cells = <1>; 65 + #size-cells = <1>; 66 + ranges; 67 + 68 + linux,cma { 69 + compatible = "shared-dma-pool"; 70 + no-map; 71 + size = <0x80000>; 72 + linux,dma-default; 73 + }; 62 74 }; 63 75 64 76 aliases { ··· 93 79 regulator-always-on; 94 80 }; 95 81 96 - mmc_vcard: mmc_vcard { 82 + vcc_3v3: vcc-3v3 { 97 83 compatible = "regulator-fixed"; 98 - regulator-name = "mmc_vcard"; 84 + regulator-name = "vcc_3v3"; 99 85 regulator-min-microvolt = <3300000>; 100 86 regulator-max-microvolt = <3300000>; 87 + }; 88 + 89 + backlight: backlight { 90 + compatible = "gpio-backlight"; 91 + gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>; 92 + status = "okay"; 93 + }; 94 + 95 + panel_rgb: panel-rgb { 96 + compatible = "rocktech,rk043fn48h"; 97 + power-supply = <&vcc_3v3>; 98 + backlight = <&backlight>; 99 + enable-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>; 100 + status = "okay"; 101 + port { 102 + panel_in_rgb: endpoint { 103 + remote-endpoint = <&ltdc_out_rgb>; 104 + }; 105 + }; 101 106 }; 102 107 }; 103 108 ··· 132 99 status = "okay"; 133 100 }; 134 101 102 + &i2c3 { 103 + pinctrl-0 = <&i2c3_pins_a>; 104 + pinctrl-names = "default"; 105 + clock-frequency = <400000>; 106 + status = "okay"; 107 + 108 + touchscreen@38 { 109 + compatible = "edt,edt-ft5306"; 110 + reg = <0x38>; 111 + interrupt-parent = <&gpioi>; 112 + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; 113 + touchscreen-size-x = <480>; 114 + touchscreen-size-y = <272>; 115 + }; 116 + }; 117 + 118 + &ltdc { 119 + pinctrl-0 = <&ltdc_pins_a>; 120 + pinctrl-names = "default"; 121 + status = "okay"; 122 + 123 + port { 124 + ltdc_out_rgb: endpoint { 125 + remote-endpoint = <&panel_in_rgb>; 126 + }; 127 + }; 128 + }; 129 + 135 130 &sdio1 { 136 131 status = "okay"; 137 - vmmc-supply = <&mmc_vcard>; 132 + vmmc-supply = <&vcc_3v3>; 138 133 cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>; 139 134 pinctrl-names = "default", "opendrain"; 140 135 pinctrl-0 = <&sdio_pins_a>;

+44

arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi

··· 8 8 9 9 &pinctrl { 10 10 compatible = "st,stm32f746-pinctrl"; 11 + 12 + gpioa: gpio@40020000 { 13 + gpio-ranges = <&pinctrl 0 0 16>; 14 + }; 15 + 16 + gpiob: gpio@40020400 { 17 + gpio-ranges = <&pinctrl 0 16 16>; 18 + }; 19 + 20 + gpioc: gpio@40020800 { 21 + gpio-ranges = <&pinctrl 0 32 16>; 22 + }; 23 + 24 + gpiod: gpio@40020c00 { 25 + gpio-ranges = <&pinctrl 0 48 16>; 26 + }; 27 + 28 + gpioe: gpio@40021000 { 29 + gpio-ranges = <&pinctrl 0 64 16>; 30 + }; 31 + 32 + gpiof: gpio@40021400 { 33 + gpio-ranges = <&pinctrl 0 80 16>; 34 + }; 35 + 36 + gpiog: gpio@40021800 { 37 + gpio-ranges = <&pinctrl 0 96 16>; 38 + }; 39 + 40 + gpioh: gpio@40021c00 { 41 + gpio-ranges = <&pinctrl 0 112 16>; 42 + }; 43 + 44 + gpioi: gpio@40022000 { 45 + gpio-ranges = <&pinctrl 0 128 16>; 46 + }; 47 + 48 + gpioj: gpio@40022400 { 49 + gpio-ranges = <&pinctrl 0 144 16>; 50 + }; 51 + 52 + gpiok: gpio@40022800 { 53 + gpio-ranges = <&pinctrl 0 160 8>; 54 + }; 11 55 };

+57

arch/arm/boot/dts/st/stm32f746.dtsi

··· 257 257 status = "disabled"; 258 258 }; 259 259 260 + can3: can@40003400 { 261 + compatible = "st,stm32f4-bxcan"; 262 + reg = <0x40003400 0x200>; 263 + interrupts = <104>, <105>, <106>, <107>; 264 + interrupt-names = "tx", "rx0", "rx1", "sce"; 265 + resets = <&rcc STM32F7_APB1_RESET(CAN3)>; 266 + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; 267 + st,gcan = <&gcan3>; 268 + status = "disabled"; 269 + }; 270 + 271 + gcan3: gcan@40003600 { 272 + compatible = "st,stm32f4-gcan", "syscon"; 273 + reg = <0x40003600 0x200>; 274 + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; 275 + }; 276 + 260 277 usart2: serial@40004400 { 261 278 compatible = "st,stm32f7-uart"; 262 279 reg = <0x40004400 0x400>; ··· 351 334 clocks = <&rcc 1 CLK_I2C4>; 352 335 #address-cells = <1>; 353 336 #size-cells = <0>; 337 + status = "disabled"; 338 + }; 339 + 340 + can1: can@40006400 { 341 + compatible = "st,stm32f4-bxcan"; 342 + reg = <0x40006400 0x200>; 343 + interrupts = <19>, <20>, <21>, <22>; 344 + interrupt-names = "tx", "rx0", "rx1", "sce"; 345 + resets = <&rcc STM32F7_APB1_RESET(CAN1)>; 346 + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>; 347 + st,can-primary; 348 + st,gcan = <&gcan1>; 349 + status = "disabled"; 350 + }; 351 + 352 + gcan1: gcan@40006600 { 353 + compatible = "st,stm32f4-gcan", "syscon"; 354 + reg = <0x40006600 0x200>; 355 + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>; 356 + }; 357 + 358 + can2: can@40006800 { 359 + compatible = "st,stm32f4-bxcan"; 360 + reg = <0x40006800 0x200>; 361 + interrupts = <63>, <64>, <65>, <66>; 362 + interrupt-names = "tx", "rx0", "rx1", "sce"; 363 + resets = <&rcc STM32F7_APB1_RESET(CAN2)>; 364 + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN2)>; 365 + st,can-secondary; 366 + st,gcan = <&gcan1>; 354 367 status = "disabled"; 355 368 }; 356 369 ··· 552 505 #pwm-cells = <3>; 553 506 status = "disabled"; 554 507 }; 508 + }; 509 + 510 + ltdc: display-controller@40016800 { 511 + compatible = "st,stm32-ltdc"; 512 + reg = <0x40016800 0x200>; 513 + interrupts = <88>, <89>; 514 + resets = <&rcc STM32F7_APB2_RESET(LTDC)>; 515 + clocks = <&rcc 1 CLK_LCD>; 516 + clock-names = "lcd"; 517 + status = "disabled"; 555 518 }; 556 519 557 520 pwrcfg: power-config@40007000 {

+44

arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi

··· 8 8 9 9 &pinctrl { 10 10 compatible = "st,stm32f769-pinctrl"; 11 + 12 + gpioa: gpio@40020000 { 13 + gpio-ranges = <&pinctrl 0 0 16>; 14 + }; 15 + 16 + gpiob: gpio@40020400 { 17 + gpio-ranges = <&pinctrl 0 16 16>; 18 + }; 19 + 20 + gpioc: gpio@40020800 { 21 + gpio-ranges = <&pinctrl 0 32 16>; 22 + }; 23 + 24 + gpiod: gpio@40020c00 { 25 + gpio-ranges = <&pinctrl 0 48 16>; 26 + }; 27 + 28 + gpioe: gpio@40021000 { 29 + gpio-ranges = <&pinctrl 0 64 16>; 30 + }; 31 + 32 + gpiof: gpio@40021400 { 33 + gpio-ranges = <&pinctrl 0 80 16>; 34 + }; 35 + 36 + gpiog: gpio@40021800 { 37 + gpio-ranges = <&pinctrl 0 96 16>; 38 + }; 39 + 40 + gpioh: gpio@40021c00 { 41 + gpio-ranges = <&pinctrl 0 112 16>; 42 + }; 43 + 44 + gpioi: gpio@40022000 { 45 + gpio-ranges = <&pinctrl 0 128 16>; 46 + }; 47 + 48 + gpioj: gpio@40022400 { 49 + gpio-ranges = <&pinctrl 0 144 16>; 50 + }; 51 + 52 + gpiok: gpio@40022800 { 53 + gpio-ranges = <&pinctrl 0 160 8>; 54 + }; 11 55 };

+27 -39

arch/arm/boot/dts/st/stm32mp131.dtsi

··· 33 33 optee { 34 34 method = "smc"; 35 35 compatible = "linaro,optee-tz"; 36 + interrupt-parent = <&intc>; 37 + interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; 36 38 }; 37 39 38 40 scmi: scmi { ··· 42 40 #address-cells = <1>; 43 41 #size-cells = <0>; 44 42 linaro,optee-channel-id = <0>; 45 - shmem = <&scmi_shm>; 46 43 47 44 scmi_clk: protocol@14 { 48 45 reg = <0x14>; ··· 51 50 scmi_reset: protocol@16 { 52 51 reg = <0x16>; 53 52 #reset-cells = <1>; 53 + }; 54 + 55 + scmi_voltd: protocol@17 { 56 + reg = <0x17>; 57 + 58 + scmi_regu: regulators { 59 + #address-cells = <1>; 60 + #size-cells = <0>; 61 + 62 + scmi_reg11: regulator@0 { 63 + reg = <VOLTD_SCMI_REG11>; 64 + regulator-name = "reg11"; 65 + }; 66 + scmi_reg18: regulator@1 { 67 + reg = <VOLTD_SCMI_REG18>; 68 + regulator-name = "reg18"; 69 + }; 70 + scmi_usb33: regulator@2 { 71 + reg = <VOLTD_SCMI_USB33>; 72 + regulator-name = "usb33"; 73 + }; 74 + }; 54 75 }; 55 76 }; 56 77 }; ··· 100 77 always-on; 101 78 }; 102 79 103 - /* PWR 1v1, 1v8 and 3v3 regulators defined as fixed, waiting for SCMI */ 104 - reg11: reg11 { 105 - compatible = "regulator-fixed"; 106 - regulator-name = "reg11"; 107 - regulator-min-microvolt = <1100000>; 108 - regulator-max-microvolt = <1100000>; 109 - }; 110 - 111 - reg18: reg18 { 112 - compatible = "regulator-fixed"; 113 - regulator-name = "reg18"; 114 - regulator-min-microvolt = <1800000>; 115 - regulator-max-microvolt = <1800000>; 116 - }; 117 - 118 - usb33: usb33 { 119 - compatible = "regulator-fixed"; 120 - regulator-name = "usb33"; 121 - regulator-min-microvolt = <3300000>; 122 - regulator-max-microvolt = <3300000>; 123 - }; 124 - 125 80 soc { 126 81 compatible = "simple-bus"; 127 82 #address-cells = <1>; 128 83 #size-cells = <1>; 129 84 interrupt-parent = <&intc>; 130 85 ranges; 131 - 132 - scmi_sram: sram@2ffff000 { 133 - compatible = "mmio-sram"; 134 - reg = <0x2ffff000 0x1000>; 135 - #address-cells = <1>; 136 - #size-cells = <1>; 137 - ranges = <0 0x2ffff000 0x1000>; 138 - 139 - scmi_shm: scmi-sram@0 { 140 - compatible = "arm,scmi-shmem"; 141 - reg = <0 0x80>; 142 - }; 143 - }; 144 86 145 87 timers2: timer@40000000 { 146 88 #address-cells = <1>; ··· 801 813 g-tx-fifo-size = <256 16 16 16 16 16 16 16>; 802 814 dr_mode = "otg"; 803 815 otg-rev = <0x200>; 804 - usb33d-supply = <&usb33>; 816 + usb33d-supply = <&scmi_usb33>; 805 817 status = "disabled"; 806 818 }; 807 819 ··· 1331 1343 reg = <0x5a006000 0x1000>; 1332 1344 clocks = <&rcc USBPHY_K>; 1333 1345 resets = <&rcc USBPHY_R>; 1334 - vdda1v1-supply = <&reg11>; 1335 - vdda1v8-supply = <&reg18>; 1346 + vdda1v1-supply = <&scmi_reg11>; 1347 + vdda1v8-supply = <&scmi_reg18>; 1336 1348 status = "disabled"; 1337 1349 1338 1350 usbphyc_port0: usb-phy@0 {

+30 -38

arch/arm/boot/dts/st/stm32mp135f-dk.dts

··· 9 9 #include <dt-bindings/gpio/gpio.h> 10 10 #include <dt-bindings/input/input.h> 11 11 #include <dt-bindings/leds/common.h> 12 + #include <dt-bindings/regulator/st,stm32mp13-regulator.h> 12 13 #include "stm32mp135.dtsi" 13 14 #include "stm32mp13xf.dtsi" 14 15 #include "stm32mp13-pinctrl.dtsi" ··· 66 65 default-state = "off"; 67 66 }; 68 67 }; 69 - 70 - v3v3_sw: v3v3-sw { 71 - compatible = "regulator-fixed"; 72 - regulator-name = "v3v3_sw"; 73 - regulator-min-microvolt = <3300000>; 74 - regulator-max-microvolt = <3300000>; 75 - regulator-always-on; 76 - }; 77 - 78 - vdd_adc: vdd-adc { 79 - compatible = "regulator-fixed"; 80 - regulator-name = "vdd_adc"; 81 - regulator-min-microvolt = <3300000>; 82 - regulator-max-microvolt = <3300000>; 83 - regulator-always-on; 84 - }; 85 - 86 - vdd_sd: vdd-sd { 87 - compatible = "regulator-fixed"; 88 - regulator-name = "vdd_sd"; 89 - regulator-min-microvolt = <2900000>; 90 - regulator-max-microvolt = <2900000>; 91 - regulator-always-on; 92 - }; 93 - 94 - vdd_usb: vdd-usb { 95 - compatible = "regulator-fixed"; 96 - regulator-name = "vdd_usb"; 97 - regulator-min-microvolt = <3300000>; 98 - regulator-max-microvolt = <3300000>; 99 - regulator-always-on; 100 - }; 101 68 }; 102 69 103 70 &adc_1 { 104 71 pinctrl-names = "default"; 105 72 pinctrl-0 = <&adc1_usb_cc_pins_a>; 106 - vdda-supply = <&vdd_adc>; 107 - vref-supply = <&vdd_adc>; 73 + vdda-supply = <&scmi_vdd_adc>; 74 + vref-supply = <&scmi_vdd_adc>; 108 75 status = "okay"; 109 76 adc1: adc@0 { 110 77 status = "okay"; ··· 164 195 status = "okay"; 165 196 }; 166 197 198 + &scmi_regu { 199 + scmi_vdd_adc: regulator@10 { 200 + reg = <VOLTD_SCMI_STPMIC1_LDO1>; 201 + regulator-name = "vdd_adc"; 202 + }; 203 + scmi_vdd_usb: regulator@13 { 204 + reg = <VOLTD_SCMI_STPMIC1_LDO4>; 205 + regulator-name = "vdd_usb"; 206 + }; 207 + scmi_vdd_sd: regulator@14 { 208 + reg = <VOLTD_SCMI_STPMIC1_LDO5>; 209 + regulator-name = "vdd_sd"; 210 + }; 211 + scmi_v1v8_periph: regulator@15 { 212 + reg = <VOLTD_SCMI_STPMIC1_LDO6>; 213 + regulator-name = "v1v8_periph"; 214 + }; 215 + scmi_v3v3_sw: regulator@19 { 216 + reg = <VOLTD_SCMI_STPMIC1_PWR_SW2>; 217 + regulator-name = "v3v3_sw"; 218 + }; 219 + }; 220 + 167 221 &sdmmc1 { 168 222 pinctrl-names = "default", "opendrain", "sleep"; 169 223 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>; ··· 196 204 disable-wp; 197 205 st,neg-edge; 198 206 bus-width = <4>; 199 - vmmc-supply = <&vdd_sd>; 207 + vmmc-supply = <&scmi_vdd_sd>; 200 208 status = "okay"; 201 209 }; 202 210 ··· 313 321 hub@1 { 314 322 compatible = "usb424,2514"; 315 323 reg = <1>; 316 - vdd-supply = <&v3v3_sw>; 324 + vdd-supply = <&scmi_v3v3_sw>; 317 325 }; 318 326 }; 319 327 ··· 334 342 }; 335 343 336 344 &usbphyc_port0 { 337 - phy-supply = <&vdd_usb>; 345 + phy-supply = <&scmi_vdd_usb>; 338 346 st,current-boost-microamp = <1000>; 339 347 st,decrease-hs-slew-rate; 340 348 st,tune-hs-dc-level = <2>; ··· 348 356 }; 349 357 350 358 &usbphyc_port1 { 351 - phy-supply = <&vdd_usb>; 359 + phy-supply = <&scmi_vdd_usb>; 352 360 st,current-boost-microamp = <1000>; 353 361 st,decrease-hs-slew-rate; 354 362 st,tune-hs-dc-level = <2>;

+129

arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi

··· 6 6 #include <dt-bindings/pinctrl/stm32-pinfunc.h> 7 7 8 8 &pinctrl { 9 + adc1_ain_pins_a: adc1-ain-0 { 10 + pins { 11 + pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* ADC1_INP2 */ 12 + <STM32_PINMUX('B', 1, ANALOG)>, /* ADC1_INP5 */ 13 + <STM32_PINMUX('B', 0, ANALOG)>, /* ADC1_INP9 */ 14 + <STM32_PINMUX('C', 0, ANALOG)>, /* ADC1_INP10 */ 15 + <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1_INP13 */ 16 + <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1_INP15 */ 17 + }; 18 + }; 19 + 9 20 adc1_in6_pins_a: adc1-in6-0 { 10 21 pins { 11 22 pinmux = <STM32_PINMUX('F', 12, ANALOG)>; ··· 397 386 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ 398 387 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ 399 388 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */ 389 + <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ 390 + <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ 391 + }; 392 + }; 393 + 394 + ethernet0_rgmii_pins_e: rgmii-4 { 395 + pins1 { 396 + pinmux = <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ 397 + <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */ 398 + <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ 399 + <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ 400 + <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ 401 + <STM32_PINMUX('B', 11, AF11)>; /* ETH_RGMII_TX_CTL */ 402 + bias-disable; 403 + drive-push-pull; 404 + slew-rate = <2>; 405 + }; 406 + pins2 { 407 + pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ 408 + <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ 409 + <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */ 410 + <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */ 411 + <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ 412 + <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ 413 + bias-disable; 414 + }; 415 + }; 416 + 417 + ethernet0_rgmii_sleep_pins_e: rgmii-sleep-4 { 418 + pins1 { 419 + pinmux = <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ 420 + <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */ 421 + <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ 422 + <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ 423 + <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ 424 + <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ 425 + <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ 426 + <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ 427 + <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ 428 + <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */ 400 429 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ 401 430 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ 402 431 }; ··· 1205 1154 }; 1206 1155 }; 1207 1156 1157 + pwm1_pins_c: pwm1-2 { 1158 + pins { 1159 + pinmux = <STM32_PINMUX('E', 11, AF1)>; /* TIM1_CH2 */ 1160 + drive-push-pull; 1161 + slew-rate = <0>; 1162 + }; 1163 + }; 1164 + 1165 + pwm1_sleep_pins_c: pwm1-sleep-2 { 1166 + pins { 1167 + pinmux = <STM32_PINMUX('E', 11, ANALOG)>; /* TIM1_CH2 */ 1168 + }; 1169 + }; 1170 + 1208 1171 pwm2_pins_a: pwm2-0 { 1209 1172 pins { 1210 1173 pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */ ··· 1342 1277 pwm8_sleep_pins_a: pwm8-sleep-0 { 1343 1278 pins { 1344 1279 pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */ 1280 + }; 1281 + }; 1282 + 1283 + pwm8_pins_b: pwm8-1 { 1284 + pins { 1285 + pinmux = <STM32_PINMUX('I', 5, AF3)>, /* TIM8_CH1 */ 1286 + <STM32_PINMUX('I', 6, AF3)>, /* TIM8_CH2 */ 1287 + <STM32_PINMUX('I', 7, AF3)>, /* TIM8_CH3 */ 1288 + <STM32_PINMUX('C', 9, AF3)>; /* TIM8_CH4 */ 1289 + drive-push-pull; 1290 + slew-rate = <0>; 1291 + }; 1292 + }; 1293 + 1294 + pwm8_sleep_pins_b: pwm8-sleep-1 { 1295 + pins { 1296 + pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* TIM8_CH1 */ 1297 + <STM32_PINMUX('I', 6, ANALOG)>, /* TIM8_CH2 */ 1298 + <STM32_PINMUX('I', 7, ANALOG)>, /* TIM8_CH3 */ 1299 + <STM32_PINMUX('C', 9, ANALOG)>; /* TIM8_CH4 */ 1345 1300 }; 1346 1301 }; 1347 1302 ··· 2159 2074 }; 2160 2075 }; 2161 2076 2077 + spi2_pins_c: spi2-2 { 2078 + pins1 { 2079 + pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */ 2080 + <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */ 2081 + bias-disable; 2082 + drive-push-pull; 2083 + }; 2084 + 2085 + pins2 { 2086 + pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */ 2087 + bias-pull-down; 2088 + }; 2089 + }; 2090 + 2162 2091 spi4_pins_a: spi4-0 { 2163 2092 pins { 2164 2093 pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */ ··· 2183 2084 }; 2184 2085 pins2 { 2185 2086 pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */ 2087 + bias-disable; 2088 + }; 2089 + }; 2090 + 2091 + spi5_pins_a: spi5-0 { 2092 + pins1 { 2093 + pinmux = <STM32_PINMUX('F', 7, AF5)>, /* SPI5_SCK */ 2094 + <STM32_PINMUX('F', 9, AF5)>; /* SPI5_MOSI */ 2095 + bias-disable; 2096 + drive-push-pull; 2097 + slew-rate = <1>; 2098 + }; 2099 + 2100 + pins2 { 2101 + pinmux = <STM32_PINMUX('F', 8, AF5)>; /* SPI5_MISO */ 2186 2102 bias-disable; 2187 2103 }; 2188 2104 }; ··· 2689 2575 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ 2690 2576 <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */ 2691 2577 <STM32_PINMUX('B', 11, ANALOG)>; /* USART3_RX */ 2578 + }; 2579 + }; 2580 + 2581 + usart3_pins_f: usart3-5 { 2582 + pins1 { 2583 + pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ 2584 + <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS */ 2585 + bias-disable; 2586 + drive-push-pull; 2587 + slew-rate = <0>; 2588 + }; 2589 + pins2 { 2590 + pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */ 2591 + <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */ 2592 + bias-disable; 2692 2593 }; 2693 2594 }; 2694 2595

+3 -20

arch/arm/boot/dts/st/stm32mp15-scmi.dtsi

··· 16 16 #address-cells = <1>; 17 17 #size-cells = <0>; 18 18 linaro,optee-channel-id = <0>; 19 - shmem = <&scmi_shm>; 20 19 21 20 scmi_clk: protocol@14 { 22 21 reg = <0x14>; ··· 34 35 #address-cells = <1>; 35 36 #size-cells = <0>; 36 37 37 - scmi_reg11: reg11@0 { 38 + scmi_reg11: regulator@0 { 38 39 reg = <0>; 39 40 regulator-name = "reg11"; 40 41 regulator-min-microvolt = <1100000>; 41 42 regulator-max-microvolt = <1100000>; 42 43 }; 43 44 44 - scmi_reg18: reg18@1 { 45 - voltd-name = "reg18"; 45 + scmi_reg18: regulator@1 { 46 46 reg = <1>; 47 47 regulator-name = "reg18"; 48 48 regulator-min-microvolt = <1800000>; 49 49 regulator-max-microvolt = <1800000>; 50 50 }; 51 51 52 - scmi_usb33: usb33@2 { 52 + scmi_usb33: regulator@2 { 53 53 reg = <2>; 54 54 regulator-name = "usb33"; 55 55 regulator-min-microvolt = <3300000>; 56 56 regulator-max-microvolt = <3300000>; 57 57 }; 58 58 }; 59 - }; 60 - }; 61 - }; 62 - 63 - soc { 64 - scmi_sram: sram@2ffff000 { 65 - compatible = "mmio-sram"; 66 - reg = <0x2ffff000 0x1000>; 67 - #address-cells = <1>; 68 - #size-cells = <1>; 69 - ranges = <0 0x2ffff000 0x1000>; 70 - 71 - scmi_shm: scmi-sram@0 { 72 - compatible = "arm,scmi-shmem"; 73 - reg = <0 0x80>; 74 59 }; 75 60 }; 76 61 };

+32

arch/arm/boot/dts/st/stm32mp151a-prtt1c.dts

··· 23 23 clock-frequency = <25000000>; 24 24 }; 25 25 26 + pse_t1l1: ethernet-pse-1 { 27 + compatible = "podl-pse-regulator"; 28 + pse-supply = <&reg_t1l1>; 29 + #pse-cells = <0>; 30 + }; 31 + 32 + pse_t1l2: ethernet-pse-2 { 33 + compatible = "podl-pse-regulator"; 34 + pse-supply = <&reg_t1l2>; 35 + #pse-cells = <0>; 36 + }; 37 + 26 38 mdio0: mdio { 27 39 compatible = "virtual,mdio-gpio"; 28 40 #address-cells = <1>; ··· 42 30 gpios = <&gpioc 1 GPIO_ACTIVE_HIGH 43 31 &gpioa 2 GPIO_ACTIVE_HIGH>; 44 32 33 + }; 34 + 35 + reg_t1l1: regulator-pse-t1l1 { 36 + compatible = "regulator-fixed"; 37 + regulator-name = "pse-t1l1"; 38 + regulator-min-microvolt = <12000000>; 39 + regulator-max-microvolt = <12000000>; 40 + gpio = <&gpiog 13 GPIO_ACTIVE_HIGH>; 41 + enable-active-high; 42 + }; 43 + 44 + reg_t1l2: regulator-pse-t1l2 { 45 + compatible = "regulator-fixed"; 46 + regulator-name = "pse-t1l2"; 47 + regulator-min-microvolt = <12000000>; 48 + regulator-max-microvolt = <12000000>; 49 + gpio = <&gpiog 14 GPIO_ACTIVE_HIGH>; 50 + enable-active-high; 45 51 }; 46 52 47 53 wifi_pwrseq: wifi-pwrseq { ··· 122 92 reset-gpios = <&gpiog 12 GPIO_ACTIVE_LOW>; 123 93 reset-assert-us = <10>; 124 94 reset-deassert-us = <35>; 95 + pses = <&pse_t1l1>; 125 96 }; 126 97 127 98 /* TI DP83TD510E */ ··· 133 102 reset-gpios = <&gpiog 11 GPIO_ACTIVE_LOW>; 134 103 reset-assert-us = <10>; 135 104 reset-deassert-us = <35>; 105 + pses = <&pse_t1l2>; 136 106 }; 137 107 138 108 /* Micrel KSZ9031 */

+18

arch/arm/boot/dts/st/stm32mp157.dtsi

··· 22 22 reg = <0x5a000000 0x800>; 23 23 clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>; 24 24 clock-names = "pclk", "ref", "px_clk"; 25 + phy-dsi-supply = <&reg18>; 25 26 resets = <&rcc DSI_R>; 26 27 reset-names = "apb"; 27 28 status = "disabled"; 29 + 30 + ports { 31 + #address-cells = <1>; 32 + #size-cells = <0>; 33 + 34 + port@0 { 35 + reg = <0>; 36 + dsi_in: endpoint { 37 + }; 38 + }; 39 + 40 + port@1 { 41 + reg = <1>; 42 + dsi_out: endpoint { 43 + }; 44 + }; 45 + }; 28 46 }; 29 47 }; 30 48 };

+6 -18

arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts

··· 46 46 47 47 &dsi { 48 48 status = "okay"; 49 - phy-dsi-supply = <&reg18>; 49 + }; 50 50 51 - ports { 52 - #address-cells = <1>; 53 - #size-cells = <0>; 51 + &dsi_in { 52 + remote-endpoint = <&ltdc_ep0_out>; 53 + }; 54 54 55 - port@0 { 56 - reg = <0>; 57 - dsi_in: endpoint { 58 - remote-endpoint = <&ltdc_ep0_out>; 59 - }; 60 - }; 61 - 62 - port@1 { 63 - reg = <1>; 64 - dsi_out: endpoint { 65 - remote-endpoint = <&bridge_in>; 66 - }; 67 - }; 68 - }; 55 + &dsi_out { 56 + remote-endpoint = <&bridge_in>; 69 57 }; 70 58 71 59 &i2c6 {

+8 -20

arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts

··· 46 46 47 47 &dsi { 48 48 status = "okay"; 49 - phy-dsi-supply = <&reg18>; 49 + }; 50 50 51 - ports { 52 - #address-cells = <1>; 53 - #size-cells = <0>; 51 + &dsi_in { 52 + remote-endpoint = <&ltdc_out_dsi>; 53 + }; 54 54 55 - port@0 { 56 - reg = <0>; 57 - dsi_in_ltdc: endpoint { 58 - remote-endpoint = <&ltdc_out_dsi>; 59 - }; 60 - }; 61 - 62 - port@1 { 63 - reg = <1>; 64 - dsi_out_bridge: endpoint { 65 - remote-endpoint = <&bridge_in_dsi>; 66 - }; 67 - }; 68 - }; 55 + &dsi_out { 56 + remote-endpoint = <&bridge_in_dsi>; 69 57 }; 70 58 71 59 &i2c6 { ··· 76 88 port@0 { 77 89 reg = <0>; 78 90 bridge_in_dsi: endpoint { 79 - remote-endpoint = <&dsi_out_bridge>; 91 + remote-endpoint = <&dsi_out>; 80 92 data-lanes = <1 2>; 81 93 }; 82 94 }; ··· 96 108 97 109 port { 98 110 ltdc_out_dsi: endpoint { 99 - remote-endpoint = <&dsi_in_ltdc>; 111 + remote-endpoint = <&dsi_in>; 100 112 }; 101 113 }; 102 114 };

+8 -20

arch/arm/boot/dts/st/stm32mp157c-dk2.dts

··· 34 34 #address-cells = <1>; 35 35 #size-cells = <0>; 36 36 status = "okay"; 37 - phy-dsi-supply = <&reg18>; 38 - 39 - ports { 40 - #address-cells = <1>; 41 - #size-cells = <0>; 42 - 43 - port@0 { 44 - reg = <0>; 45 - dsi_in: endpoint { 46 - remote-endpoint = <&ltdc_ep1_out>; 47 - }; 48 - }; 49 - 50 - port@1 { 51 - reg = <1>; 52 - dsi_out: endpoint { 53 - remote-endpoint = <&panel_in>; 54 - }; 55 - }; 56 - }; 57 37 58 38 panel@0 { 59 39 compatible = "orisetech,otm8009a"; ··· 48 68 }; 49 69 }; 50 70 }; 71 + }; 72 + 73 + &dsi_in { 74 + remote-endpoint = <&ltdc_ep1_out>; 75 + }; 76 + 77 + &dsi_out { 78 + remote-endpoint = <&panel_in>; 51 79 }; 52 80 53 81 &i2c1 {

+3 -4

arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi

··· 310 310 vref_ddr: vref_ddr { 311 311 regulator-name = "vref_ddr"; 312 312 regulator-always-on; 313 - regulator-over-current-protection; 314 313 }; 315 314 316 315 bst_out: boost { ··· 320 321 vbus_otg: pwr_sw1 { 321 322 regulator-name = "vbus_otg"; 322 323 interrupts = <IT_OCP_OTG 0>; 323 - regulator-active-discharge; 324 + regulator-active-discharge = <1>; 324 325 }; 325 326 326 327 vbus_usbh: pwr_sw2 { ··· 367 368 &m4_rproc { 368 369 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, 369 370 <&vdev0vring1>, <&vdev0buffer>; 370 - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; 371 - mbox-names = "vq0", "vq1", "shutdown"; 371 + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; 372 + mbox-names = "vq0", "vq1", "shutdown", "detach"; 372 373 interrupt-parent = <&exti>; 373 374 interrupts = <68 1>; 374 375 interrupt-names = "wdg";

+8 -20

arch/arm/boot/dts/st/stm32mp157c-ev1.dts

··· 100 100 }; 101 101 102 102 &dsi { 103 - phy-dsi-supply = <&reg18>; 104 103 #address-cells = <1>; 105 104 #size-cells = <0>; 106 105 status = "okay"; 107 - 108 - ports { 109 - #address-cells = <1>; 110 - #size-cells = <0>; 111 - 112 - port@0 { 113 - reg = <0>; 114 - dsi_in: endpoint { 115 - remote-endpoint = <&ltdc_ep0_out>; 116 - }; 117 - }; 118 - 119 - port@1 { 120 - reg = <1>; 121 - dsi_out: endpoint { 122 - remote-endpoint = <&dsi_panel_in>; 123 - }; 124 - }; 125 - }; 126 106 127 107 panel@0 { 128 108 compatible = "raydium,rm68200"; ··· 118 138 }; 119 139 }; 120 140 }; 141 + }; 142 + 143 + &dsi_in { 144 + remote-endpoint = <&ltdc_ep0_out>; 145 + }; 146 + 147 + &dsi_out { 148 + remote-endpoint = <&dsi_panel_in>; 121 149 }; 122 150 123 151 &ethernet0 {

+93

arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts

··· 1 + // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 2 + /* 3 + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved 4 + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix 5 + * Copyright (C) 2023 Leonard Göhrs, Pengutronix 6 + */ 7 + 8 + /dts-v1/; 9 + 10 + #include "stm32mp157.dtsi" 11 + #include "stm32mp15xc-lxa-tac.dtsi" 12 + 13 + / { 14 + model = "Linux Automation Test Automation Controller (TAC) Gen 1"; 15 + compatible = "lxa,stm32mp157c-tac-gen1", "oct,stm32mp15xx-osd32", "st,stm32mp157"; 16 + 17 + backlight: backlight { 18 + compatible = "pwm-backlight"; 19 + power-supply = <&v3v3>; 20 + 21 + brightness-levels = <0 31 63 95 127 159 191 223 255>; 22 + default-brightness-level = <7>; 23 + pwms = <&backlight_pwm 1 1000000 0>; 24 + }; 25 + 26 + reg_iobus_12v: regulator-iobus-12v { 27 + compatible = "regulator-fixed"; 28 + vin-supply = <&reg_12v>; 29 + 30 + gpio = <&gpioh 13 GPIO_ACTIVE_HIGH>; 31 + enable-active-high; 32 + regulator-max-microvolt = <12000000>; 33 + regulator-min-microvolt = <12000000>; 34 + regulator-name = "12V_IOBUS"; 35 + }; 36 + }; 37 + 38 + &gpioa { 39 + gpio-line-names = "", "", "STACK_CS2", "", "STACK_CS3", /* 0 */ 40 + "ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */ 41 + "", "", "", "BOOTROM_LED", "ETH_LAB_LEDRP", /* 10 */ 42 + ""; /* 15 */ 43 + }; 44 + 45 + &gpioc { 46 + gpio-line-names = "", "STACK_CS1", "", "", "", /* 0 */ 47 + "", "", "", "", "", /* 5 */ 48 + "", ""; /* 10 */ 49 + }; 50 + 51 + &gpu { 52 + status = "disabled"; 53 + }; 54 + 55 + &i2c1 { 56 + powerboard_gpio: gpio@24 { 57 + compatible = "nxp,pca9570"; 58 + reg = <0x24>; 59 + 60 + #gpio-cells = <2>; 61 + gpio-controller; 62 + gpio-line-names = "DUT_PWR_EN", "DUT_PWR_DISCH", "DUT_PWR_ADCRST", ""; 63 + }; 64 + }; 65 + 66 + &spi2 { 67 + adc@0 { 68 + compatible = "ti,lmp92064"; 69 + reg = <0>; 70 + spi-max-frequency = <5000000>; 71 + vdd-supply = <&reg_pb_3v3>; 72 + vdig-supply = <&reg_pb_3v3>; 73 + reset-gpios = <&powerboard_gpio 2 GPIO_ACTIVE_HIGH>; 74 + 75 + shunt-resistor-micro-ohms = <15000>; 76 + }; 77 + }; 78 + 79 + &timers1 { 80 + /* spare dmas for other usage */ 81 + /delete-property/dmas; 82 + /delete-property/dma-names; 83 + 84 + status = "okay"; 85 + 86 + backlight_pwm: pwm { 87 + pinctrl-names = "default", "sleep"; 88 + pinctrl-0 = <&pwm1_pins_c>; 89 + pinctrl-1 = <&pwm1_sleep_pins_c>; 90 + 91 + status = "okay"; 92 + }; 93 + };

+172

arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts

··· 1 + // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 2 + /* 3 + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved 4 + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix 5 + * Copyright (C) 2023 Leonard Göhrs, Pengutronix 6 + */ 7 + 8 + /dts-v1/; 9 + 10 + #include "stm32mp157.dtsi" 11 + #include "stm32mp15xc-lxa-tac.dtsi" 12 + 13 + / { 14 + model = "Linux Automation Test Automation Controller (TAC) Gen 2"; 15 + compatible = "lxa,stm32mp157c-tac-gen2", "oct,stm32mp15xx-osd32", "st,stm32mp157"; 16 + 17 + backlight: backlight { 18 + compatible = "pwm-backlight"; 19 + power-supply = <&v3v3>; 20 + 21 + brightness-levels = <0 31 63 95 127 159 191 223 255>; 22 + default-brightness-level = <7>; 23 + pwms = <&led_pwm 3 1000000 0>; 24 + }; 25 + 26 + reg_iobus_12v: regulator-iobus-12v { 27 + compatible = "regulator-fixed"; 28 + vin-supply = <&reg_12v>; 29 + gpio = <&gpioh 13 GPIO_ACTIVE_LOW>; 30 + regulator-max-microvolt = <12000000>; 31 + regulator-min-microvolt = <12000000>; 32 + regulator-name = "12V_IOBUS"; 33 + }; 34 + 35 + led-controller-1 { 36 + compatible = "pwm-leds-multicolor"; 37 + 38 + multi-led { 39 + color = <LED_COLOR_ID_RGB>; 40 + function = LED_FUNCTION_STATUS; 41 + max-brightness = <65535>; 42 + 43 + led-red { 44 + active-low; 45 + color = <LED_COLOR_ID_RED>; 46 + pwms = <&led_pwm 0 1000000 0>; 47 + }; 48 + 49 + led-green { 50 + active-low; 51 + color = <LED_COLOR_ID_GREEN>; 52 + pwms = <&led_pwm 2 1000000 0>; 53 + }; 54 + 55 + led-blue { 56 + active-low; 57 + color = <LED_COLOR_ID_BLUE>; 58 + pwms = <&led_pwm 1 1000000 0>; 59 + }; 60 + }; 61 + }; 62 + 63 + led-controller-2 { 64 + compatible = "gpio-leds"; 65 + 66 + led-5 { 67 + label = "tac:green:iobus"; 68 + gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>; 69 + }; 70 + 71 + led-6 { 72 + label = "tac:green:can"; 73 + gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>; 74 + }; 75 + 76 + led-7 { 77 + label = "tac:green:out0"; 78 + gpios = <&gpiob 8 GPIO_ACTIVE_HIGH>; 79 + }; 80 + 81 + led-8 { 82 + label = "tac:green:out1"; 83 + gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>; 84 + }; 85 + 86 + led-9 { 87 + label = "tac:green:uarttx"; 88 + gpios = <&gpiod 3 GPIO_ACTIVE_HIGH>; 89 + }; 90 + 91 + led-10 { 92 + label = "tac:green:uartrx"; 93 + gpios = <&gpiof 6 GPIO_ACTIVE_HIGH>; 94 + }; 95 + 96 + led-11 { 97 + label = "tac:green:usbh1"; 98 + gpios = <&gpioc 8 GPIO_ACTIVE_HIGH>; 99 + }; 100 + 101 + led-12 { 102 + label = "tac:green:usbh2"; 103 + gpios = <&gpiod 6 GPIO_ACTIVE_HIGH>; 104 + }; 105 + 106 + led-13 { 107 + label = "tac:green:usbh3"; 108 + gpios = <&gpiob 9 GPIO_ACTIVE_HIGH>; 109 + }; 110 + 111 + led-14 { 112 + label = "tac:green:usbg"; 113 + gpios = <&gpiod 14 GPIO_ACTIVE_HIGH>; 114 + linux,default-trigger = "usb-gadget"; 115 + }; 116 + 117 + led-15 { 118 + label = "tac:green:dutpwr"; 119 + gpios = <&gpioa 15 GPIO_ACTIVE_HIGH>; 120 + }; 121 + }; 122 + }; 123 + 124 + &gpioa { 125 + gpio-line-names = "", "", "DUT_PWR_EN", "", "STACK_CS3", /* 0 */ 126 + "ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */ 127 + "", "", "", "BOOTROM_LED", "ETH_LAB_LEDRP", /* 10 */ 128 + ""; /* 15 */ 129 + }; 130 + 131 + &gpioc { 132 + gpio-line-names = "", "DUT_PWR_DISCH", "", "", "", /* 0 */ 133 + "", "", "", "", "", /* 5 */ 134 + "", ""; /* 10 */ 135 + }; 136 + 137 + &gpu { 138 + status = "disabled"; 139 + }; 140 + 141 + &m_can2 { 142 + termination-gpios = <&gpioe 4 GPIO_ACTIVE_HIGH>; 143 + termination-ohms = <120>; 144 + }; 145 + 146 + &spi2 { 147 + adc@0 { 148 + compatible = "ti,lmp92064"; 149 + reg = <0>; 150 + 151 + reset-gpios = <&gpioa 4 GPIO_ACTIVE_HIGH>; 152 + shunt-resistor-micro-ohms = <15000>; 153 + spi-max-frequency = <5000000>; 154 + vdd-supply = <&reg_pb_3v3>; 155 + vdig-supply = <&reg_pb_3v3>; 156 + }; 157 + }; 158 + 159 + &timers8 { 160 + /* spare dmas for other usage */ 161 + /delete-property/dmas; 162 + /delete-property/dma-names; 163 + 164 + status = "okay"; 165 + 166 + led_pwm: pwm { 167 + pinctrl-names = "default", "sleep"; 168 + pinctrl-0 = <&pwm8_pins_b>; 169 + pinctrl-1 = <&pwm8_sleep_pins_b>; 170 + status = "okay"; 171 + }; 172 + };

+2 -2

arch/arm/boot/dts/st/stm32mp157c-odyssey-som.dtsi

··· 230 230 &m4_rproc { 231 231 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, 232 232 <&vdev0vring1>, <&vdev0buffer>; 233 - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; 234 - mbox-names = "vq0", "vq1", "shutdown"; 233 + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; 234 + mbox-names = "vq0", "vq1", "shutdown", "detach"; 235 235 interrupt-parent = <&exti>; 236 236 interrupts = <68 1>; 237 237 status = "okay";

+610

arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi

··· 1 + // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 2 + /* 3 + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved 4 + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix 5 + * Copyright (C) 2023 Leonard Göhrs, Pengutronix 6 + */ 7 + 8 + #include "stm32mp15xc.dtsi" 9 + #include "stm32mp15xx-osd32.dtsi" 10 + #include "stm32mp15xxac-pinctrl.dtsi" 11 + 12 + #include <dt-bindings/gpio/gpio.h> 13 + #include <dt-bindings/input/input.h> 14 + #include <dt-bindings/leds/common.h> 15 + #include <dt-bindings/pwm/pwm.h> 16 + 17 + / { 18 + aliases { 19 + ethernet0 = &ethernet0; 20 + ethernet1 = &port_uplink; 21 + ethernet2 = &port_dut; 22 + mmc1 = &sdmmc2; 23 + serial0 = &uart4; 24 + serial1 = &usart3; 25 + }; 26 + 27 + chosen { 28 + stdout-path = &uart4; 29 + }; 30 + 31 + led-controller-0 { 32 + compatible = "gpio-leds"; 33 + 34 + led-0 { 35 + label = "tac:green:user1"; 36 + gpios = <&gpiof 10 GPIO_ACTIVE_HIGH>; 37 + linux,default-trigger = "heartbeat"; 38 + }; 39 + 40 + led-1 { 41 + label = "tac:green:user2"; 42 + gpios = <&gpiog 7 GPIO_ACTIVE_HIGH>; 43 + }; 44 + 45 + led-2 { 46 + label = "tac:green:statusdut"; 47 + gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; 48 + }; 49 + 50 + /* led-3 and led-4 are internally connected antiparallel to one 51 + * another inside the ethernet jack like this: 52 + * GPIOA14 ---+---|led-3|>--+--- GPIOD15 53 + * +--<|led-4|---+ 54 + * E.g. only one of the LEDs can be illuminated at a time while 55 + * the other output must be driven low. 56 + * This should likely be implemented using a multi color LED 57 + * driver for antiparallel LEDs. 58 + */ 59 + led-3 { 60 + label = "tac:green:statuslab"; 61 + gpios = <&gpioa 14 GPIO_ACTIVE_HIGH>; 62 + }; 63 + 64 + led-4 { 65 + label = "tac:orange:statuslab"; 66 + gpios = <&gpiod 15 GPIO_ACTIVE_HIGH>; 67 + }; 68 + }; 69 + 70 + gpio-keys { 71 + compatible = "gpio-keys"; 72 + 73 + button-lower { 74 + label = "USER_BTN2"; 75 + linux,code = <KEY_ESC>; 76 + gpios = <&gpioe 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 77 + }; 78 + 79 + button-upper { 80 + label = "USER_BTN"; 81 + linux,code = <KEY_HOME>; 82 + gpios = <&gpioi 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 83 + }; 84 + }; 85 + 86 + /* supplied by either barrel connector or PoE */ 87 + reg_12v: regulator-12v { 88 + compatible = "regulator-fixed"; 89 + regulator-name = "12V"; 90 + regulator-min-microvolt = <12000000>; 91 + regulator-max-microvolt = <12000000>; 92 + regulator-always-on; 93 + }; 94 + 95 + reg_5v: regulator-5v { 96 + compatible = "regulator-fixed"; 97 + regulator-name = "5V"; 98 + regulator-min-microvolt = <5000000>; 99 + regulator-max-microvolt = <5000000>; 100 + regulator-always-on; 101 + vin-supply = <&reg_12v>; 102 + }; 103 + 104 + reg_1v2: regulator-1v2 { 105 + compatible = "regulator-fixed"; 106 + regulator-name = "1V2"; 107 + regulator-min-microvolt = <1200000>; 108 + regulator-max-microvolt = <1200000>; 109 + regulator-always-on; 110 + vin-supply = <&reg_5v>; 111 + }; 112 + 113 + reg_pb_5v: regulator-pb-5v { 114 + compatible = "regulator-fixed"; 115 + regulator-name = "5V_POWERBOARD"; 116 + regulator-min-microvolt = <5000000>; 117 + regulator-max-microvolt = <5000000>; 118 + regulator-always-on; 119 + vin-supply = <&reg_5v>; 120 + }; 121 + 122 + reg_pb_3v3: regulator-pb-3v3 { 123 + compatible = "regulator-fixed"; 124 + regulator-name = "3V3_POWERBOARD"; 125 + regulator-min-microvolt = <3300000>; 126 + regulator-max-microvolt = <3300000>; 127 + regulator-always-on; 128 + vin-supply = <&reg_pb_5v>; 129 + }; 130 + 131 + output-iobus-12v { 132 + compatible = "regulator-output"; 133 + vout-supply = <&reg_iobus_12v>; 134 + }; 135 + 136 + output-vuart { 137 + compatible = "regulator-output"; 138 + vout-supply = <&v3v3_hdmi>; 139 + }; 140 + }; 141 + 142 + baseboard_eeprom: &sip_eeprom { 143 + }; 144 + 145 + &adc { 146 + pinctrl-names = "default"; 147 + pinctrl-0 = <&adc1_ain_pins_a>; 148 + vdd-supply = <&vdd>; 149 + vdda-supply = <&vdda>; 150 + vref-supply = <&vrefbuf>; 151 + status = "okay"; 152 + 153 + adc1: adc@0 { 154 + st,adc-channels = <0 1 2 5 9 10 13 15>; 155 + st,min-sample-time-nsecs = <5000>; 156 + #address-cells = <1>; 157 + #size-cells = <0>; 158 + status = "okay"; 159 + 160 + channel@0 { 161 + reg = <0>; 162 + label = "HOST_2_CURR_FB"; 163 + }; 164 + 165 + channel@1 { 166 + reg = <1>; 167 + label = "HOST_3_CURR_FB"; 168 + }; 169 + 170 + channel@2 { 171 + reg = <2>; 172 + label = "OUT_0_FB"; 173 + }; 174 + 175 + channel@5 { 176 + reg = <5>; 177 + label = "IOBUS_CURR_FB"; 178 + }; 179 + 180 + channel@9 { 181 + reg = <9>; 182 + label = "IOBUS_VOLT_FB"; 183 + }; 184 + 185 + channel@10 { 186 + reg = <10>; 187 + label = "OUT_1_FB"; 188 + }; 189 + 190 + channel@13 { 191 + reg = <13>; 192 + label = "HOST_CURR_FB"; 193 + }; 194 + 195 + channel@15 { 196 + reg = <15>; 197 + label = "HOST_1_CURR_FB"; 198 + }; 199 + }; 200 + 201 + adc2: adc@100 { 202 + st,adc-channels = <12>; 203 + st,min-sample-time-nsecs = <500000>; 204 + #address-cells = <1>; 205 + #size-cells = <0>; 206 + status = "okay"; 207 + 208 + channel@12 { 209 + reg = <12>; 210 + label = "TEMP_INTERNAL"; 211 + }; 212 + }; 213 + }; 214 + 215 + &crc1 { 216 + status = "okay"; 217 + }; 218 + 219 + &cryp1 { 220 + status = "okay"; 221 + }; 222 + 223 + &dts { 224 + status = "okay"; 225 + }; 226 + 227 + &ethernet0 { 228 + assigned-clocks = <&rcc ETHCK_K>, <&rcc PLL4_P>; 229 + assigned-clock-parents = <&rcc PLL4_P>; 230 + assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF */ 231 + 232 + pinctrl-names = "default", "sleep"; 233 + pinctrl-0 = <&ethernet0_rgmii_pins_e>; 234 + pinctrl-1 = <&ethernet0_rgmii_sleep_pins_e>; 235 + 236 + st,eth-clk-sel; 237 + phy-mode = "rgmii-id"; 238 + 239 + status = "okay"; 240 + 241 + fixed-link { 242 + speed = <1000>; 243 + full-duplex; 244 + }; 245 + }; 246 + 247 + &ethernet0_rgmii_pins_e { 248 + pins1 { 249 + /* Reduce EMI emission by reducing RGMII drive strength */ 250 + slew-rate = <1>; 251 + }; 252 + }; 253 + 254 + &gpiob { 255 + gpio-line-names = "", "", "", "", "", /* 0 */ 256 + "", "USB_RESET", "", "", "", /* 5 */ 257 + "", "", "", "", "", /* 10 */ 258 + ""; /* 15 */ 259 + }; 260 + 261 + &gpiod { 262 + gpio-line-names = "", "", "", "", "TP38", /* 0 */ 263 + "TP39", "", "", "TP41", "TP42", /* 5 */ 264 + "OLED_DC", "", "", "ETH_CS", "", /* 10 */ 265 + "ETH_LAB_LEDRN"; /* 15 */ 266 + }; 267 + 268 + &gpioe { 269 + gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /* 0 */ 270 + "", "", "USER_BTN2", "TP48", "UART_TX_EN", /* 5 */ 271 + "UART_RX_EN", "TP24", "", "TP25", "TP26", /* 10 */ 272 + "TP27"; /* 15 */ 273 + }; 274 + 275 + &gpiof { 276 + gpio-line-names = "TP36", "TP37", "", "", "OLED_CS", /* 0 */ 277 + "", "", "", "", "", /* 5 */ 278 + "USER_LED1", "", "STACK_CS0", "", "", /* 10 */ 279 + ""; /* 15 */ 280 + }; 281 + 282 + &gpiog { 283 + gpio-line-names = "ETH_RESET", "", "", "", "", /* 0 */ 284 + "IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /* 5 */ 285 + "TP49", "", "", "", "", /* 10 */ 286 + ""; /* 15 */ 287 + }; 288 + 289 + &gpioh { 290 + gpio-line-names = "", "", "OUT_1", "OUT_0", "OLED_RESET", /* 0 */ 291 + "", "", "", "", "", /* 5 */ 292 + "ETH1_PPS_B", "ETH_GPIO2", "", "IOBUS_PWR_EN", "", /* 10 */ 293 + "TP33"; /* 15 */ 294 + }; 295 + 296 + &gpioi { 297 + gpio-line-names = "TIM_RTS", "", "", "", "DEVICE_DATA_EN", /* 0 */ 298 + "", "", "", "ETH_WOL", "TP43", /* 5 */ 299 + "", "USER_BTN"; /* 10 */ 300 + }; 301 + 302 + &gpioz { 303 + gpio-line-names = "HWID0", "HWID1", "HWID2", "HWID3", "", /* 0 */ 304 + "", "HWID4", "HWID5"; /* 5 */ 305 + }; 306 + 307 + &hash1 { 308 + status = "okay"; 309 + }; 310 + 311 + &i2c1 { 312 + pinctrl-names = "default", "sleep"; 313 + pinctrl-0 = <&i2c1_pins_b>; 314 + pinctrl-1 = <&i2c1_sleep_pins_b>; 315 + status = "okay"; 316 + 317 + powerboard_eeprom: eeprom@50 { 318 + compatible = "atmel,24c02"; 319 + reg = <0x50>; 320 + vcc-supply = <&v3v3>; 321 + }; 322 + 323 + temperature-sensor@48 { 324 + compatible = "national,lm75a"; 325 + reg = <0x48>; 326 + status = "disabled"; 327 + }; 328 + }; 329 + 330 + &i2c5 { 331 + /delete-property/dmas; 332 + /delete-property/dma-names; 333 + 334 + pinctrl-names = "default", "sleep"; 335 + pinctrl-0 = <&i2c5_pins_b>; 336 + pinctrl-1 = <&i2c5_sleep_pins_b>; 337 + 338 + status = "okay"; 339 + 340 + usbhub: usbhub@2c { 341 + compatible ="microchip,usb2514b"; 342 + reg = <0x2c>; 343 + vdd-supply = <&v3v3>; 344 + reset-gpios = <&gpiob 6 GPIO_ACTIVE_LOW>; 345 + }; 346 + }; 347 + 348 + &iwdg2 { 349 + timeout-sec = <8>; 350 + status = "okay"; 351 + }; 352 + 353 + &m_can1 { 354 + pinctrl-names = "default", "sleep"; 355 + pinctrl-0 = <&m_can1_pins_b>; 356 + pinctrl-1 = <&m_can1_sleep_pins_b>; 357 + status = "okay"; 358 + }; 359 + 360 + &m_can2 { 361 + pinctrl-names = "default", "sleep"; 362 + pinctrl-0 = <&m_can2_pins_a>; 363 + pinctrl-1 = <&m_can2_sleep_pins_a>; 364 + status = "okay"; 365 + }; 366 + 367 + &pmic { 368 + regulators { 369 + buck1-supply = <&reg_5v>; /* VIN */ 370 + buck2-supply = <&reg_5v>; /* VIN */ 371 + buck3-supply = <&reg_5v>; /* VIN */ 372 + buck4-supply = <&reg_5v>; /* VIN */ 373 + ldo2-supply = <&reg_5v>; /* PMIC_LDO25IN */ 374 + ldo4-supply = <&reg_5v>; /* VIN */ 375 + ldo5-supply = <&reg_5v>; /* PMIC_LDO25IN */ 376 + vref_ddr-supply = <&reg_5v>; /* VIN */ 377 + boost-supply = <&reg_5v>; /* PMIC_BSTIN */ 378 + pwr_sw2-supply = <&bst_out>; /* PMIC_SWIN */ 379 + }; 380 + }; 381 + 382 + &pwr_regulators { 383 + vdd-supply = <&vdd>; 384 + vdd_3v3_usbfs-supply = <&vdd_usb>; 385 + }; 386 + 387 + &rtc { 388 + status = "okay"; 389 + }; 390 + 391 + &sdmmc2 { 392 + pinctrl-names = "default", "opendrain", "sleep"; 393 + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>; 394 + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>; 395 + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>; 396 + vmmc-supply = <&v3v3>; 397 + 398 + bus-width = <8>; 399 + mmc-ddr-3_3v; 400 + no-1-8-v; 401 + non-removable; 402 + no-sd; 403 + no-sdio; 404 + st,neg-edge; 405 + 406 + status = "okay"; 407 + }; 408 + 409 + &spi2 { 410 + pinctrl-names = "default"; 411 + pinctrl-0 = <&spi2_pins_c>; 412 + cs-gpios = <&gpiof 12 GPIO_ACTIVE_LOW>; 413 + status = "okay"; 414 + }; 415 + 416 + &spi4 { 417 + pinctrl-names = "default"; 418 + pinctrl-0 = <&spi4_pins_a>; 419 + cs-gpios = <&gpiof 4 GPIO_ACTIVE_LOW>; 420 + status = "okay"; 421 + 422 + lcd: display@0 { 423 + compatible = "shineworld,lh133k", "panel-mipi-dbi-spi"; 424 + reg = <0>; 425 + power-supply = <&v3v3>; 426 + io-supply = <&v3v3>; 427 + backlight = <&backlight>; 428 + dc-gpios = <&gpiod 10 GPIO_ACTIVE_HIGH>; 429 + reset-gpios = <&gpioh 4 GPIO_ACTIVE_HIGH>; 430 + spi-3wire; 431 + spi-max-frequency = <32000000>; 432 + 433 + width-mm = <23>; 434 + height-mm = <23>; 435 + rotation = <180>; 436 + 437 + panel-timing { 438 + hactive = <240>; 439 + vactive = <240>; 440 + hback-porch = <0>; 441 + vback-porch = <0>; 442 + 443 + clock-frequency = <0>; 444 + hfront-porch = <0>; 445 + hsync-len = <0>; 446 + vfront-porch = <0>; 447 + vsync-len = <0>; 448 + }; 449 + }; 450 + }; 451 + 452 + &spi5 { 453 + pinctrl-names = "default"; 454 + pinctrl-0 = <&spi5_pins_a>; 455 + 456 + /* spare dmas for other usage */ 457 + /delete-property/dmas; 458 + /delete-property/dma-names; 459 + 460 + cs-gpios = <&gpiod 13 GPIO_ACTIVE_LOW>; 461 + 462 + status = "okay"; 463 + 464 + switch: switch@0 { 465 + compatible = "microchip,ksz9563"; 466 + reg = <0>; 467 + 468 + reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>; 469 + spi-max-frequency = <44000000>; 470 + 471 + interrupt-parent = <&gpioa>; 472 + interrupts = <6 IRQ_TYPE_EDGE_RISING>; 473 + 474 + ports { 475 + #address-cells = <1>; 476 + #size-cells = <0>; 477 + port_dut: port@0 { 478 + reg = <0>; 479 + label = "dut"; 480 + }; 481 + 482 + port_uplink: port@1 { 483 + reg = <1>; 484 + label = "uplink"; 485 + }; 486 + 487 + port_cpu: port@2 { 488 + reg = <2>; 489 + label = "cpu"; 490 + 491 + ethernet = <&ethernet0>; 492 + 493 + phy-mode = "rgmii-id"; 494 + rx-internal-delay-ps = <2000>; 495 + tx-internal-delay-ps = <2000>; 496 + 497 + fixed-link { 498 + speed = <1000>; 499 + full-duplex; 500 + }; 501 + }; 502 + }; 503 + }; 504 + }; 505 + 506 + &timers2 { 507 + /* spare dmas for other usage */ 508 + /delete-property/dmas; 509 + /delete-property/dma-names; 510 + 511 + status = "okay"; 512 + 513 + timer@1 { 514 + status = "okay"; 515 + }; 516 + }; 517 + 518 + &timers3 { 519 + /* spare dmas for other usage */ 520 + /delete-property/dmas; 521 + /delete-property/dma-names; 522 + 523 + status = "okay"; 524 + 525 + timer@2 { 526 + status = "okay"; 527 + }; 528 + }; 529 + 530 + &timers4 { 531 + /* spare dmas for other usage */ 532 + /delete-property/dmas; 533 + /delete-property/dma-names; 534 + 535 + status = "okay"; 536 + 537 + timer@3 { 538 + status = "okay"; 539 + }; 540 + }; 541 + 542 + &uart4 { 543 + label = "debug"; 544 + 545 + pinctrl-names = "default"; 546 + pinctrl-0 = <&uart4_pins_a>; 547 + 548 + /* spare dmas for other usage */ 549 + /delete-property/dmas; 550 + /delete-property/dma-names; 551 + 552 + status = "okay"; 553 + }; 554 + 555 + &usart3 { 556 + label = "dut"; 557 + uart-has-rtscts; 558 + 559 + pinctrl-names = "default"; 560 + pinctrl-0 = <&usart3_pins_f>; 561 + 562 + /* spare dmas for other usage */ 563 + /delete-property/dmas; 564 + /delete-property/dma-names; 565 + 566 + status = "okay"; 567 + }; 568 + 569 + &usbh_ehci { 570 + phys = <&usbphyc_port0>; 571 + phy-names = "usb"; 572 + 573 + status = "okay"; 574 + }; 575 + 576 + &usbotg_hs { 577 + phys = <&usbphyc_port1 0>; 578 + phy-names = "usb2-phy"; 579 + 580 + vusb_d-supply = <&vdd_usb>; 581 + vusb_a-supply = <&reg18>; 582 + 583 + dr_mode = "peripheral"; 584 + 585 + status = "okay"; 586 + }; 587 + 588 + &usbphyc { 589 + status = "okay"; 590 + }; 591 + 592 + &usbphyc_port0 { 593 + phy-supply = <&vdd_usb>; 594 + }; 595 + 596 + &usbphyc_port1 { 597 + phy-supply = <&vdd_usb>; 598 + }; 599 + 600 + &v3v3_hdmi { 601 + /delete-property/regulator-always-on; 602 + }; 603 + 604 + &vrefbuf { 605 + regulator-min-microvolt = <2500000>; 606 + regulator-max-microvolt = <2500000>; 607 + vdda-supply = <&vdda>; 608 + 609 + status = "okay"; 610 + };

+2 -2

arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi

··· 416 416 &m4_rproc { 417 417 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, 418 418 <&vdev0vring1>, <&vdev0buffer>; 419 - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; 420 - mbox-names = "vq0", "vq1", "shutdown"; 419 + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; 420 + mbox-names = "vq0", "vq1", "shutdown", "detach"; 421 421 interrupt-parent = <&exti>; 422 422 interrupts = <68 1>; 423 423 status = "okay";

+2 -2

arch/arm/boot/dts/st/stm32mp15xx-dhcor-som.dtsi

··· 227 227 &m4_rproc { 228 228 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, 229 229 <&vdev0vring1>, <&vdev0buffer>; 230 - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; 231 - mbox-names = "vq0", "vq1", "shutdown"; 230 + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; 231 + mbox-names = "vq0", "vq1", "shutdown", "detach"; 232 232 interrupt-parent = <&exti>; 233 233 interrupts = <68 1>; 234 234 status = "okay";

+42

include/dt-bindings/regulator/st,stm32mp13-regulator.h

··· 1 + /* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */ 2 + /* 3 + * Copyright (C) 2022, STMicroelectronics - All Rights Reserved 4 + */ 5 + 6 + #ifndef __DT_BINDINGS_REGULATOR_ST_STM32MP13_REGULATOR_H 7 + #define __DT_BINDINGS_REGULATOR_ST_STM32MP13_REGULATOR_H 8 + 9 + /* SCMI voltage domains identifiers */ 10 + 11 + /* SOC Internal regulators */ 12 + #define VOLTD_SCMI_REG11 0 13 + #define VOLTD_SCMI_REG18 1 14 + #define VOLTD_SCMI_USB33 2 15 + #define VOLTD_SCMI_SDMMC1_IO 3 16 + #define VOLTD_SCMI_SDMMC2_IO 4 17 + #define VOLTD_SCMI_VREFBUF 5 18 + 19 + /* STPMIC1 regulators */ 20 + #define VOLTD_SCMI_STPMIC1_BUCK1 6 21 + #define VOLTD_SCMI_STPMIC1_BUCK2 7 22 + #define VOLTD_SCMI_STPMIC1_BUCK3 8 23 + #define VOLTD_SCMI_STPMIC1_BUCK4 9 24 + #define VOLTD_SCMI_STPMIC1_LDO1 10 25 + #define VOLTD_SCMI_STPMIC1_LDO2 11 26 + #define VOLTD_SCMI_STPMIC1_LDO3 12 27 + #define VOLTD_SCMI_STPMIC1_LDO4 13 28 + #define VOLTD_SCMI_STPMIC1_LDO5 14 29 + #define VOLTD_SCMI_STPMIC1_LDO6 15 30 + #define VOLTD_SCMI_STPMIC1_VREFDDR 16 31 + #define VOLTD_SCMI_STPMIC1_BOOST 17 32 + #define VOLTD_SCMI_STPMIC1_PWR_SW1 18 33 + #define VOLTD_SCMI_STPMIC1_PWR_SW2 19 34 + 35 + /* External regulators */ 36 + #define VOLTD_SCMI_REGU0 20 37 + #define VOLTD_SCMI_REGU1 21 38 + #define VOLTD_SCMI_REGU2 22 39 + #define VOLTD_SCMI_REGU3 23 40 + #define VOLTD_SCMI_REGU4 24 41 + 42 + #endif /*__DT_BINDINGS_REGULATOR_ST_STM32MP13_REGULATOR_H */

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