Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'parisc-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parisc fixes from Helge Deller:
"This contains a kernel segfault fix when reading /proc/kpageflags or
/proc/kpagecount, two fixes for the serial port and PCI graphic card
support on C8000 workstations and a fix to use unshadowed registers
for flushing D- and I-caches."
* 'parisc-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
parisc: Use unshadowed index register for flush instructions in flush_dcache_page_asm and flush_icache_page_asm
parisc: provide pci_mmap_page_range() for parisc
parisc: fix serial ports on C8000 workstation
parisc: fix kernel BUG at arch/parisc/include/asm/mmzone.h:50 (part 2)
+147
-40
+2
-2
arch/parisc/include/asm/mmzone.h
+2
-2
arch/parisc/include/asm/mmzone.h
···
27
27
28
28
#define PFNNID_SHIFT (30 - PAGE_SHIFT)
29
29
#define PFNNID_MAP_MAX 512 /* support 512GB */
30
-
extern unsigned char pfnnid_map[PFNNID_MAP_MAX];
30
+
extern signed char pfnnid_map[PFNNID_MAP_MAX];
31
31
32
32
#ifndef CONFIG_64BIT
33
33
#define pfn_is_io(pfn) ((pfn & (0xf0000000UL >> PAGE_SHIFT)) == (0xf0000000UL >> PAGE_SHIFT))
···
46
46
i = pfn >> PFNNID_SHIFT;
47
47
BUG_ON(i >= ARRAY_SIZE(pfnnid_map));
48
48
49
-
return (int)pfnnid_map[i];
49
+
return pfnnid_map[i];
50
50
}
51
51
52
52
static inline int pfn_valid(int pfn)
+5
arch/parisc/include/asm/pci.h
+5
arch/parisc/include/asm/pci.h
+1
arch/parisc/kernel/hardware.c
+1
arch/parisc/kernel/hardware.c
···
1205
1205
{HPHW_FIO, 0x004, 0x00320, 0x0, "Metheus Frame Buffer"},
1206
1206
{HPHW_FIO, 0x004, 0x00340, 0x0, "BARCO CX4500 VME Grphx Cnsl"},
1207
1207
{HPHW_FIO, 0x004, 0x00360, 0x0, "Hughes TOG VME FDDI"},
1208
+
{HPHW_FIO, 0x076, 0x000AD, 0x00, "Crestone Peak RS-232"},
1208
1209
{HPHW_IOA, 0x185, 0x0000B, 0x00, "Java BC Summit Port"},
1209
1210
{HPHW_IOA, 0x1FF, 0x0000B, 0x00, "Hitachi Ghostview Summit Port"},
1210
1211
{HPHW_IOA, 0x580, 0x0000B, 0x10, "U2-IOA BC Runway Port"},
+36
-36
arch/parisc/kernel/pacache.S
+36
-36
arch/parisc/kernel/pacache.S
···
860
860
#endif
861
861
862
862
ldil L%dcache_stride, %r1
863
-
ldw R%dcache_stride(%r1), %r1
863
+
ldw R%dcache_stride(%r1), r31
864
864
865
865
#ifdef CONFIG_64BIT
866
866
depdi,z 1, 63-PAGE_SHIFT,1, %r25
···
868
868
depwi,z 1, 31-PAGE_SHIFT,1, %r25
869
869
#endif
870
870
add %r28, %r25, %r25
871
-
sub %r25, %r1, %r25
871
+
sub %r25, r31, %r25
872
872
873
873
874
-
1: fdc,m %r1(%r28)
875
-
fdc,m %r1(%r28)
876
-
fdc,m %r1(%r28)
877
-
fdc,m %r1(%r28)
878
-
fdc,m %r1(%r28)
879
-
fdc,m %r1(%r28)
880
-
fdc,m %r1(%r28)
881
-
fdc,m %r1(%r28)
882
-
fdc,m %r1(%r28)
883
-
fdc,m %r1(%r28)
884
-
fdc,m %r1(%r28)
885
-
fdc,m %r1(%r28)
886
-
fdc,m %r1(%r28)
887
-
fdc,m %r1(%r28)
888
-
fdc,m %r1(%r28)
874
+
1: fdc,m r31(%r28)
875
+
fdc,m r31(%r28)
876
+
fdc,m r31(%r28)
877
+
fdc,m r31(%r28)
878
+
fdc,m r31(%r28)
879
+
fdc,m r31(%r28)
880
+
fdc,m r31(%r28)
881
+
fdc,m r31(%r28)
882
+
fdc,m r31(%r28)
883
+
fdc,m r31(%r28)
884
+
fdc,m r31(%r28)
885
+
fdc,m r31(%r28)
886
+
fdc,m r31(%r28)
887
+
fdc,m r31(%r28)
888
+
fdc,m r31(%r28)
889
889
cmpb,COND(<<) %r28, %r25,1b
890
-
fdc,m %r1(%r28)
890
+
fdc,m r31(%r28)
891
891
892
892
sync
893
893
···
936
936
#endif
937
937
938
938
ldil L%icache_stride, %r1
939
-
ldw R%icache_stride(%r1), %r1
939
+
ldw R%icache_stride(%r1), %r31
940
940
941
941
#ifdef CONFIG_64BIT
942
942
depdi,z 1, 63-PAGE_SHIFT,1, %r25
···
944
944
depwi,z 1, 31-PAGE_SHIFT,1, %r25
945
945
#endif
946
946
add %r28, %r25, %r25
947
-
sub %r25, %r1, %r25
947
+
sub %r25, %r31, %r25
948
948
949
949
950
950
/* fic only has the type 26 form on PA1.1, requiring an
951
951
* explicit space specification, so use %sr4 */
952
-
1: fic,m %r1(%sr4,%r28)
953
-
fic,m %r1(%sr4,%r28)
954
-
fic,m %r1(%sr4,%r28)
955
-
fic,m %r1(%sr4,%r28)
956
-
fic,m %r1(%sr4,%r28)
957
-
fic,m %r1(%sr4,%r28)
958
-
fic,m %r1(%sr4,%r28)
959
-
fic,m %r1(%sr4,%r28)
960
-
fic,m %r1(%sr4,%r28)
961
-
fic,m %r1(%sr4,%r28)
962
-
fic,m %r1(%sr4,%r28)
963
-
fic,m %r1(%sr4,%r28)
964
-
fic,m %r1(%sr4,%r28)
965
-
fic,m %r1(%sr4,%r28)
966
-
fic,m %r1(%sr4,%r28)
952
+
1: fic,m %r31(%sr4,%r28)
953
+
fic,m %r31(%sr4,%r28)
954
+
fic,m %r31(%sr4,%r28)
955
+
fic,m %r31(%sr4,%r28)
956
+
fic,m %r31(%sr4,%r28)
957
+
fic,m %r31(%sr4,%r28)
958
+
fic,m %r31(%sr4,%r28)
959
+
fic,m %r31(%sr4,%r28)
960
+
fic,m %r31(%sr4,%r28)
961
+
fic,m %r31(%sr4,%r28)
962
+
fic,m %r31(%sr4,%r28)
963
+
fic,m %r31(%sr4,%r28)
964
+
fic,m %r31(%sr4,%r28)
965
+
fic,m %r31(%sr4,%r28)
966
+
fic,m %r31(%sr4,%r28)
967
967
cmpb,COND(<<) %r28, %r25,1b
968
-
fic,m %r1(%sr4,%r28)
968
+
fic,m %r31(%sr4,%r28)
969
969
970
970
sync
971
971
+27
arch/parisc/kernel/pci.c
+27
arch/parisc/kernel/pci.c
···
220
220
}
221
221
222
222
223
+
int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
224
+
enum pci_mmap_state mmap_state, int write_combine)
225
+
{
226
+
unsigned long prot;
227
+
228
+
/*
229
+
* I/O space can be accessed via normal processor loads and stores on
230
+
* this platform but for now we elect not to do this and portable
231
+
* drivers should not do this anyway.
232
+
*/
233
+
if (mmap_state == pci_mmap_io)
234
+
return -EINVAL;
235
+
236
+
if (write_combine)
237
+
return -EINVAL;
238
+
239
+
/*
240
+
* Ignore write-combine; for now only return uncached mappings.
241
+
*/
242
+
prot = pgprot_val(vma->vm_page_prot);
243
+
prot |= _PAGE_NO_CACHE;
244
+
vma->vm_page_prot = __pgprot(prot);
245
+
246
+
return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
247
+
vma->vm_end - vma->vm_start, vma->vm_page_prot);
248
+
}
249
+
223
250
/*
224
251
* A driver is enabling the device. We make sure that all the appropriate
225
252
* bits are set to allow the device to operate as the driver is expecting.
+1
-1
arch/parisc/mm/init.c
+1
-1
arch/parisc/mm/init.c
+66
drivers/parisc/iosapic.c
+66
drivers/parisc/iosapic.c
···
811
811
return pcidev->irq;
812
812
}
813
813
814
+
static struct iosapic_info *first_isi = NULL;
815
+
816
+
#ifdef CONFIG_64BIT
817
+
int iosapic_serial_irq(int num)
818
+
{
819
+
struct iosapic_info *isi = first_isi;
820
+
struct irt_entry *irte = NULL; /* only used if PAT PDC */
821
+
struct vector_info *vi;
822
+
int isi_line; /* line used by device */
823
+
824
+
/* lookup IRT entry for isi/slot/pin set */
825
+
irte = &irt_cell[num];
826
+
827
+
DBG_IRT("iosapic_serial_irq(): irte %p %x %x %x %x %x %x %x %x\n",
828
+
irte,
829
+
irte->entry_type,
830
+
irte->entry_length,
831
+
irte->polarity_trigger,
832
+
irte->src_bus_irq_devno,
833
+
irte->src_bus_id,
834
+
irte->src_seg_id,
835
+
irte->dest_iosapic_intin,
836
+
(u32) irte->dest_iosapic_addr);
837
+
isi_line = irte->dest_iosapic_intin;
838
+
839
+
/* get vector info for this input line */
840
+
vi = isi->isi_vector + isi_line;
841
+
DBG_IRT("iosapic_serial_irq: line %d vi 0x%p\n", isi_line, vi);
842
+
843
+
/* If this IRQ line has already been setup, skip it */
844
+
if (vi->irte)
845
+
goto out;
846
+
847
+
vi->irte = irte;
848
+
849
+
/*
850
+
* Allocate processor IRQ
851
+
*
852
+
* XXX/FIXME The txn_alloc_irq() code and related code should be
853
+
* moved to enable_irq(). That way we only allocate processor IRQ
854
+
* bits for devices that actually have drivers claiming them.
855
+
* Right now we assign an IRQ to every PCI device present,
856
+
* regardless of whether it's used or not.
857
+
*/
858
+
vi->txn_irq = txn_alloc_irq(8);
859
+
860
+
if (vi->txn_irq < 0)
861
+
panic("I/O sapic: couldn't get TXN IRQ\n");
862
+
863
+
/* enable_irq() will use txn_* to program IRdT */
864
+
vi->txn_addr = txn_alloc_addr(vi->txn_irq);
865
+
vi->txn_data = txn_alloc_data(vi->txn_irq);
866
+
867
+
vi->eoi_addr = isi->addr + IOSAPIC_REG_EOI;
868
+
vi->eoi_data = cpu_to_le32(vi->txn_data);
869
+
870
+
cpu_claim_irq(vi->txn_irq, &iosapic_interrupt_type, vi);
871
+
872
+
out:
873
+
874
+
return vi->txn_irq;
875
+
}
876
+
#endif
877
+
814
878
815
879
/*
816
880
** squirrel away the I/O Sapic Version
···
941
877
vip->irqline = (unsigned char) cnt;
942
878
vip->iosapic = isi;
943
879
}
880
+
if (!first_isi)
881
+
first_isi = isi;
944
882
return isi;
945
883
}
946
884
+9
-1
drivers/tty/serial/8250/8250_gsc.c
+9
-1
drivers/tty/serial/8250/8250_gsc.c
···
30
30
unsigned long address;
31
31
int err;
32
32
33
+
#ifdef CONFIG_64BIT
34
+
extern int iosapic_serial_irq(int cellnum);
35
+
if (!dev->irq && (dev->id.sversion == 0xad))
36
+
dev->irq = iosapic_serial_irq(dev->mod_index-1);
37
+
#endif
38
+
33
39
if (!dev->irq) {
34
40
/* We find some unattached serial ports by walking native
35
41
* busses. These should be silently ignored. Otherwise,
···
57
51
memset(&uart, 0, sizeof(uart));
58
52
uart.port.iotype = UPIO_MEM;
59
53
/* 7.272727MHz on Lasi. Assumed the same for Dino, Wax and Timi. */
60
-
uart.port.uartclk = 7272727;
54
+
uart.port.uartclk = (dev->id.sversion != 0xad) ?
55
+
7272727 : 1843200;
61
56
uart.port.mapbase = address;
62
57
uart.port.membase = ioremap_nocache(address, 16);
63
58
uart.port.irq = dev->irq;
···
80
73
{ HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x00075 },
81
74
{ HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x0008c },
82
75
{ HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x0008d },
76
+
{ HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x000ad },
83
77
{ 0 }
84
78
};
85
79