tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'gpio-v4.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO fixes from Linus Walleij:

- LP87565: set the proper output level for direction_output.

- stm32: fix the kernel build by selecting the hierarchical irqdomain
symbol properly - this happens to be done in the pin control
framework but whatever, it had dependencies to GPIO so we need to
apply it here.

- Select the hierarchical IRQ domain also for Xgene.

- Fix wakeups to work on MXC.

- Fix up the device tree binding on Exar that went astray, also add the
right bindings.

- Fix the unwanted events for edges from the library.

- Fix the unbalanced chanined IRQ on the Tegra.

* tag 'gpio-v4.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio:
gpio: tegra: fix unbalanced chained_irq_enter/exit
gpiolib: skip unwanted events, don't convert them to opposite edge
gpio: exar: Use correct property prefix and document bindings
gpio: gpio-mxc: Fix: higher 16 GPIOs usable as wake source
gpio: xgene-sb: select IRQ_DOMAIN_HIERARCHY
pinctrl: stm32: select IRQ_DOMAIN_HIERARCHY instead of depends on
gpio: lp87565: Set proper output level and direction for direction_output
MAINTAINERS: Add entry for Whiskey Cove PMIC GPIO driver

Linus Torvalds aab7761c ef9ca02b

+54 -37
+5
Documentation/devicetree/bindings/gpio/gpio-exar.txt
··· 1 + Exportable MPIO interface of Exar UART chips 2 + 3 + Required properties of the device: 4 + - exar,first-pin: first exportable pins (0..15) 5 + - ngpios: number of exportable pins (1..16)
+6
MAINTAINERS
··· 14218 14218 F: include/linux/watchdog.h 14219 14219 F: include/uapi/linux/watchdog.h 14220 14220 14221 + WHISKEYCOVE PMIC GPIO DRIVER 14222 + M: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> 14223 + L: linux-gpio@vger.kernel.org 14224 + S: Maintained 14225 + F: drivers/gpio/gpio-wcove.c 14226 + 14221 14227 WIIMOTE HID DRIVER 14222 14228 M: David Herrmann <dh.herrmann@googlemail.com> 14223 14229 L: linux-input@vger.kernel.org
+1
drivers/gpio/Kconfig
··· 504 504 depends on ARCH_XGENE && OF_GPIO 505 505 select GPIO_GENERIC 506 506 select GPIOLIB_IRQCHIP 507 + select IRQ_DOMAIN_HIERARCHY 507 508 help 508 509 This driver supports the GPIO block within the APM X-Gene 509 510 Standby Domain. Say yes here to enable the GPIO functionality.
+1 -1
drivers/gpio/gpio-exar.c
··· 132 132 if (!p) 133 133 return -ENOMEM; 134 134 135 - ret = device_property_read_u32(&pdev->dev, "linux,first-pin", 135 + ret = device_property_read_u32(&pdev->dev, "exar,first-pin", 136 136 &first_pin); 137 137 if (ret) 138 138 return ret;
+24 -22
drivers/gpio/gpio-lp87565.c
··· 26 26 struct regmap *map; 27 27 }; 28 28 29 + static int lp87565_gpio_get(struct gpio_chip *chip, unsigned int offset) 30 + { 31 + struct lp87565_gpio *gpio = gpiochip_get_data(chip); 32 + int ret, val; 33 + 34 + ret = regmap_read(gpio->map, LP87565_REG_GPIO_IN, &val); 35 + if (ret < 0) 36 + return ret; 37 + 38 + return !!(val & BIT(offset)); 39 + } 40 + 41 + static void lp87565_gpio_set(struct gpio_chip *chip, unsigned int offset, 42 + int value) 43 + { 44 + struct lp87565_gpio *gpio = gpiochip_get_data(chip); 45 + 46 + regmap_update_bits(gpio->map, LP87565_REG_GPIO_OUT, 47 + BIT(offset), value ? BIT(offset) : 0); 48 + } 49 + 29 50 static int lp87565_gpio_get_direction(struct gpio_chip *chip, 30 51 unsigned int offset) 31 52 { ··· 75 54 { 76 55 struct lp87565_gpio *gpio = gpiochip_get_data(chip); 77 56 57 + lp87565_gpio_set(chip, offset, value); 58 + 78 59 return regmap_update_bits(gpio->map, 79 60 LP87565_REG_GPIO_CONFIG, 80 - BIT(offset), !value ? BIT(offset) : 0); 81 - } 82 - 83 - static int lp87565_gpio_get(struct gpio_chip *chip, unsigned int offset) 84 - { 85 - struct lp87565_gpio *gpio = gpiochip_get_data(chip); 86 - int ret, val; 87 - 88 - ret = regmap_read(gpio->map, LP87565_REG_GPIO_IN, &val); 89 - if (ret < 0) 90 - return ret; 91 - 92 - return !!(val & BIT(offset)); 93 - } 94 - 95 - static void lp87565_gpio_set(struct gpio_chip *chip, unsigned int offset, 96 - int value) 97 - { 98 - struct lp87565_gpio *gpio = gpiochip_get_data(chip); 99 - 100 - regmap_update_bits(gpio->map, LP87565_REG_GPIO_OUT, 101 - BIT(offset), value ? BIT(offset) : 0); 61 + BIT(offset), BIT(offset)); 102 62 } 103 63 104 64 static int lp87565_gpio_request(struct gpio_chip *gc, unsigned int offset)
+3
drivers/gpio/gpio-mxc.c
··· 424 424 return PTR_ERR(port->base); 425 425 426 426 port->irq_high = platform_get_irq(pdev, 1); 427 + if (port->irq_high < 0) 428 + port->irq_high = 0; 429 + 427 430 port->irq = platform_get_irq(pdev, 0); 428 431 if (port->irq < 0) 429 432 return port->irq;
+3 -3
drivers/gpio/gpio-tegra.c
··· 360 360 { 361 361 int port; 362 362 int pin; 363 - int unmasked = 0; 363 + bool unmasked = false; 364 364 int gpio; 365 365 u32 lvl; 366 366 unsigned long sta; ··· 384 384 * before executing the handler so that we don't 385 385 * miss edges 386 386 */ 387 - if (lvl & (0x100 << pin)) { 388 - unmasked = 1; 387 + if (!unmasked && lvl & (0x100 << pin)) { 388 + unmasked = true; 389 389 chained_irq_exit(chip, desc); 390 390 } 391 391
+4 -5
drivers/gpio/gpiolib.c
··· 704 704 { 705 705 struct lineevent_state *le = p; 706 706 struct gpioevent_data ge; 707 - int ret; 707 + int ret, level; 708 708 709 709 ge.timestamp = ktime_get_real_ns(); 710 + level = gpiod_get_value_cansleep(le->desc); 710 711 711 712 if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE 712 713 && le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) { 713 - int level = gpiod_get_value_cansleep(le->desc); 714 - 715 714 if (level) 716 715 /* Emit low-to-high event */ 717 716 ge.id = GPIOEVENT_EVENT_RISING_EDGE; 718 717 else 719 718 /* Emit high-to-low event */ 720 719 ge.id = GPIOEVENT_EVENT_FALLING_EDGE; 721 - } else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE) { 720 + } else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE && level) { 722 721 /* Emit low-to-high event */ 723 722 ge.id = GPIOEVENT_EVENT_RISING_EDGE; 724 - } else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) { 723 + } else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE && !level) { 725 724 /* Emit high-to-low event */ 726 725 ge.id = GPIOEVENT_EVENT_FALLING_EDGE; 727 726 } else {
+5 -4
drivers/pinctrl/stm32/Kconfig
··· 6 6 select PINMUX 7 7 select GENERIC_PINCONF 8 8 select GPIOLIB 9 + select IRQ_DOMAIN_HIERARCHY 9 10 select MFD_SYSCON 10 11 11 12 config PINCTRL_STM32F429 12 13 bool "STMicroelectronics STM32F429 pin control" if COMPILE_TEST && !MACH_STM32F429 13 - depends on OF && IRQ_DOMAIN_HIERARCHY 14 + depends on OF 14 15 default MACH_STM32F429 15 16 select PINCTRL_STM32 16 17 17 18 config PINCTRL_STM32F469 18 19 bool "STMicroelectronics STM32F469 pin control" if COMPILE_TEST && !MACH_STM32F469 19 - depends on OF && IRQ_DOMAIN_HIERARCHY 20 + depends on OF 20 21 default MACH_STM32F469 21 22 select PINCTRL_STM32 22 23 23 24 config PINCTRL_STM32F746 24 25 bool "STMicroelectronics STM32F746 pin control" if COMPILE_TEST && !MACH_STM32F746 25 - depends on OF && IRQ_DOMAIN_HIERARCHY 26 + depends on OF 26 27 default MACH_STM32F746 27 28 select PINCTRL_STM32 28 29 29 30 config PINCTRL_STM32H743 30 31 bool "STMicroelectronics STM32H743 pin control" if COMPILE_TEST && !MACH_STM32H743 31 - depends on OF && IRQ_DOMAIN_HIERARCHY 32 + depends on OF 32 33 default MACH_STM32H743 33 34 select PINCTRL_STM32 34 35 endif
+2 -2
drivers/tty/serial/8250/8250_exar.c
··· 261 261 } 262 262 263 263 static const struct property_entry exar_gpio_properties[] = { 264 - PROPERTY_ENTRY_U32("linux,first-pin", 0), 264 + PROPERTY_ENTRY_U32("exar,first-pin", 0), 265 265 PROPERTY_ENTRY_U32("ngpios", 16), 266 266 { } 267 267 }; ··· 326 326 } 327 327 328 328 static const struct property_entry iot2040_gpio_properties[] = { 329 - PROPERTY_ENTRY_U32("linux,first-pin", 10), 329 + PROPERTY_ENTRY_U32("exar,first-pin", 10), 330 330 PROPERTY_ENTRY_U32("ngpios", 1), 331 331 { } 332 332 };