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Merge git://git.infradead.org/mtd-2.6

* git://git.infradead.org/mtd-2.6:
[MTD] Use SEEK_{SET,CUR,END} instead of hardcoded values in mtdchar lseek()
MTD: Fix bug in fixup_convert_atmel_pri
[JFFS2][SUMMARY] Fix a summary collecting bug.
[PATCH] [MTD] DEVICES: Fill more device IDs in the structure of m25p80
MTD: Add lock/unlock operations for Atmel AT49BV6416
MTD: Convert Atmel PRI information to AMD format
fs/jffs2/xattr.c: remove dead code
[PATCH] [MTD] Maps: Add dependency on alternate probe methods to physmap
[PATCH] MTD: Add Macronix MX29F040 to JEDEC
[MTD] Fixes of performance and stability issues in CFI driver.
block2mtd.c: Make kernel boot command line arguments work (try 4)
[MTD NAND] Fix lookup error in nand_get_flash_type()
remove #error on !PCI from pmc551.c
MTD: [NAND] Fix the sharpsl driver after breakage from a core conversion
[MTD] NAND: OOB buffer offset fixups
make fs/jffs2/nodelist.c:jffs2_obsolete_node_frag() static
[PATCH] [MTD] NAND: fix dead URL in Kconfig

+271 -103
+43 -44
drivers/mtd/chips/cfi_cmdset_0001.c
··· 908 908 909 909 static int __xipram xip_wait_for_operation( 910 910 struct map_info *map, struct flchip *chip, 911 - unsigned long adr, int *chip_op_time ) 911 + unsigned long adr, unsigned int chip_op_time ) 912 912 { 913 913 struct cfi_private *cfi = map->fldrv_priv; 914 914 struct cfi_pri_intelext *cfip = cfi->cmdset_priv; ··· 917 917 flstate_t oldstate, newstate; 918 918 919 919 start = xip_currtime(); 920 - usec = *chip_op_time * 8; 920 + usec = chip_op_time * 8; 921 921 if (usec == 0) 922 922 usec = 500000; 923 923 done = 0; ··· 1027 1027 #define XIP_INVAL_CACHED_RANGE(map, from, size) \ 1028 1028 INVALIDATE_CACHED_RANGE(map, from, size) 1029 1029 1030 - #define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, p_usec) \ 1031 - xip_wait_for_operation(map, chip, cmd_adr, p_usec) 1030 + #define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, usec) \ 1031 + xip_wait_for_operation(map, chip, cmd_adr, usec) 1032 1032 1033 1033 #else 1034 1034 ··· 1040 1040 static int inval_cache_and_wait_for_operation( 1041 1041 struct map_info *map, struct flchip *chip, 1042 1042 unsigned long cmd_adr, unsigned long inval_adr, int inval_len, 1043 - int *chip_op_time ) 1043 + unsigned int chip_op_time) 1044 1044 { 1045 1045 struct cfi_private *cfi = map->fldrv_priv; 1046 1046 map_word status, status_OK = CMD(0x80); 1047 - int z, chip_state = chip->state; 1048 - unsigned long timeo; 1047 + int chip_state = chip->state; 1048 + unsigned int timeo, sleep_time; 1049 1049 1050 1050 spin_unlock(chip->mutex); 1051 1051 if (inval_len) 1052 1052 INVALIDATE_CACHED_RANGE(map, inval_adr, inval_len); 1053 - if (*chip_op_time) 1054 - cfi_udelay(*chip_op_time); 1055 1053 spin_lock(chip->mutex); 1056 1054 1057 - timeo = *chip_op_time * 8 * HZ / 1000000; 1058 - if (timeo < HZ/2) 1059 - timeo = HZ/2; 1060 - timeo += jiffies; 1055 + /* set our timeout to 8 times the expected delay */ 1056 + timeo = chip_op_time * 8; 1057 + if (!timeo) 1058 + timeo = 500000; 1059 + sleep_time = chip_op_time / 2; 1061 1060 1062 - z = 0; 1063 1061 for (;;) { 1064 - if (chip->state != chip_state) { 1065 - /* Someone's suspended the operation: sleep */ 1066 - DECLARE_WAITQUEUE(wait, current); 1067 - 1068 - set_current_state(TASK_UNINTERRUPTIBLE); 1069 - add_wait_queue(&chip->wq, &wait); 1070 - spin_unlock(chip->mutex); 1071 - schedule(); 1072 - remove_wait_queue(&chip->wq, &wait); 1073 - timeo = jiffies + (HZ / 2); /* FIXME */ 1074 - spin_lock(chip->mutex); 1075 - continue; 1076 - } 1077 - 1078 1062 status = map_read(map, cmd_adr); 1079 1063 if (map_word_andequal(map, status, status_OK, status_OK)) 1080 1064 break; 1081 1065 1082 - /* OK Still waiting */ 1083 - if (time_after(jiffies, timeo)) { 1066 + if (!timeo) { 1084 1067 map_write(map, CMD(0x70), cmd_adr); 1085 1068 chip->state = FL_STATUS; 1086 1069 return -ETIME; 1087 1070 } 1088 1071 1089 - /* Latency issues. Drop the lock, wait a while and retry */ 1090 - z++; 1072 + /* OK Still waiting. Drop the lock, wait a while and retry. */ 1091 1073 spin_unlock(chip->mutex); 1092 - cfi_udelay(1); 1074 + if (sleep_time >= 1000000/HZ) { 1075 + /* 1076 + * Half of the normal delay still remaining 1077 + * can be performed with a sleeping delay instead 1078 + * of busy waiting. 1079 + */ 1080 + msleep(sleep_time/1000); 1081 + timeo -= sleep_time; 1082 + sleep_time = 1000000/HZ; 1083 + } else { 1084 + udelay(1); 1085 + cond_resched(); 1086 + timeo--; 1087 + } 1093 1088 spin_lock(chip->mutex); 1094 - } 1095 1089 1096 - if (!z) { 1097 - if (!--(*chip_op_time)) 1098 - *chip_op_time = 1; 1099 - } else if (z > 1) 1100 - ++(*chip_op_time); 1090 + if (chip->state != chip_state) { 1091 + /* Someone's suspended the operation: sleep */ 1092 + DECLARE_WAITQUEUE(wait, current); 1093 + set_current_state(TASK_UNINTERRUPTIBLE); 1094 + add_wait_queue(&chip->wq, &wait); 1095 + spin_unlock(chip->mutex); 1096 + schedule(); 1097 + remove_wait_queue(&chip->wq, &wait); 1098 + spin_lock(chip->mutex); 1099 + } 1100 + } 1101 1101 1102 1102 /* Done and happy. */ 1103 1103 chip->state = FL_STATUS; ··· 1107 1107 #endif 1108 1108 1109 1109 #define WAIT_TIMEOUT(map, chip, adr, udelay) \ 1110 - ({ int __udelay = (udelay); \ 1111 - INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, &__udelay); }) 1110 + INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, udelay); 1112 1111 1113 1112 1114 1113 static int do_point_onechip (struct map_info *map, struct flchip *chip, loff_t adr, size_t len) ··· 1331 1332 1332 1333 ret = INVAL_CACHE_AND_WAIT(map, chip, adr, 1333 1334 adr, map_bankwidth(map), 1334 - &chip->word_write_time); 1335 + chip->word_write_time); 1335 1336 if (ret) { 1336 1337 xip_enable(map, chip, adr); 1337 1338 printk(KERN_ERR "%s: word write error (status timeout)\n", map->name); ··· 1568 1569 1569 1570 ret = INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, 1570 1571 adr, len, 1571 - &chip->buffer_write_time); 1572 + chip->buffer_write_time); 1572 1573 if (ret) { 1573 1574 map_write(map, CMD(0x70), cmd_adr); 1574 1575 chip->state = FL_STATUS; ··· 1703 1704 1704 1705 ret = INVAL_CACHE_AND_WAIT(map, chip, adr, 1705 1706 adr, len, 1706 - &chip->erase_time); 1707 + chip->erase_time); 1707 1708 if (ret) { 1708 1709 map_write(map, CMD(0x70), adr); 1709 1710 chip->state = FL_STATUS;
+111
drivers/mtd/chips/cfi_cmdset_0002.c
··· 45 45 #define MAX_WORD_RETRIES 3 46 46 47 47 #define MANUFACTURER_AMD 0x0001 48 + #define MANUFACTURER_ATMEL 0x001F 48 49 #define MANUFACTURER_SST 0x00BF 49 50 #define SST49LF004B 0x0060 50 51 #define SST49LF008A 0x005a 52 + #define AT49BV6416 0x00d6 51 53 52 54 static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); 53 55 static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); ··· 69 67 static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr, int mode); 70 68 static void put_chip(struct map_info *map, struct flchip *chip, unsigned long adr); 71 69 #include "fwh_lock.h" 70 + 71 + static int cfi_atmel_lock(struct mtd_info *mtd, loff_t ofs, size_t len); 72 + static int cfi_atmel_unlock(struct mtd_info *mtd, loff_t ofs, size_t len); 72 73 73 74 static struct mtd_chip_driver cfi_amdstd_chipdrv = { 74 75 .probe = NULL, /* Not usable directly */ ··· 166 161 } 167 162 } 168 163 164 + /* Atmel chips don't use the same PRI format as AMD chips */ 165 + static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) 166 + { 167 + struct map_info *map = mtd->priv; 168 + struct cfi_private *cfi = map->fldrv_priv; 169 + struct cfi_pri_amdstd *extp = cfi->cmdset_priv; 170 + struct cfi_pri_atmel atmel_pri; 171 + 172 + memcpy(&atmel_pri, extp, sizeof(atmel_pri)); 173 + memset((char *)extp + 5, 0, sizeof(*extp) - 5); 174 + 175 + if (atmel_pri.Features & 0x02) 176 + extp->EraseSuspend = 2; 177 + 178 + if (atmel_pri.BottomBoot) 179 + extp->TopBottom = 2; 180 + else 181 + extp->TopBottom = 3; 182 + } 183 + 169 184 static void fixup_use_secsi(struct mtd_info *mtd, void *param) 170 185 { 171 186 /* Setup for chips with a secsi area */ ··· 204 179 205 180 } 206 181 182 + /* 183 + * Some Atmel chips (e.g. the AT49BV6416) power-up with all sectors 184 + * locked by default. 185 + */ 186 + static void fixup_use_atmel_lock(struct mtd_info *mtd, void *param) 187 + { 188 + mtd->lock = cfi_atmel_lock; 189 + mtd->unlock = cfi_atmel_unlock; 190 + } 191 + 207 192 static struct cfi_fixup cfi_fixup_table[] = { 208 193 #ifdef AMD_BOOTLOC_BUG 209 194 { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL }, ··· 227 192 #if !FORCE_WORD_WRITE 228 193 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, }, 229 194 #endif 195 + { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, 230 196 { 0, 0, NULL, NULL } 231 197 }; 232 198 static struct cfi_fixup jedec_fixup_table[] = { ··· 243 207 * we know that is the case. 244 208 */ 245 209 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_erase_chip, NULL }, 210 + { CFI_MFR_ATMEL, AT49BV6416, fixup_use_atmel_lock, NULL }, 246 211 { 0, 0, NULL, NULL } 247 212 }; 248 213 ··· 1642 1605 mtd_erase_callback(instr); 1643 1606 1644 1607 return 0; 1608 + } 1609 + 1610 + static int do_atmel_lock(struct map_info *map, struct flchip *chip, 1611 + unsigned long adr, int len, void *thunk) 1612 + { 1613 + struct cfi_private *cfi = map->fldrv_priv; 1614 + int ret; 1615 + 1616 + spin_lock(chip->mutex); 1617 + ret = get_chip(map, chip, adr + chip->start, FL_LOCKING); 1618 + if (ret) 1619 + goto out_unlock; 1620 + chip->state = FL_LOCKING; 1621 + 1622 + DEBUG(MTD_DEBUG_LEVEL3, "MTD %s(): LOCK 0x%08lx len %d\n", 1623 + __func__, adr, len); 1624 + 1625 + cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, 1626 + cfi->device_type, NULL); 1627 + cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, 1628 + cfi->device_type, NULL); 1629 + cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi, 1630 + cfi->device_type, NULL); 1631 + cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, 1632 + cfi->device_type, NULL); 1633 + cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, 1634 + cfi->device_type, NULL); 1635 + map_write(map, CMD(0x40), chip->start + adr); 1636 + 1637 + chip->state = FL_READY; 1638 + put_chip(map, chip, adr + chip->start); 1639 + ret = 0; 1640 + 1641 + out_unlock: 1642 + spin_unlock(chip->mutex); 1643 + return ret; 1644 + } 1645 + 1646 + static int do_atmel_unlock(struct map_info *map, struct flchip *chip, 1647 + unsigned long adr, int len, void *thunk) 1648 + { 1649 + struct cfi_private *cfi = map->fldrv_priv; 1650 + int ret; 1651 + 1652 + spin_lock(chip->mutex); 1653 + ret = get_chip(map, chip, adr + chip->start, FL_UNLOCKING); 1654 + if (ret) 1655 + goto out_unlock; 1656 + chip->state = FL_UNLOCKING; 1657 + 1658 + DEBUG(MTD_DEBUG_LEVEL3, "MTD %s(): LOCK 0x%08lx len %d\n", 1659 + __func__, adr, len); 1660 + 1661 + cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, 1662 + cfi->device_type, NULL); 1663 + map_write(map, CMD(0x70), adr); 1664 + 1665 + chip->state = FL_READY; 1666 + put_chip(map, chip, adr + chip->start); 1667 + ret = 0; 1668 + 1669 + out_unlock: 1670 + spin_unlock(chip->mutex); 1671 + return ret; 1672 + } 1673 + 1674 + static int cfi_atmel_lock(struct mtd_info *mtd, loff_t ofs, size_t len) 1675 + { 1676 + return cfi_varsize_frob(mtd, do_atmel_lock, ofs, len, NULL); 1677 + } 1678 + 1679 + static int cfi_atmel_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) 1680 + { 1681 + return cfi_varsize_frob(mtd, do_atmel_unlock, ofs, len, NULL); 1645 1682 } 1646 1683 1647 1684
+14
drivers/mtd/chips/jedec_probe.c
··· 111 111 #define MX29LV040C 0x004F 112 112 #define MX29LV160T 0x22C4 113 113 #define MX29LV160B 0x2249 114 + #define MX29F040 0x00A4 114 115 #define MX29F016 0x00AD 115 116 #define MX29F002T 0x00B0 116 117 #define MX29F004T 0x0045 ··· 1172 1171 ERASEINFO(0x10000,31) 1173 1172 } 1174 1173 }, { 1174 + .mfr_id = MANUFACTURER_MACRONIX, 1175 + .dev_id = MX29F040, 1176 + .name = "Macronix MX29F040", 1177 + .uaddr = { 1178 + [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ 1179 + }, 1180 + .DevSize = SIZE_512KiB, 1181 + .CmdSet = P_ID_AMD_STD, 1182 + .NumEraseRegions= 1, 1183 + .regions = { 1184 + ERASEINFO(0x10000,8), 1185 + } 1186 + }, { 1175 1187 .mfr_id = MANUFACTURER_MACRONIX, 1176 1188 .dev_id = MX29F016, 1177 1189 .name = "Macronix MX29F016",
+63 -30
drivers/mtd/devices/block2mtd.c
··· 18 18 #include <linux/mtd/mtd.h> 19 19 #include <linux/buffer_head.h> 20 20 #include <linux/mutex.h> 21 + #include <linux/mount.h> 21 22 22 23 #define VERSION "$Revision: 1.30 $" 23 24 ··· 237 236 } 238 237 return 0; 239 238 } 239 + 240 + 240 241 static int block2mtd_write(struct mtd_info *mtd, loff_t to, size_t len, 241 242 size_t *retlen, const u_char *buf) 242 243 { ··· 302 299 303 300 /* Get a handle on the device */ 304 301 bdev = open_bdev_excl(devname, O_RDWR, NULL); 302 + #ifndef MODULE 303 + if (IS_ERR(bdev)) { 304 + 305 + /* We might not have rootfs mounted at this point. Try 306 + to resolve the device name by other means. */ 307 + 308 + dev_t dev = name_to_dev_t(devname); 309 + if (dev != 0) { 310 + bdev = open_by_devnum(dev, FMODE_WRITE | FMODE_READ); 311 + } 312 + } 313 + #endif 314 + 305 315 if (IS_ERR(bdev)) { 306 316 ERROR("error: cannot open device %s", devname); 307 317 goto devinit_err; ··· 409 393 } 410 394 411 395 412 - static int parse_name(char **pname, const char *token, size_t limit) 413 - { 414 - size_t len; 415 - char *name; 416 - 417 - len = strlen(token) + 1; 418 - if (len > limit) 419 - return -ENOSPC; 420 - 421 - name = kmalloc(len, GFP_KERNEL); 422 - if (!name) 423 - return -ENOMEM; 424 - 425 - strcpy(name, token); 426 - 427 - *pname = name; 428 - return 0; 429 - } 430 - 431 - 432 396 static inline void kill_final_newline(char *str) 433 397 { 434 398 char *newline = strrchr(str, '\n'); ··· 422 426 return 0; \ 423 427 } while (0) 424 428 425 - static int block2mtd_setup(const char *val, struct kernel_param *kp) 429 + #ifndef MODULE 430 + static int block2mtd_init_called = 0; 431 + static __initdata char block2mtd_paramline[80 + 12]; /* 80 for device, 12 for erase size */ 432 + #endif 433 + 434 + 435 + static int block2mtd_setup2(const char *val) 426 436 { 427 - char buf[80+12]; /* 80 for device, 12 for erase size */ 437 + char buf[80 + 12]; /* 80 for device, 12 for erase size */ 428 438 char *str = buf; 429 439 char *token[2]; 430 440 char *name; ··· 452 450 if (!token[0]) 453 451 parse_err("no argument"); 454 452 455 - ret = parse_name(&name, token[0], 80); 456 - if (ret == -ENOMEM) 457 - parse_err("out of memory"); 458 - if (ret == -ENOSPC) 459 - parse_err("name too long"); 460 - if (ret) 461 - return 0; 453 + name = token[0]; 454 + if (strlen(name) + 1 > 80) 455 + parse_err("device name too long"); 462 456 463 457 if (token[1]) { 464 458 ret = parse_num(&erase_size, token[1]); ··· 470 472 } 471 473 472 474 475 + static int block2mtd_setup(const char *val, struct kernel_param *kp) 476 + { 477 + #ifdef MODULE 478 + return block2mtd_setup2(val); 479 + #else 480 + /* If more parameters are later passed in via 481 + /sys/module/block2mtd/parameters/block2mtd 482 + and block2mtd_init() has already been called, 483 + we can parse the argument now. */ 484 + 485 + if (block2mtd_init_called) 486 + return block2mtd_setup2(val); 487 + 488 + /* During early boot stage, we only save the parameters 489 + here. We must parse them later: if the param passed 490 + from kernel boot command line, block2mtd_setup() is 491 + called so early that it is not possible to resolve 492 + the device (even kmalloc() fails). Deter that work to 493 + block2mtd_setup2(). */ 494 + 495 + strlcpy(block2mtd_paramline, val, sizeof(block2mtd_paramline)); 496 + 497 + return 0; 498 + #endif 499 + } 500 + 501 + 473 502 module_param_call(block2mtd, block2mtd_setup, NULL, NULL, 0200); 474 503 MODULE_PARM_DESC(block2mtd, "Device to use. \"block2mtd=<dev>[,<erasesize>]\""); 475 504 476 505 static int __init block2mtd_init(void) 477 506 { 507 + int ret = 0; 478 508 INFO("version " VERSION); 479 - return 0; 509 + 510 + #ifndef MODULE 511 + if (strlen(block2mtd_paramline)) 512 + ret = block2mtd_setup2(block2mtd_paramline); 513 + block2mtd_init_called = 1; 514 + #endif 515 + 516 + return ret; 480 517 } 481 518 482 519
+6 -6
drivers/mtd/devices/m25p80.c
··· 406 406 407 407 static struct flash_info __devinitdata m25p_data [] = { 408 408 /* REVISIT: fill in JEDEC ids, for parts that have them */ 409 - { "m25p05", 0x05, 0x0000, 32 * 1024, 2 }, 410 - { "m25p10", 0x10, 0x0000, 32 * 1024, 4 }, 411 - { "m25p20", 0x11, 0x0000, 64 * 1024, 4 }, 412 - { "m25p40", 0x12, 0x0000, 64 * 1024, 8 }, 409 + { "m25p05", 0x05, 0x2010, 32 * 1024, 2 }, 410 + { "m25p10", 0x10, 0x2011, 32 * 1024, 4 }, 411 + { "m25p20", 0x11, 0x2012, 64 * 1024, 4 }, 412 + { "m25p40", 0x12, 0x2013, 64 * 1024, 8 }, 413 413 { "m25p80", 0x13, 0x0000, 64 * 1024, 16 }, 414 - { "m25p16", 0x14, 0x0000, 64 * 1024, 32 }, 415 - { "m25p32", 0x15, 0x0000, 64 * 1024, 64 }, 414 + { "m25p16", 0x14, 0x2015, 64 * 1024, 32 }, 415 + { "m25p32", 0x15, 0x2016, 64 * 1024, 64 }, 416 416 { "m25p64", 0x16, 0x2017, 64 * 1024, 128 }, 417 417 }; 418 418
-4
drivers/mtd/devices/pmc551.c
··· 99 99 #include <asm/system.h> 100 100 #include <linux/pci.h> 101 101 102 - #ifndef CONFIG_PCI 103 - #error Enable PCI in your kernel config 104 - #endif 105 - 106 102 #include <linux/mtd/mtd.h> 107 103 #include <linux/mtd/pmc551.h> 108 104 #include <linux/mtd/compatmac.h>
+6 -6
drivers/mtd/maps/Kconfig
··· 13 13 14 14 config MTD_PHYSMAP 15 15 tristate "CFI Flash device in physical memory map" 16 - depends on MTD_CFI 16 + depends on MTD_CFI || MTD_JEDECPROBE || MTD_ROM 17 17 help 18 - This provides a 'mapping' driver which allows the CFI probe and 19 - command set driver code to communicate with flash chips which 20 - are mapped physically into the CPU's memory. You will need to 21 - configure the physical address and size of the flash chips on 22 - your particular board as well as the bus width, either statically 18 + This provides a 'mapping' driver which allows the NOR Flash and 19 + ROM driver code to communicate with chips which are mapped 20 + physically into the CPU's memory. You will need to configure 21 + the physical address and size of the flash chips on your 22 + particular board as well as the bus width, either statically 23 23 with config options or at run-time. 24 24 25 25 config MTD_PHYSMAP_START
+3 -6
drivers/mtd/mtdchar.c
··· 62 62 struct mtd_info *mtd = mfi->mtd; 63 63 64 64 switch (orig) { 65 - case 0: 66 - /* SEEK_SET */ 65 + case SEEK_SET: 67 66 break; 68 - case 1: 69 - /* SEEK_CUR */ 67 + case SEEK_CUR: 70 68 offset += file->f_pos; 71 69 break; 72 - case 2: 73 - /* SEEK_END */ 70 + case SEEK_END: 74 71 offset += mtd->size; 75 72 break; 76 73 default:
+1 -1
drivers/mtd/nand/Kconfig
··· 11 11 help 12 12 This enables support for accessing all type of NAND flash 13 13 devices. For further information see 14 - <http://www.linux-mtd.infradead.org/tech/nand.html>. 14 + <http://www.linux-mtd.infradead.org/doc/nand.html>. 15 15 16 16 config MTD_NAND_VERIFY_WRITE 17 17 bool "Verify NAND page writes"
+1 -1
drivers/mtd/nand/nand_base.c
··· 2224 2224 } 2225 2225 2226 2226 /* Try to identify manufacturer */ 2227 - for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_id++) { 2227 + for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) { 2228 2228 if (nand_manuf_ids[maf_idx].id == *maf_id) 2229 2229 break; 2230 2230 }
+5 -2
drivers/mtd/nand/sharpsl.c
··· 78 78 /* 79 79 * hardware specific access to control-lines 80 80 * ctrl: 81 - * NAND_CNE: bit 0 -> bit 0 & 4 81 + * NAND_CNE: bit 0 -> ! bit 0 & 4 82 82 * NAND_CLE: bit 1 -> bit 1 83 83 * NAND_ALE: bit 2 -> bit 2 84 84 * ··· 92 92 unsigned char bits = ctrl & 0x07; 93 93 94 94 bits |= (ctrl & 0x01) << 4; 95 - writeb((readb(FLASHCTL) & 0x17) | bits, FLASHCTL); 95 + 96 + bits ^= 0x11; 97 + 98 + writeb((readb(FLASHCTL) & ~0x17) | bits, FLASHCTL); 96 99 } 97 100 98 101 if (cmd != NAND_CMD_NONE)
+5 -1
fs/jffs2/nodelist.c
··· 21 21 #include <linux/pagemap.h> 22 22 #include "nodelist.h" 23 23 24 + static void jffs2_obsolete_node_frag(struct jffs2_sb_info *c, 25 + struct jffs2_node_frag *this); 26 + 24 27 void jffs2_add_fd_to_list(struct jffs2_sb_info *c, struct jffs2_full_dirent *new, struct jffs2_full_dirent **list) 25 28 { 26 29 struct jffs2_full_dirent **prev = list; ··· 90 87 } 91 88 } 92 89 93 - void jffs2_obsolete_node_frag(struct jffs2_sb_info *c, struct jffs2_node_frag *this) 90 + static void jffs2_obsolete_node_frag(struct jffs2_sb_info *c, 91 + struct jffs2_node_frag *this) 94 92 { 95 93 if (this->node) { 96 94 this->node->frags--;
-1
fs/jffs2/nodelist.h
··· 334 334 struct rb_node *rb_next(struct rb_node *); 335 335 struct rb_node *rb_prev(struct rb_node *); 336 336 void rb_replace_node(struct rb_node *victim, struct rb_node *new, struct rb_root *root); 337 - void jffs2_obsolete_node_frag(struct jffs2_sb_info *c, struct jffs2_node_frag *this); 338 337 int jffs2_add_full_dnode_to_inode(struct jffs2_sb_info *c, struct jffs2_inode_info *f, struct jffs2_full_dnode *fn); 339 338 void jffs2_truncate_fragtree (struct jffs2_sb_info *c, struct rb_root *list, uint32_t size); 340 339 int jffs2_add_older_frag_to_fragtree(struct jffs2_sb_info *c, struct jffs2_inode_info *f, struct jffs2_tmp_dnode_info *tn);
-1
fs/jffs2/xattr.c
··· 1215 1215 rc = jffs2_reserve_space_gc(c, totlen, &length, JFFS2_SUMMARY_XATTR_SIZE); 1216 1216 if (rc) { 1217 1217 JFFS2_WARNING("jffs2_reserve_space_gc()=%d, request=%u\n", rc, totlen); 1218 - rc = rc ? rc : -EBADFD; 1219 1218 goto out; 1220 1219 } 1221 1220 rc = save_xattr_datum(c, xd);
+13
include/linux/mtd/cfi.h
··· 199 199 uint8_t TopBottom; 200 200 } __attribute__((packed)); 201 201 202 + /* Vendor-Specific PRI for Atmel chips (command set 0x0002) */ 203 + 204 + struct cfi_pri_atmel { 205 + uint8_t pri[3]; 206 + uint8_t MajorVersion; 207 + uint8_t MinorVersion; 208 + uint8_t Features; 209 + uint8_t BottomBoot; 210 + uint8_t BurstMode; 211 + uint8_t PageMode; 212 + } __attribute__((packed)); 213 + 202 214 struct cfi_pri_query { 203 215 uint8_t NumFields; 204 216 uint32_t ProtField[1]; /* Not host ordered */ ··· 476 464 #define CFI_ID_ANY 0xffff 477 465 478 466 #define CFI_MFR_AMD 0x0001 467 + #define CFI_MFR_ATMEL 0x001F 479 468 #define CFI_MFR_ST 0x0020 /* STMicroelectronics */ 480 469 481 470 void cfi_fixup(struct mtd_info *mtd, struct cfi_fixup* fixups);