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Merge tag 'x86_microcode_for_v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 microcode loader update from Borislav Petkov:

- Remove the unconditional cache writeback and invalidation after
loading the microcode patch on Intel as this was addressing a
microcode bug for which there is a concrete microcode revision check
instead

* tag 'x86_microcode_for_v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/microcode/intel: Remove unnecessary cache writeback and invalidation

+2 -8
+2 -8
arch/x86/kernel/cpu/microcode/intel.c
··· 319 319 return UCODE_OK; 320 320 } 321 321 322 - /* 323 - * Writeback and invalidate caches before updating microcode to avoid 324 - * internal issues depending on what the microcode is updating. 325 - */ 326 - native_wbinvd(); 327 - 328 322 /* write microcode via MSR 0x79 */ 329 323 native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits); 330 324 ··· 568 574 /* 569 575 * Late loading on model 79 with microcode revision less than 0x0b000021 570 576 * and LLC size per core bigger than 2.5MB may result in a system hang. 571 - * This behavior is documented in item BDF90, #334165 (Intel Xeon 577 + * This behavior is documented in item BDX90, #334165 (Intel Xeon 572 578 * Processor E7-8800/4800 v4 Product Family). 573 579 */ 574 580 if (c->x86_vfm == INTEL_BROADWELL_X && 575 581 c->x86_stepping == 0x01 && 576 582 llc_size_per_core > 2621440 && 577 583 c->microcode < 0x0b000021) { 578 - pr_err_once("Erratum BDF90: late loading with revision < 0x0b000021 (0x%x) disabled.\n", c->microcode); 584 + pr_err_once("Erratum BDX90: late loading with revision < 0x0b000021 (0x%x) disabled.\n", c->microcode); 579 585 pr_err_once("Please consider either early loading through initrd/built-in or a potential BIOS update.\n"); 580 586 return true; 581 587 }